xref: /utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/include/Maxim_UFSC.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1 ////////////////////////////////////////////////////////////////////////////////
2 //
3 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
4 // All rights reserved.
5 //
6 // Unless otherwise stipulated in writing, any and all information contained
7 // herein regardless in any format shall remain the sole proprietary of
8 // MStar Semiconductor Inc. and be kept in strict confidence
9 // (; MStar; Confidential; Information; ) by the recipient.
10 // Any unauthorized act including without limitation unauthorized disclosure,
11 // copying, use, reproduction, sale, distribution, modification, disassembling,
12 // reverse engineering and compiling of the contents of MStar Confidential
13 // Information is unlawful and strictly prohibited. MStar hereby reserves the
14 // rights to any and all damages, losses, costs and expenses resulting therefrom.
15 //
16 //****************************************************
17 //   Quality Map CodeGen Version 4.0
18 // 1920
19 // Maxim
20 // 6/20/2016  5:17:11 PM
21 // 42541.7202662
22 //****************************************************
23 
24 #ifndef _MAXIM_UFSC_C_
25 #define _MAXIM_UFSC_C_
26 
27 #if PQ_SKIPRULE_ENABLE
28 
29 code U8 MST_SkipRule_IP_UFSC[PQ_IP_NUM_UFSC]=
30 {
31     /* INIT_FAC */ 0, /* VSP_Y */ 0, /* VSP_C */ 0, /* VSP_CoRing */ 0,
32     /* VSP_Dither */ 0, /* VSP_PreVBound */ 1, /* HSP_Y */ 0, /* HSP_C */ 0,
33     /* HSP_CoRing */ 0, /* HSP_DeRing */ 0, /* HSP_Dither */ 0, /* HnonLinear */ 1,
34     /* HSP_Y_COEFF */ 0, /* HSP_C_COEFF */ 0, /* VIP_4K */ 0, /* SC_End */ 1,
35 };
36 
37 #endif
38 //****************************************************
39 // INIT_FAC
40 //****************************************************
41 code U8 MST_INIT_FAC_COM_UFSC[][4] =
42 {      // Reg           Mask  Value
43  { PQ_MAP_REG(REG_SC_BK4F_02_H), 0x07, 0x00 },
44  { PQ_MAP_REG(REG_SC_BK4F_03_L), 0xFF, 0x00 },
45  { PQ_MAP_REG(REG_SC_BK4F_03_H), 0xFF, 0x00 },
46  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
47 };
48 
49 code U8 MST_INIT_FAC_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_INIT_FAC_NUMS_UFSC]=
50 {
51  { PQ_MAP_REG(REG_SC_BK4F_01_L), 0xFF, 0x00/*Type0*/,
52                               0x00/*Type1*/,
53                               0x88/*Type2*/, },
54  { PQ_MAP_REG(REG_SC_BK4F_01_H), 0xFF, 0x00/*Type0*/,
55                               0x00/*Type1*/,
56                               0x88/*Type2*/, },
57  { PQ_MAP_REG(REG_SC_BK4F_02_L), 0xFF, 0x00/*Type0*/,
58                               0x0C/*Type1*/,
59                               0x00/*Type2*/, },
60  { PQ_MAP_REG(REG_SC_BK4F_04_L), 0xFF, 0x00/*Type0*/,
61                               0x0C/*Type1*/,
62                               0x00/*Type2*/, },
63  { PQ_MAP_REG(REG_SC_BK4F_08_H), 0x02, 0x00/*Type0*/,
64                               0x02/*Type1*/,
65                               0x00/*Type2*/, },
66  { PQ_MAP_REG(REG_SC_BK4F_0A_H), 0x02, 0x00/*Type0*/,
67                               0x02/*Type1*/,
68                               0x00/*Type2*/, },
69  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
70 };
71 
72 //****************************************************
73 // VSP_Y
74 //****************************************************
75 code U8 MST_VSP_Y_COM_UFSC[][4] =
76 {      // Reg           Mask  Value
77  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
78 };
79 
80 code U8 MST_VSP_Y_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_VSP_Y_NUMS_UFSC]=
81 {
82  { PQ_MAP_REG(REG_SC_BK4F_0B_H), 0x41, 0x00/*$Bypass*/,
83                               0x01/*$Bilinear*/,
84                               0x40/*$Y_4Tap*/,
85                               0x40/*$Y_6Tap*/, },
86  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
87 };
88 
89 //****************************************************
90 // VSP_C
91 //****************************************************
92 code U8 MST_VSP_C_COM_UFSC[][4] =
93 {      // Reg           Mask  Value
94  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
95 };
96 
97 code U8 MST_VSP_C_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_VSP_C_NUMS_UFSC]=
98 {
99  { PQ_MAP_REG(REG_SC_BK4F_0B_H), 0x1E, 0x00/*$Bypass*/,
100                               0x02/*$Bilinear*/,
101                               0x14/*$Y_4Tap*/,
102                               0x04/*$C_4Tap*/, },
103  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
104 };
105 
106 //****************************************************
107 // VSP_CoRing
108 //****************************************************
109 code U8 MST_VSP_CoRing_COM_UFSC[][4] =
110 {      // Reg           Mask  Value
111  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
112 };
113 
114 code U8 MST_VSP_CoRing_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_VSP_CoRing_NUMS_UFSC]=
115 {
116  { PQ_MAP_REG(REG_SC_BK4F_0C_H), 0x0C, 0x00/*$OFF*/,
117                               0x08/*$Y_Coring_1*/,
118                               0x08/*$Y_Coring_2*/,
119                               0x08/*$Y_Coring_3*/,
120                               0x08/*$Y_Coring_4*/,
121                               0x08/*$Y_Coring_5*/, },
122  { PQ_MAP_REG(REG_SC_BK4F_0E_L), 0x1F, 0x00/*OFF*/,
123                               0x01/*Y_Coring_1*/,
124                               0x02/*Y_Coring_2*/,
125                               0x03/*Y_Coring_3*/,
126                               0x04/*Y_Coring_4*/,
127                               0x05/*Y_Coring_5*/, },
128  { PQ_MAP_REG(REG_SC_BK4F_0E_H), 0x1F, 0x00/*OFF*/,
129                               0x01/*Y_Coring_1*/,
130                               0x02/*Y_Coring_2*/,
131                               0x03/*Y_Coring_3*/,
132                               0x04/*Y_Coring_4*/,
133                               0x05/*Y_Coring_5*/, },
134  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
135 };
136 
137 //****************************************************
138 // VSP_Dither
139 //****************************************************
140 code U8 MST_VSP_Dither_COM_UFSC[][4] =
141 {      // Reg           Mask  Value
142  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
143 };
144 
145 code U8 MST_VSP_Dither_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_VSP_Dither_NUMS_UFSC]=
146 {
147  { PQ_MAP_REG(REG_SC_BK4F_0C_L), 0x02, 0x00/*OFF*/,
148                               0x02/*ON*/, },
149  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
150 };
151 
152 //****************************************************
153 // VSP_PreVBound
154 //****************************************************
155 code U8 MST_VSP_PreVBound_COM_UFSC[][4] =
156 {      // Reg           Mask  Value
157  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
158 };
159 
160 code U8 MST_VSP_PreVBound_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_VSP_PreVBound_NUMS_UFSC]=
161 {
162  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
163 };
164 
165 //****************************************************
166 // HSP_Y
167 //****************************************************
168 code U8 MST_HSP_Y_COM_UFSC[][4] =
169 {      // Reg           Mask  Value
170  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
171 };
172 
173 code U8 MST_HSP_Y_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_HSP_Y_NUMS_UFSC]=
174 {
175  { PQ_MAP_REG(REG_SC_BK4F_13_L), 0x10, 0x00/*Bypass*/,
176                               0x00/*Bilinear*/,
177                               0x00/*Y_4Tap*/,
178                               0x10/*Y_6Tap*/, },
179  { PQ_MAP_REG(REG_SC_BK4F_0B_L), 0x41, 0x00/*$Bypass*/,
180                               0x01/*$Bilinear*/,
181                               0x40/*$Y_4Tap*/,
182                               0x40/*$Y_6Tap*/, },
183  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
184 };
185 
186 //****************************************************
187 // HSP_C
188 //****************************************************
189 code U8 MST_HSP_C_COM_UFSC[][4] =
190 {      // Reg           Mask  Value
191  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
192 };
193 
194 code U8 MST_HSP_C_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_HSP_C_NUMS_UFSC]=
195 {
196  { PQ_MAP_REG(REG_SC_BK4F_0B_L), 0x1E, 0x00/*$Bypass*/,
197                               0x02/*$Bilinear*/,
198                               0x04/*$C_4Tap*/,
199                               0x10/*$Y_4Tap*/, },
200  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
201 };
202 
203 //****************************************************
204 // HSP_CoRing
205 //****************************************************
206 code U8 MST_HSP_CoRing_COM_UFSC[][4] =
207 {      // Reg           Mask  Value
208  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
209 };
210 
211 code U8 MST_HSP_CoRing_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_HSP_CoRing_NUMS_UFSC]=
212 {
213  { PQ_MAP_REG(REG_SC_BK4F_0C_H), 0x03, 0x00/*$OFF*/,
214                               0x02/*$Y_Coring_1*/,
215                               0x02/*$Y_Coring_2*/,
216                               0x02/*$Y_Coring_3*/,
217                               0x02/*$Y_Coring_4*/,
218                               0x02/*$Y_Coring_5*/, },
219  { PQ_MAP_REG(REG_SC_BK4F_0D_L), 0x1F, 0x00/*OFF*/,
220                               0x01/*Y_Coring_1*/,
221                               0x02/*Y_Coring_2*/,
222                               0x03/*Y_Coring_3*/,
223                               0x04/*Y_Coring_4*/,
224                               0x05/*Y_Coring_5*/, },
225  { PQ_MAP_REG(REG_SC_BK4F_0D_H), 0x1F, 0x00/*OFF*/,
226                               0x01/*Y_Coring_1*/,
227                               0x02/*Y_Coring_2*/,
228                               0x03/*Y_Coring_3*/,
229                               0x04/*Y_Coring_4*/,
230                               0x05/*Y_Coring_5*/, },
231  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
232 };
233 
234 //****************************************************
235 // HSP_DeRing
236 //****************************************************
237 code U8 MST_HSP_DeRing_COM_UFSC[][4] =
238 {      // Reg           Mask  Value
239  { PQ_MAP_REG(REG_SC_BK4F_0F_L), 0xC0, 0x00 },//Same mark
240  { PQ_MAP_REG(REG_SC_BK4F_10_L), 0xFC, 0x00 },//Same mark
241  { PQ_MAP_REG(REG_SC_BK4F_10_H), 0x1F, 0x00 },//Same mark
242  { PQ_MAP_REG(REG_SC_BK4F_20_L), 0x0F, 0x00 },
243  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
244 };
245 
246 code U8 MST_HSP_DeRing_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_HSP_DeRing_NUMS_UFSC]=
247 {
248  { PQ_MAP_REG(REG_SC_BK4F_0F_L), 0x1F, 0x00/*$OFF*/,
249                               0x08/*$DR1*/, },
250  { PQ_MAP_REG(REG_SC_BK4F_0F_H), 0xFF, 0x00/*$OFF*/,
251                               0x05/*$DR1*/, },
252  { PQ_MAP_REG(REG_SC_BK4F_10_L), 0x03, 0x00/*$OFF*/,
253                               0x03/*$DR1*/, },
254  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
255 };
256 
257 //****************************************************
258 // HSP_Dither
259 //****************************************************
260 code U8 MST_HSP_Dither_COM_UFSC[][4] =
261 {      // Reg           Mask  Value
262  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
263 };
264 
265 code U8 MST_HSP_Dither_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_HSP_Dither_NUMS_UFSC]=
266 {
267  { PQ_MAP_REG(REG_SC_BK4F_0C_L), 0x01, 0x00/*OFF*/,
268                               0x01/*ON*/, },
269  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
270 };
271 
272 //****************************************************
273 // HnonLinear
274 //****************************************************
275 code U8 MST_HnonLinear_COM_UFSC[][4] =
276 {      // Reg           Mask  Value
277  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
278 };
279 
280 code U8 MST_HnonLinear_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_HnonLinear_NUMS_UFSC]=
281 {
282  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
283 };
284 
285 //****************************************************
286 // HSP_Y_COEFF
287 //****************************************************
288 code U8 MST_HSP_Y_COEFF_COM_UFSC[][4] =
289 {      // Reg           Mask  Value
290  { PQ_MAP_REG(REG_SC_BK4F_14_H), 0x01, 0x00 },
291  { PQ_MAP_REG(REG_SC_BK4F_15_L), 0xFF, 0x00 },
292  { PQ_MAP_REG(REG_SC_BK4F_15_H), 0x03, 0x00 },
293  { PQ_MAP_REG(REG_SC_BK4F_16_H), 0x07, 0x00 },
294  { PQ_MAP_REG(REG_SC_BK4F_18_L), 0xFF, 0x00 },
295  { PQ_MAP_REG(REG_SC_BK4F_18_H), 0x03, 0x00 },
296  { PQ_MAP_REG(REG_SC_BK4F_19_H), 0x07, 0x00 },
297  { PQ_MAP_REG(REG_SC_BK4F_1A_H), 0x07, 0x00 },
298  { PQ_MAP_REG(REG_SC_BK4F_1B_L), 0xFF, 0x00 },
299  { PQ_MAP_REG(REG_SC_BK4F_1B_H), 0x03, 0x00 },
300  { PQ_MAP_REG(REG_SC_BK4F_1E_L), 0xFF, 0x00 },
301  { PQ_MAP_REG(REG_SC_BK4F_1E_H), 0x03, 0x00 },
302  { PQ_MAP_REG(REG_SC_BK4F_1F_H), 0x07, 0x00 },
303  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
304 };
305 
306 code U8 MST_HSP_Y_COEFF_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_HSP_Y_COEFF_NUMS_UFSC]=
307 {
308  { PQ_MAP_REG(REG_SC_BK4F_14_L), 0xFF, 0x00/*OFF*/,
309                               0x09/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
310                               0x28/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
311                               0x1F/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
312  { PQ_MAP_REG(REG_SC_BK4F_16_L), 0xFF, 0x00/*OFF*/,
313                               0xEE/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
314                               0xB0/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
315                               0xC2/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
316  { PQ_MAP_REG(REG_SC_BK4F_17_L), 0xFF, 0x00/*OFF*/,
317                               0xEC/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
318                               0x07/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
319                               0xF8/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
320  { PQ_MAP_REG(REG_SC_BK4F_17_H), 0x01, 0x00/*OFF*/,
321                               0x0F/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
322                               0x00/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
323                               0x0F/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
324  { PQ_MAP_REG(REG_SC_BK4F_19_L), 0xFF, 0x00/*OFF*/,
325                               0xD9/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
326                               0xAE/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
327                               0xC5/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
328  { PQ_MAP_REG(REG_SC_BK4F_1A_L), 0xFF, 0x00/*OFF*/,
329                               0x46/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
330                               0x57/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
331                               0x53/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
332  { PQ_MAP_REG(REG_SC_BK4F_1C_L), 0xFF, 0x00/*OFF*/,
333                               0xF5/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
334                               0xF3/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
335                               0xF0/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
336  { PQ_MAP_REG(REG_SC_BK4F_1C_H), 0x01, 0x00/*OFF*/,
337                               0x0F/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
338                               0x0F/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
339                               0x0F/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
340  { PQ_MAP_REG(REG_SC_BK4F_1D_L), 0xFF, 0x00/*OFF*/,
341                               0xEB/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
342                               0xF6/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
343                               0xEC/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
344  { PQ_MAP_REG(REG_SC_BK4F_1D_H), 0x01, 0x00/*OFF*/,
345                               0x0F/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
346                               0x0F/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
347                               0x0F/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
348  { PQ_MAP_REG(REG_SC_BK4F_1F_L), 0xFF, 0x00/*OFF*/,
349                               0x95/*InvSinc4Tc4p4Fc95Apass0001Astop40*/,
350                               0x8A/*InvSinc4Tc4p4Fc75Apass0001Astop40*/,
351                               0x94/*InvSinc4Tc4p4Fc85Apass0001Astop40*/, },
352  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
353 };
354 
355 //****************************************************
356 // HSP_C_COEFF
357 //****************************************************
358 code U8 MST_HSP_C_COEFF_COM_UFSC[][4] =
359 {      // Reg           Mask  Value
360  { PQ_MAP_REG(REG_SC_BK4F_20_H), 0x01, 0x00 },
361  { PQ_MAP_REG(REG_SC_BK4F_21_H), 0x07, 0x00 },
362  { PQ_MAP_REG(REG_SC_BK4F_23_H), 0x07, 0x00 },
363  { PQ_MAP_REG(REG_SC_BK4F_24_H), 0x07, 0x00 },
364  { PQ_MAP_REG(REG_SC_BK4F_27_H), 0x07, 0x00 },
365  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
366 };
367 
368 code U8 MST_HSP_C_COEFF_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_HSP_C_COEFF_NUMS_UFSC]=
369 {
370  { PQ_MAP_REG(REG_SC_BK4F_20_L), 0xFF, 0x00/*OFF*/,
371                               0x1F/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
372                               0x28/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
373  { PQ_MAP_REG(REG_SC_BK4F_21_L), 0xFF, 0x00/*OFF*/,
374                               0xC2/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
375                               0xB0/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
376  { PQ_MAP_REG(REG_SC_BK4F_22_L), 0xFF, 0x00/*OFF*/,
377                               0xF8/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
378                               0x07/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
379  { PQ_MAP_REG(REG_SC_BK4F_22_H), 0x01, 0x00/*OFF*/,
380                               0x0F/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
381                               0x00/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
382  { PQ_MAP_REG(REG_SC_BK4F_23_L), 0xFF, 0x00/*OFF*/,
383                               0xC5/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
384                               0xAE/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
385  { PQ_MAP_REG(REG_SC_BK4F_24_L), 0xFF, 0x00/*OFF*/,
386                               0x53/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
387                               0x57/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
388  { PQ_MAP_REG(REG_SC_BK4F_25_L), 0xFF, 0x00/*OFF*/,
389                               0xF0/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
390                               0xF3/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
391  { PQ_MAP_REG(REG_SC_BK4F_25_H), 0x01, 0x00/*OFF*/,
392                               0x0F/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
393                               0x0F/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
394  { PQ_MAP_REG(REG_SC_BK4F_26_L), 0xFF, 0x00/*OFF*/,
395                               0xEC/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
396                               0xF6/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
397  { PQ_MAP_REG(REG_SC_BK4F_26_H), 0x01, 0x00/*OFF*/,
398                               0x0F/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
399                               0x0F/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
400  { PQ_MAP_REG(REG_SC_BK4F_27_L), 0xFF, 0x00/*OFF*/,
401                               0x94/*InvSinc4Tc4p4Fc85Apass0001Astop40*/,
402                               0x8A/*InvSinc4Tc4p4Fc75Apass0001Astop40*/, },
403  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
404 };
405 
406 //****************************************************
407 // VIP_4K
408 //****************************************************
409 code U8 MST_VIP_4K_COM_UFSC[][4] =
410 {      // Reg           Mask  Value
411  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
412 };
413 
414 code U8 MST_VIP_4K_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_VIP_4K_NUMS_UFSC]=
415 {
416  { PQ_MAP_REG(REG_SC_BK18_75_L), 0x04, 0x00/*OFF*/,
417                               0x04/*4K2K*/, },
418  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
419 };
420 
421 //****************************************************
422 // SC_End
423 //****************************************************
424 code U8 MST_SC_End_COM_UFSC[][4] =
425 {      // Reg           Mask  Value
426  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
427 };
428 
429 code U8 MST_SC_End_UFSC[][REG_ADDR_SIZE+REG_MASK_SIZE+PQ_IP_SC_End_NUMS_UFSC]=
430 {
431  { PQ_MAP_REG(REG_TABLE_END), 0x00, 0x00 }
432 };
433 
434 
435 code EN_IPTAB_INFO PQ_IPTAB_INFO_UFSC[]=
436 {
437 {*MST_INIT_FAC_COM_UFSC, *MST_INIT_FAC_UFSC, PQ_IP_INIT_FAC_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
438 {*MST_VSP_Y_COM_UFSC, *MST_VSP_Y_UFSC, PQ_IP_VSP_Y_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
439 {*MST_VSP_C_COM_UFSC, *MST_VSP_C_UFSC, PQ_IP_VSP_C_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
440 {*MST_VSP_CoRing_COM_UFSC, *MST_VSP_CoRing_UFSC, PQ_IP_VSP_CoRing_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
441 {*MST_VSP_Dither_COM_UFSC, *MST_VSP_Dither_UFSC, PQ_IP_VSP_Dither_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
442 {*MST_VSP_PreVBound_COM_UFSC, *MST_VSP_PreVBound_UFSC, PQ_IP_VSP_PreVBound_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
443 {*MST_HSP_Y_COM_UFSC, *MST_HSP_Y_UFSC, PQ_IP_HSP_Y_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
444 {*MST_HSP_C_COM_UFSC, *MST_HSP_C_UFSC, PQ_IP_HSP_C_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
445 {*MST_HSP_CoRing_COM_UFSC, *MST_HSP_CoRing_UFSC, PQ_IP_HSP_CoRing_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
446 {*MST_HSP_DeRing_COM_UFSC, *MST_HSP_DeRing_UFSC, PQ_IP_HSP_DeRing_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
447 {*MST_HSP_Dither_COM_UFSC, *MST_HSP_Dither_UFSC, PQ_IP_HSP_Dither_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
448 {*MST_HnonLinear_COM_UFSC, *MST_HnonLinear_UFSC, PQ_IP_HnonLinear_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
449 {*MST_HSP_Y_COEFF_COM_UFSC, *MST_HSP_Y_COEFF_UFSC, PQ_IP_HSP_Y_COEFF_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
450 {*MST_HSP_C_COEFF_COM_UFSC, *MST_HSP_C_COEFF_UFSC, PQ_IP_HSP_C_COEFF_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
451 {*MST_VIP_4K_COM_UFSC, *MST_VIP_4K_UFSC, PQ_IP_VIP_4K_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
452 {*MST_SC_End_COM_UFSC, *MST_SC_End_UFSC, PQ_IP_SC_End_NUMS_UFSC, PQ_TABTYPE_UFSC_SCALER},
453 };
454 
455 #endif
456