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77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
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80 // Copyright (c) 2014-2016 MStar Semiconductor, Inc.
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 ////////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file DMX_adp.c
98 /// @brief Demux adaption API
99 /// @author MStar Semiconductor,Inc.
100 ////////////////////////////////////////////////////////////////////////////////////////////////////
101 #ifdef MSOS_TYPE_LINUX_KERNEL
102 #include <linux/uaccess.h>
103 #include <linux/kernel.h>
104 #include <linux/string.h>
105 #include <linux/slab.h>
106
107 #include "drvMVOP.h"
108 #include "drvMVOP_v2.h"
109 #include "MVOP_adp.h"
110 #include "utopia.h"
111 #include "utopia_adp.h"
112 #include "MsTypes.h"
113
114 //-------------------------------------------------------------------------------------------------
115 // Driver Compiler Options
116 //-------------------------------------------------------------------------------------------------
117
118 //-------------------------------------------------------------------------------------------------
119 // Global Variables
120 //-------------------------------------------------------------------------------------------------
121 //extern void* spt_MS_U8;
122 extern void* spt_MSIF_Version;
123 //extern void* spt_MS_BOOL;
124 // 0 pointer
125 UADP_SDT_0_DEF(MS_PHY);
126
127 UADP_SDT_2_DEF(MVOP_InputCfg);
128 UADP_SDT_0_DEF(MVOP_TileFormat);
129 UADP_SDT_0_DEF(MVOP_Timing);
130 UADP_SDT_0_DEF(MVOP_DST_DispInfo);
131 UADP_SDT_0_DEF(MVOP_TimingInfo_FromRegisters);
132 UADP_SDT_0_DEF(MVOP_VidStat);
133 UADP_SDT_0_DEF(MVOP_DrvInfo);
134 UADP_SDT_0_DEF(MVOP_DrvStatus);
135 UADP_SDT_0_DEF(MVOP_Handle);
136 UADP_SDT_2_DEF(MVOP_BaseAddInput);
137 UADP_SDT_0_DEF(MVOP_VC1RangeMapInfo);
138 UADP_SDT_4_DEF(MVOP_EVDBaseAddInput);
139 UADP_SDT_0_DEF(MVOP_EVDFeature);
140 UADP_SDT_0_DEF(MVOP_CapInput);
141 UADP_SDT_0_DEF(MVOP_ComdFlag);
142 //UADP_SDT_0NXT_DEF(MSIF_Version);
143 //UADP_SDT_0NXT_DEF(MS_U8);
144 UADP_SDT_0_DEF(MS_BOOL);
145
146 UADP_SDT_0_DEF(stMVOP_ENABLE);
147 UADP_SDT_0_DEF(stMVOP_ENABLE_UV_SHIFT);
148 UADP_SDT_0_DEF(stMVOP_SET_MONO_MODE);
149 UADP_SDT_0_DEF(stMVOP_GET_HSIZE);
150 UADP_SDT_0_DEF(stMVOP_GET_VSIZE);
151 UADP_SDT_0_DEF(stMVOP_GET_HSTART);
152 UADP_SDT_0_DEF(stMVOP_GET_VSTART);
153 UADP_SDT_0_DEF(stMVOP_GET_IS_INTERLACE);
154 UADP_SDT_0_DEF(stMVOP_GET_IS_HDUPLICATE);
155 UADP_SDT_0_DEF(stMVOP_CHECK_CAPABILITY);
156 UADP_SDT_0_DEF(stMVOP_GET_MAX_HOFFSET);
157 UADP_SDT_0_DEF(stMVOP_GET_MAX_VOFFSET);
158 UADP_SDT_0_DEF(stMVOP_SET_DBG_LEVEL);
159 UADP_SDT_1_DEF(stMVOP_GET_INFO);
160 UADP_SDT_0_DEF(stMVOP_SET_CLK);
161 UADP_SDT_0_DEF(stMVOP_SET_PATTERN);
162 UADP_SDT_0_DEF(stMVOP_SET_TILE_FORMAT);
163 UADP_SDT_0_DEF(stMVOP_SET_FIXVTT);
164 UADP_SDT_0_DEF(stMVOP_SET_MMIO_MAPBASE);
165 UADP_SDT_2_DEF(stMVOP_SET_BASEADD);
166 UADP_SDT_0_DEF(stMVOP_SEL_OP_FIELD);
167 UADP_SDT_0_DEF(stMVOP_SET_REGSIZE_FROM_MVD);
168 UADP_SDT_0_DEF(stMVOP_SET_START_POS);
169 UADP_SDT_0_DEF(stMVOP_SET_IMAGE_WIDTH_HIGHT);
170 UADP_SDT_0_DEF(stMVOP_SET_VOP_MIRROR_MODE);
171 UADP_SDT_0_DEF(stMVOP_MIU_SWITCH);
172 UADP_SDT_0_DEF(stMVOP_INV_OP_VS);
173 UADP_SDT_0_DEF(stMVOP_FORCE_TOP);
174 UADP_SDT_0_DEF(stMVOP_ENABLE_FREERUN_MODE);
175 UADP_SDT_2_DEF(stMVOP_GET_BASE_ADD);
176 UADP_SDT_0_DEF(stMVOP_SEND_BLUE_SCREEN);
177 UADP_SDT_0_DEF(stMVOP_SET_FREQUENCY);
178 UADP_SDT_0_DEF(stMVOP_ENABLE_INTERRUPT);
179 UADP_SDT_0_DEF(stMVOP_GET_INT_STATUS);
180 UADP_SDT_0_DEF(stMVOP_SET_POWER_STATE);
181
182 UADP_SDT_0_DEF(stMVOP_SUB_ENABLE);
183 UADP_SDT_0_DEF(stMVOP_SUB_ENABLE_UV_SHIFT);
184 UADP_SDT_0_DEF(stMVOP_SUB_SET_MONO_MODE);
185 UADP_SDT_0_DEF(stMVOP_SUB_GET_HSIZE);
186 UADP_SDT_0_DEF(stMVOP_SUB_GET_VSIZE);
187 UADP_SDT_0_DEF(stMVOP_SUB_GET_HSTART);
188 UADP_SDT_0_DEF(stMVOP_SUB_GET_VSTART);
189 UADP_SDT_0_DEF(stMVOP_SUB_GET_IS_INTERLACE);
190 UADP_SDT_0_DEF(stMVOP_SUB_GET_IS_HDUPLICATE);
191 UADP_SDT_0_DEF(stMVOP_SUB_CHECK_CAPABILITY);
192 UADP_SDT_0_DEF(stMVOP_SUB_GET_MAX_HOFFSET);
193 UADP_SDT_0_DEF(stMVOP_SUB_GET_MAX_VOFFSET);
194 UADP_SDT_0_DEF(stMVOP_SUB_SET_CLK);
195 UADP_SDT_0_DEF(stMVOP_SUB_SET_PATTERN);
196 UADP_SDT_0_DEF(stMVOP_SUB_SET_TILE_FORMAT);
197 UADP_SDT_0_DEF(stMVOP_SUB_SET_FIXVTT);
198 UADP_SDT_0_DEF(stMVOP_SUB_SET_MMIO_MAPBASE);
199 UADP_SDT_0_DEF(stMVOP_SUB_MIU_SWITCH);
200 UADP_SDT_2_DEF(stMVOP_SUB_SET_BASEADD);
201 UADP_SDT_0_DEF(stMVOP_SUB_SET_VOP_MIRROR_MODE);
202 UADP_SDT_0_DEF(stMVOP_SUB_ENABLE_FREERUN_MODE);
203 UADP_SDT_2_DEF(stMVOP_SUB_GET_BASE_ADD);
204 UADP_SDT_0_DEF(stMVOP_SUB_ENABLE_INTERRUPT);
205 UADP_SDT_0_DEF(stMVOP_SUB_GET_INT_STATUS);
206
207 UADP_SDT_0_DEF(stMVOP_EX_INIT);
208 UADP_SDT_0_DEF(stMVOP_EX_EXIT);
209 UADP_SDT_0_DEF(stMVOP_EX_ENABLE);
210 UADP_SDT_0_DEF(stMVOP_EX_SET_CLK);
211 UADP_SDT_0_DEF(stMVOP_EX_SET_PATTERN);
212 UADP_SDT_0_DEF(stMVOP_EX_SET_TILE_FORMAT);
213 UADP_SDT_0_DEF(stMVOP_EX_ENABLE_UV_SHIFT);
214 UADP_SDT_0_DEF(stMVOP_EX_ENABLE_BLACK_BG);
215 UADP_SDT_0_DEF(stMVOP_EX_SET_MONO_MODE);
216 UADP_SDT_0_DEF(stMVOP_EX_SET_FIXVTT);
217 UADP_SDT_0_DEF(stMVOP_EX_MIU_SWITCH);
218 UADP_SDT_0_DEF(stMVOP_EX_SET_VOP_MIRROR_MODE);
219 UADP_SDT_0_DEF(stMVOP_EX_ENABLE_FREERUN_MODE);
220 UADP_SDT_0_DEF(stMVOP_EX_SET_CLK);
221 UADP_SDT_0_DEF(stMVOP_EX_GET_HSIZE);
222 UADP_SDT_0_DEF(stMVOP_EX_GET_VSIZE);
223 UADP_SDT_0_DEF(stMVOP_EX_GET_HSTART);
224 UADP_SDT_0_DEF(stMVOP_EX_GET_VSTART);
225 UADP_SDT_0_DEF(stMVOP_EX_GET_IS_INTERLACE);
226 UADP_SDT_0_DEF(stMVOP_EX_GET_IS_HDUPLICATE);
227 UADP_SDT_0_DEF(stMVOP_EX_CHECK_CAPABILITY);
228 UADP_SDT_1_DEF(stMVOP_EX_GET_DST_INFO);
229 UADP_SDT_0_DEF(stMVOP_EX_ENABLE_INTERRUPT);
230 UADP_SDT_0_DEF(stMVOP_EX_GET_INT_STATUS);
231 // 1 pointer
232 UADP_SDT_1_DEF(stMVOP_SET_INPUTCFG); //nested
233 UADP_SDT_1_DEF(stMVOP_SET_OTPUTCFG);
234 UADP_SDT_1_DEF(stMVOP_GET_IS_ENABLE);
235 UADP_SDT_1_DEF(stMVOP_GET_OUTPUT_TIMING);
236 UADP_SDT_1_DEF(stMVOP_GET_LIBVER_VIR); //??
237 UADP_SDT_1_DEF(stMVOP_GET_LIBVER); //double pointer **
238 UADP_SDT_1_DEF(stMVOP_GET_STATUS);
239 UADP_SDT_1_DEF(stMVOP_GET_DST_INFO);
240
241 UADP_SDT_1_DEF(stMVOP_SUB_SET_INPUTCFG); //nested
242 UADP_SDT_1_DEF(stMVOP_SUB_SET_OTPUTCFG);
243 UADP_SDT_1_DEF(stMVOP_SUB_GET_STATUS);
244 UADP_SDT_1_DEF(stMVOP_SUB_GET_IS_ENABLE);
245 UADP_SDT_1_DEF(stMVOP_SUB_GET_OUTPUT_TIMING);
246 UADP_SDT_1_DEF(stMVOP_SUB_GET_DST_INFO);
247
248 UADP_SDT_1_DEF(stMVOP_EX_SET_INPUTCFG); //nested
249 UADP_SDT_1_DEF(stMVOP_EX_SET_OTPUTCFG);
250 UADP_SDT_1_DEF(stMVOP_EX_GET_OUTPUT_TIMING);
251 UADP_SDT_1_DEF(stMVOP_EX_GET_IS_ENABLE);
252 UADP_SDT_1_DEF(stMVOP_EX_GET_STATUS);
253
254 // 2 pointers
255 UADP_SDT_2_DEF(stMVOP_SET_COMMAND); //void*??
256 UADP_SDT_2_DEF(stMVOP_GET_COMMAND);
257
258 /* Set Command */
259 //0x101
260 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_VSIZE_MIN_BOOL);
261 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_VSIZE_MIN);
262 //0x102
263 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_STB_FD_MASK_CLR_BOOL);
264 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_STB_FD_MASK_CLR);
265 //0x103
266 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_3DLR_INST_VBLANK_U16);
267 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_3DLR_INST_VBLANK);
268 //0x104
269 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_3DLR_ALT_OUT_BOOL);
270 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_3DLR_ALT_OUT);
271 //0x105
272 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_RGB_FMT_RGB);
273 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_RGB_FMT);
274 //0x106
275 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_ENABLE_BOOL);
276 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_ENABLE);
277 //0x107
278 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_DSIABLE_VOID);
279 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_DSIABLE);
280 //0x108
281 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_3DLR_2ND_CFG_BOOL);
282 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_3DLR_2ND_CFG);
283 //0x109
284 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_VSIZE_DUPLICATE_BOOL);
285 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_VSIZE_DUPLICATE);
286 //0x10a
287 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_3DLR_ALT_OUT_SBS_BOOL);
288 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_3DLR_ALT_OUT_SBS);
289 //0x10b
290 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_FIELD_DUPLICATE_RPTFLD);
291 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_FIELD_DUPLICATE);
292 //0x10c
293 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_VSYNC_MODE_U8);
294 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_VSYNC_MODE);
295 //0x10d
296 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_VSIZE_X4_DUPLICATE_BOOL);
297 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_VSIZE_X4_DUPLICATE);
298 //0x10e
299 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_HSIZE_X4_DUPLICATE_BOOL);
300 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_HSIZE_X4_DUPLICATE);
301 //0x10f
302 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_BASE_ADD_MULTI_VIEW_ADDIN);
303 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_BASE_ADD_MULTI_VIEW);
304 //0x110
305 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_FIRE_MVOP_BOOL);
306 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_FIRE_MVOP);
307 //0x111
308 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_VC1_RANGE_MAP_VC1);
309 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_VC1_RANGE_MAP);
310 //0x112
311 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_POWER_STATE_VOID);
312 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_POWER_STATE);
313 //0x113
314 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_420_BW_SAVING_MODE_BOOL);
315 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_420_BW_SAVING_MODE);
316 //0x114
317 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_EVD_BASE_ADD_EVDADD);
318 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_EVD_BASE_ADD);
319 //0x115
320 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_EVD_FEATURE_EVDFT);
321 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_EVD_FEATURE);
322 //0x116
323 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_MVD_LATE_REPEAT_BOOL);
324 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_MVD_LATE_REPEAT);
325 //0x117
326 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_SET_HANDSHAKE_MODE_BOOL);
327 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_SET_HANDSHAKE_MODE);
328 //0x118
329 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_FRC_OUTPUT_U32);
330 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_FRC_OUTPUT);
331 //0x119
332 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_XC_GEN_TIMING_BOOL);
333 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_XC_GEN_TIMING);
334 //0x11A
335 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_RESET_SETTING_VOID);
336 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_RESET_SETTING);
337 //0x11B
338 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_SEL_OP_FIELD_BOOL);
339 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_SEL_OP_FIELD);
340 //0x11C
341 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_SET_SIZE_FROM_MVD_BOOL);
342 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_SET_SIZE_FROM_MVD);
343 //0x11D
344 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_CROP_START_POS_STXY);
345 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_CROP_START_POS);
346 //0x11E
347 UADP_SDT_0_DEF(stTYPE_MVOP_SETCMD_IMAGE_WIDTH_HEIGHT_STWH);
348 UADP_SDT_2_DEF(stTYPE_MVOP_SETCMD_IMAGE_WIDTH_HEIGHT);
349
350 /* Get Command */
351 //0x401
352 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_3DLR_ALT_OUT_BOOL);
353 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_3DLR_ALT_OUT);
354 //0x402
355 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_MIRROR_MODE_BOOL);
356 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_MIRROR_MODE);
357 //0x403
358 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_3DLR_2ND_CFG_BOOL);
359 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_3DLR_2ND_CFG);
360 //0x404
361 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_VSIZE_DUPLICATE_BOOL);
362 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_VSIZE_DUPLICATE);
363 //0x405
364 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_BASE_ADD_BITS_U8);
365 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_BASE_ADD_BITS);
366 //0x406
367 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_TOTAL_MVOP_NUM_U32);
368 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_TOTAL_MVOP_NUM);
369 //0x407
370 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_MAXIMUM_CLK_FRE);
371 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_MAXIMUM_CLK);
372 //0x408
373 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_CURRENT_CLK_FRE);
374 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_CURRENT_CLK);
375 //0x409
376 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_BASE_ADD_MULTI_VIEW_ADD);
377 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_BASE_ADD_MULTI_VIEW);
378 //0x40a
379 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_TOP_FIELD_IMAGE_VSTART_U16);
380 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_TOP_FIELD_IMAGE_VSTART);
381 //0x40b
382 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_BOTTOM_FIELD_IMAGE_VSTART_U16);
383 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_BOTTOM_FIELD_IMAGE_VSTART);
384 //0x40c
385 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_VCOUNT_U16);
386 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_VCOUNT);
387 //0x40d
388 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_HANDSHAKE_MODE_HSMODE);
389 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_HANDSHAKE_MODE);
390 //0x40e
391 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_MAX_FPS_STFPS);
392 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_MAX_FPS);
393 //0x40f
394 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_CROP_FOR_XC_STCROP);
395 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_CROP_FOR_XC);
396 //0x410
397 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_SW_CROP_ADD_STADD);
398 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_SW_CROP_ADD);
399 //0x411
400 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_IS_SW_CROP_BOOL);
401 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_IS_SW_CROP);
402 //0x412
403 //do not support kernel mode for float parameter
404 //0x413,0x414
405 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_INPUT_SELECT);
406 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_INPUT);
407 //0x415
408 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_IS_XC_GEN_TIMING_BOOL);
409 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_IS_XC_GEN_TIMING);
410 //0x416
411 UADP_SDT_0_DEF(stTYPE_MVOP_GETCMD_IS_MVOP_AUTO_GEN_BLACK_BOOL);
412 UADP_SDT_2_DEF(stTYPE_MVOP_GETCMD_IS_MVOP_AUTO_GEN_BLACK);
413
414 //-------------------------------------------------------------------------------------------------
415 // Local Defines
416 //-------------------------------------------------------------------------------------------------
417 #ifdef MSOS_TYPE_LINUX_KERNEL
418 #define CPY_FROM_USER copy_from_user
419 #define CPY_to_USER copy_to_user
420 #else
421 #define CPY_FROM_USER memcpy
422 #define CPY_to_USER memcpy
423 #endif
424
425 //-------------------------------------------------------------------------------------------------
426 // Local Structures
427 //-------------------------------------------------------------------------------------------------
428 #if 0
429 typedef struct
430 {
431 const MSIF_Version *pVersion;
432 } stMVOP_GET_LIBVER_VIR,*pstMVOP_GET_LIBVER_VIR;
433 #endif
434
435 //-------------------------------------------------------------------------------------------------
436 // Local Variables
437 //-------------------------------------------------------------------------------------------------
438
439
440 //-------------------------------------------------------------------------------------------------
441 // Local Functions
442 //-------------------------------------------------------------------------------------------------
443
444
445 //-------------------------------------------------------------------------------------------------
446 // Global Functions
447 //-------------------------------------------------------------------------------------------------
MVOP_adp_Init(FUtopiaIOctl * pIoctl)448 MS_U32 MVOP_adp_Init(FUtopiaIOctl *pIoctl)
449 {
450 UADP_SDT_0(MS_PHY);
451 // drvMVOP.h
452 UADP_SDT_0(MVOP_TileFormat);
453 UADP_SDT_0(MVOP_Timing);
454 UADP_SDT_0(MVOP_DST_DispInfo);
455 UADP_SDT_0(MVOP_TimingInfo_FromRegisters);
456 UADP_SDT_0(MVOP_VidStat);
457 UADP_SDT_0(MVOP_DrvInfo);
458 UADP_SDT_0(MVOP_DrvStatus);
459 UADP_SDT_0(MVOP_Handle);
460
461 UADP_SDT_0(MVOP_BaseAddInput);
462 UADP_SDT_0(MVOP_VC1RangeMapInfo);
463 UADP_SDT_0(MVOP_EVDBaseAddInput);
464 UADP_SDT_0(MVOP_EVDFeature);
465 UADP_SDT_0(MVOP_CapInput);
466 UADP_SDT_0(MVOP_ComdFlag);
467 UADP_SDT_0(MVOP_InputCfg);
468 //UADP_SPT_0NXT(MSIF_Version);
469 UADP_SDT_0(MS_BOOL);
470
471
472 // drvMVOP_v2.h
473 // 0 pointer
474 UADP_SDT_0(stMVOP_ENABLE);
475 UADP_SDT_0(stMVOP_ENABLE_UV_SHIFT);
476 UADP_SDT_0(stMVOP_SET_MONO_MODE);
477 UADP_SDT_0(stMVOP_GET_HSIZE);
478 UADP_SDT_0(stMVOP_GET_VSIZE);
479 UADP_SDT_0(stMVOP_GET_HSTART);
480 UADP_SDT_0(stMVOP_GET_VSTART);
481 UADP_SDT_0(stMVOP_GET_IS_INTERLACE);
482 UADP_SDT_0(stMVOP_GET_IS_HDUPLICATE);
483 UADP_SDT_0(stMVOP_CHECK_CAPABILITY);
484 UADP_SDT_0(stMVOP_GET_MAX_HOFFSET);
485 UADP_SDT_0(stMVOP_GET_MAX_VOFFSET);
486 UADP_SDT_0(stMVOP_SET_DBG_LEVEL);
487 UADP_SDT_1(stMVOP_GET_INFO, UADP_SDT_P2N,pRet, MVOP_DrvInfo);
488 UADP_SDT_0(stMVOP_SET_CLK);
489 UADP_SDT_0(stMVOP_SET_PATTERN);
490 UADP_SDT_0(stMVOP_SET_TILE_FORMAT);
491 UADP_SDT_0(stMVOP_SET_FIXVTT);
492 UADP_SDT_0(stMVOP_SET_MMIO_MAPBASE);
493 UADP_SDT_0(stMVOP_SET_BASEADD);
494 UADP_SDT_0(stMVOP_SEL_OP_FIELD);
495 UADP_SDT_0(stMVOP_SET_REGSIZE_FROM_MVD);
496 UADP_SDT_0(stMVOP_SET_START_POS);
497 UADP_SDT_0(stMVOP_SET_IMAGE_WIDTH_HIGHT);
498 UADP_SDT_0(stMVOP_SET_VOP_MIRROR_MODE);
499 UADP_SDT_0(stMVOP_MIU_SWITCH);
500 UADP_SDT_0(stMVOP_INV_OP_VS);
501 UADP_SDT_0(stMVOP_FORCE_TOP);
502 UADP_SDT_0(stMVOP_ENABLE_FREERUN_MODE);
503 UADP_SDT_2(stMVOP_GET_BASE_ADD , UADP_SDT_P2N , u32YOffset, MS_PHY , UADP_SDT_P2N , u32UVOffset, MS_PHY );
504 UADP_SDT_0(stMVOP_SEND_BLUE_SCREEN);
505 UADP_SDT_0(stMVOP_SET_FREQUENCY);
506 UADP_SDT_0(stMVOP_ENABLE_INTERRUPT);
507 UADP_SDT_0(stMVOP_GET_INT_STATUS);
508 UADP_SDT_0(stMVOP_SET_POWER_STATE);
509
510 UADP_SDT_0(stMVOP_SUB_ENABLE);
511 UADP_SDT_0(stMVOP_SUB_ENABLE_UV_SHIFT);
512 UADP_SDT_0(stMVOP_SUB_SET_MONO_MODE);
513 UADP_SDT_0(stMVOP_SUB_GET_HSIZE);
514 UADP_SDT_0(stMVOP_SUB_GET_VSIZE);
515 UADP_SDT_0(stMVOP_SUB_GET_HSTART);
516 UADP_SDT_0(stMVOP_SUB_GET_VSTART);
517 UADP_SDT_0(stMVOP_SUB_GET_IS_INTERLACE);
518 UADP_SDT_0(stMVOP_SUB_GET_IS_HDUPLICATE);
519 UADP_SDT_0(stMVOP_SUB_CHECK_CAPABILITY);
520 UADP_SDT_0(stMVOP_SUB_GET_MAX_HOFFSET);
521 UADP_SDT_0(stMVOP_SUB_GET_MAX_VOFFSET);
522 UADP_SDT_0(stMVOP_SUB_SET_CLK);
523 UADP_SDT_0(stMVOP_SUB_SET_PATTERN);
524 UADP_SDT_0(stMVOP_SUB_SET_TILE_FORMAT);
525 UADP_SDT_0(stMVOP_SUB_SET_FIXVTT);
526 UADP_SDT_0(stMVOP_SUB_SET_MMIO_MAPBASE);
527 UADP_SDT_0(stMVOP_SUB_MIU_SWITCH);
528 UADP_SDT_0(stMVOP_SUB_SET_BASEADD);
529 UADP_SDT_0(stMVOP_SUB_SET_VOP_MIRROR_MODE);
530 UADP_SDT_0(stMVOP_SUB_ENABLE_FREERUN_MODE);
531 UADP_SDT_2(stMVOP_SUB_GET_BASE_ADD, UADP_SDT_P2N , u32YOffset, MS_PHY , UADP_SDT_P2N , u32UVOffset, MS_PHY );
532 UADP_SDT_0(stMVOP_SUB_ENABLE_INTERRUPT);
533 UADP_SDT_0(stMVOP_SUB_GET_INT_STATUS);
534
535 UADP_SDT_0(stMVOP_EX_INIT);
536 UADP_SDT_0(stMVOP_EX_EXIT);
537 UADP_SDT_0(stMVOP_EX_ENABLE);
538 UADP_SDT_0(stMVOP_EX_SET_CLK);
539 UADP_SDT_0(stMVOP_EX_SET_PATTERN);
540 UADP_SDT_0(stMVOP_EX_SET_TILE_FORMAT);
541 UADP_SDT_0(stMVOP_EX_ENABLE_UV_SHIFT);
542 UADP_SDT_0(stMVOP_EX_ENABLE_BLACK_BG);
543 UADP_SDT_0(stMVOP_EX_SET_MONO_MODE);
544 UADP_SDT_0(stMVOP_EX_SET_FIXVTT);
545 UADP_SDT_0(stMVOP_EX_MIU_SWITCH);
546 UADP_SDT_0(stMVOP_EX_SET_VOP_MIRROR_MODE);
547 UADP_SDT_0(stMVOP_EX_ENABLE_FREERUN_MODE);
548 UADP_SDT_0(stMVOP_EX_SET_CLK);
549 UADP_SDT_0(stMVOP_EX_GET_HSIZE);
550 UADP_SDT_0(stMVOP_EX_GET_VSIZE);
551 UADP_SDT_0(stMVOP_EX_GET_HSTART);
552 UADP_SDT_0(stMVOP_EX_GET_VSTART);
553 UADP_SDT_0(stMVOP_EX_GET_IS_INTERLACE);
554 UADP_SDT_0(stMVOP_EX_GET_IS_HDUPLICATE);
555 UADP_SDT_0(stMVOP_EX_CHECK_CAPABILITY);
556 UADP_SDT_1(stMVOP_EX_GET_DST_INFO ,UADP_SDT_P2N , pDstInfo, MVOP_DST_DispInfo);
557 UADP_SDT_0(stMVOP_EX_ENABLE_INTERRUPT);
558 UADP_SDT_0(stMVOP_EX_GET_INT_STATUS);
559 // 1 pointer
560 UADP_SDT_1(stMVOP_SET_INPUTCFG, UADP_SDT_P2N, pCfg, MVOP_InputCfg);
561 UADP_SDT_1(stMVOP_SET_OTPUTCFG, UADP_SDT_P2N, pstVideoStatus, MVOP_VidStat);
562 UADP_SDT_1(stMVOP_GET_IS_ENABLE, UADP_SDT_P2N, pbEnable, MS_BOOL);
563 UADP_SDT_1(stMVOP_GET_OUTPUT_TIMING, UADP_SDT_P2N, pMVOPTiming, MVOP_Timing);
564 //UADP_SPT_1NXT(stMVOP_GET_LIBVER_VIR, pVersion, MSIF_Version);
565 //UADP_SPT_1NXT(stMVOP_GET_LIBVER, ppVersion, stMVOP_GET_LIBVER_VIR); //double pointer **
566 UADP_SDT_1(stMVOP_GET_STATUS, UADP_SDT_P2N, pMVOPStat, MVOP_DrvStatus);
567 UADP_SDT_1(stMVOP_GET_DST_INFO, UADP_SDT_P2N, pDstInfo, MVOP_DST_DispInfo);
568
569 UADP_SDT_1(stMVOP_SUB_SET_INPUTCFG, UADP_SDT_P2N, pCfg, MVOP_InputCfg);
570 UADP_SDT_1(stMVOP_SUB_SET_OTPUTCFG, UADP_SDT_P2N, pstVideoStatus, MVOP_VidStat);
571 UADP_SDT_1(stMVOP_SUB_GET_STATUS, UADP_SDT_P2N, pMVOPStat, MVOP_DrvStatus);
572 UADP_SDT_1(stMVOP_SUB_GET_IS_ENABLE, UADP_SDT_P2N, pbEnable, MS_BOOL);
573 UADP_SDT_1(stMVOP_SUB_GET_OUTPUT_TIMING, UADP_SDT_P2N, pMVOPTiming, MVOP_Timing);
574 UADP_SDT_1(stMVOP_SUB_GET_DST_INFO, UADP_SDT_P2N, pDstInfo, MVOP_DST_DispInfo);
575
576 UADP_SDT_1(stMVOP_EX_SET_INPUTCFG, UADP_SDT_P2N, pCfg, MVOP_InputCfg);
577 UADP_SDT_1(stMVOP_EX_SET_OTPUTCFG, UADP_SDT_P2N, pstVideoStatus, MVOP_VidStat);
578 UADP_SDT_1(stMVOP_EX_GET_OUTPUT_TIMING, UADP_SDT_P2N, pMVOPTiming, MVOP_Timing);
579 UADP_SDT_1(stMVOP_EX_GET_IS_ENABLE, UADP_SDT_P2N, pbEnable, MS_BOOL);
580 UADP_SDT_1(stMVOP_EX_GET_STATUS, UADP_SDT_P2N, pMVOPStat, MVOP_DrvStatus);
581
582 // 2 pointers
583 //UADP_SDT_2NXT(stMVOP_SET_COMMAND, stHd, MVOP_Handle, pPara, void);
584 //UADP_SDT_2NXT(stMVOP_GET_COMMAND, stHd, MVOP_Handle, pPara, void);
585
586 /* Set Command */
587 //0x101
588 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_VSIZE_MIN_BOOL,MS_BOOL);
589 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_VSIZE_MIN,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_VSIZE_MIN_BOOL);
590 //0x102
591 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_STB_FD_MASK_CLR_BOOL,MS_BOOL);
592 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_STB_FD_MASK_CLR,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_STB_FD_MASK_CLR_BOOL);
593 //0x103
594 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_3DLR_INST_VBLANK_U16,MS_U16);
595 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_3DLR_INST_VBLANK,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_3DLR_INST_VBLANK_U16);
596 //0x104
597 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_3DLR_ALT_OUT_BOOL,MS_BOOL);
598 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_3DLR_ALT_OUT,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_3DLR_ALT_OUT_BOOL);
599 //0x105
600 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_RGB_FMT_RGB,MVOP_RgbFormat);
601 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_RGB_FMT,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_RGB_FMT_RGB);
602 //0x106
603 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_ENABLE_BOOL,MS_BOOL);
604 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_ENABLE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_ENABLE_BOOL);
605 //0x107
606 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_DSIABLE_VOID,void); //check
607 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_DSIABLE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_DSIABLE_VOID);
608 //0x108
609 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_3DLR_2ND_CFG_BOOL,MS_BOOL);
610 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_3DLR_2ND_CFG,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_3DLR_2ND_CFG_BOOL);
611 //0x109
612 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_VSIZE_DUPLICATE_BOOL,MS_BOOL);
613 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_VSIZE_DUPLICATE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_VSIZE_DUPLICATE_BOOL);
614 //0x10a
615 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_3DLR_ALT_OUT_SBS_BOOL,MS_BOOL);
616 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_3DLR_ALT_OUT_SBS,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_3DLR_ALT_OUT_SBS_BOOL);
617 //0x10b
618 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_FIELD_DUPLICATE_RPTFLD,MVOP_RptFldMode);
619 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_FIELD_DUPLICATE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_FIELD_DUPLICATE_RPTFLD);
620 //0x10c
621 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_VSYNC_MODE_U8,MS_U8);
622 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_VSYNC_MODE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_VSYNC_MODE_U8);
623 //0x10d
624 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_VSIZE_X4_DUPLICATE_BOOL,MS_BOOL);
625 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_VSIZE_X4_DUPLICATE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_VSIZE_X4_DUPLICATE_BOOL);
626 //0x10e
627 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_HSIZE_X4_DUPLICATE_BOOL,MS_BOOL);
628 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_HSIZE_X4_DUPLICATE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_HSIZE_X4_DUPLICATE_BOOL);
629 //0x10f
630 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_BASE_ADD_MULTI_VIEW_ADDIN,MVOP_BaseAddInput);
631 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_BASE_ADD_MULTI_VIEW,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_BASE_ADD_MULTI_VIEW_ADDIN);
632 //0x110
633 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_FIRE_MVOP_BOOL,MS_BOOL);
634 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_FIRE_MVOP,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_FIRE_MVOP_BOOL);
635 //0x111
636 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_VC1_RANGE_MAP_VC1,MVOP_VC1RangeMapInfo);
637 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_VC1_RANGE_MAP,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_VC1_RANGE_MAP_VC1);
638 //0x112
639 //UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_POWER_STATE_VOID,void);
640 //UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_POWER_STATE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_POWER_STATE_VOID);
641 //0x113
642 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_420_BW_SAVING_MODE_BOOL,MS_BOOL);
643 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_420_BW_SAVING_MODE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_420_BW_SAVING_MODE_BOOL);
644 //0x114
645 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_EVD_BASE_ADD_EVDADD,MVOP_EVDBaseAddInput);
646 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_EVD_BASE_ADD,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_EVD_BASE_ADD_EVDADD);
647 //0x115
648 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_EVD_FEATURE_EVDFT,MVOP_EVDFeature);
649 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_EVD_FEATURE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_EVD_FEATURE_EVDFT);
650 //0x116
651 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_MVD_LATE_REPEAT_BOOL,MS_BOOL);
652 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_MVD_LATE_REPEAT,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_MVD_LATE_REPEAT_BOOL);
653 //0x117
654 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_SET_HANDSHAKE_MODE_BOOL,MS_BOOL);
655 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_SET_HANDSHAKE_MODE,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_SET_HANDSHAKE_MODE_BOOL);
656 //0x118
657 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_FRC_OUTPUT_U32,MS_U32);
658 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_FRC_OUTPUT,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_FRC_OUTPUT_U32);
659 //0x119
660 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_XC_GEN_TIMING_BOOL,MS_BOOL);
661 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_XC_GEN_TIMING,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_XC_GEN_TIMING_BOOL);
662 //0x11A
663 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_RESET_SETTING_VOID,void);
664 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_RESET_SETTING,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_RESET_SETTING_VOID);
665 //0x11B
666 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_SEL_OP_FIELD_BOOL,MS_BOOL);
667 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_SEL_OP_FIELD,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_SEL_OP_FIELD_BOOL);
668 //0x11C
669 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_SET_SIZE_FROM_MVD_BOOL,MS_BOOL);
670 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_SET_SIZE_FROM_MVD,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_SET_SIZE_FROM_MVD_BOOL);
671 //0x11D
672 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_CROP_START_POS_STXY,MVOP_SetCropPos);
673 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_CROP_START_POS,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_CROP_START_POS_STXY);
674 //0x11E
675 UADP_SDT_NAME0(stTYPE_MVOP_SETCMD_IMAGE_WIDTH_HEIGHT_STWH,MVOP_SetImageWH);
676 UADP_SDT_NAME2(stTYPE_MVOP_SETCMD_IMAGE_WIDTH_HEIGHT,stMVOP_SET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_SETCMD_IMAGE_WIDTH_HEIGHT_STWH);
677
678
679 /* Get Command */
680 //0x401
681 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_3DLR_ALT_OUT_BOOL,MS_BOOL);
682 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_3DLR_ALT_OUT,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_3DLR_ALT_OUT_BOOL);
683 //0x402
684 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_MIRROR_MODE_BOOL,MS_BOOL);
685 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_MIRROR_MODE,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_MIRROR_MODE_BOOL);
686 //0x403
687 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_3DLR_2ND_CFG_BOOL,MS_BOOL);
688 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_3DLR_2ND_CFG,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_3DLR_2ND_CFG_BOOL);
689 //0x404
690 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_VSIZE_DUPLICATE_BOOL,MS_BOOL);
691 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_VSIZE_DUPLICATE,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_VSIZE_DUPLICATE_BOOL);
692 //0x405
693 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_BASE_ADD_BITS_U8,MS_U8);
694 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_BASE_ADD_BITS,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_BASE_ADD_BITS_U8);
695 //0x406
696 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_TOTAL_MVOP_NUM_U32,MS_U32);
697 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_TOTAL_MVOP_NUM,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_TOTAL_MVOP_NUM_U32);
698 //0x407
699 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_MAXIMUM_CLK_FRE,MVOP_FREQUENCY); //check
700 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_MAXIMUM_CLK,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_MAXIMUM_CLK_FRE);
701 //0x408
702 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_CURRENT_CLK_FRE,MVOP_FREQUENCY);
703 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_CURRENT_CLK,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_CURRENT_CLK_FRE);
704 //0x409
705 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_BASE_ADD_MULTI_VIEW_ADD,MVOP_BaseAddInput);
706 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_BASE_ADD_MULTI_VIEW,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_BASE_ADD_MULTI_VIEW_ADD);
707 //0x40a
708 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_TOP_FIELD_IMAGE_VSTART_U16,MS_U16);
709 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_TOP_FIELD_IMAGE_VSTART,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_TOP_FIELD_IMAGE_VSTART_U16);
710 //0x40b
711 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_BOTTOM_FIELD_IMAGE_VSTART_U16,MS_U16);
712 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_BOTTOM_FIELD_IMAGE_VSTART,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_BOTTOM_FIELD_IMAGE_VSTART_U16);
713 //0x40c
714 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_VCOUNT_U16,MS_U16);
715 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_VCOUNT,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_VCOUNT_U16);
716
717 //0x40f
718 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_INPUT_SELECT,MVOP_InputSel);
719 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_INPUT,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_INPUT_SELECT);
720 //0x40d
721 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_HANDSHAKE_MODE_HSMODE,MVOP_HSMode);
722 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_HANDSHAKE_MODE,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_HANDSHAKE_MODE_HSMODE);
723 //0x40e
724 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_MAX_FPS_STFPS,MVOP_GetMaxFps);
725 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_MAX_FPS,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_MAX_FPS_STFPS);
726 //0x40f
727 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_CROP_FOR_XC_STCROP,MVOP_XCGetCrop);
728 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_CROP_FOR_XC,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_CROP_FOR_XC_STCROP);
729 //0x410
730 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_SW_CROP_ADD_STADD,MVOP_XCGetCropMirAdd);
731 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_SW_CROP_ADD,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_SW_CROP_ADD_STADD);
732 //0x411
733 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_IS_SW_CROP_BOOL,MS_BOOL);
734 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_IS_SW_CROP,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_IS_SW_CROP_BOOL);
735 //0x412
736 //E_MVOP_CMD_GET_OUTPUT_HV_RATIO not support kernel mode for float parameter.
737 //0x413,0x414
738 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_INPUT_SELECT,MVOP_InputSel);
739 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_INPUT,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_INPUT_SELECT);
740 //0x415
741 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_IS_XC_GEN_TIMING_BOOL,MS_BOOL);
742 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_IS_XC_GEN_TIMING,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_IS_XC_GEN_TIMING_BOOL);
743 //0x416
744 UADP_SDT_NAME0(stTYPE_MVOP_GETCMD_IS_MVOP_AUTO_GEN_BLACK_BOOL,MS_BOOL);
745 UADP_SDT_NAME2(stTYPE_MVOP_GETCMD_IS_MVOP_AUTO_GEN_BLACK,stMVOP_GET_COMMAND,UADP_SDT_P2N,stHd,MVOP_Handle,UADP_SDT_P2N,pPara,stTYPE_MVOP_GETCMD_IS_MVOP_AUTO_GEN_BLACK_BOOL);
746 *pIoctl= (FUtopiaIOctl)MVOP_adp_Ioctl;
747 return 0;
748 }
749
MVOP_adp_Ioctl(void * pInstanceTmp,MS_U32 u32Cmd,void * const pArgs)750 MS_U32 MVOP_adp_Ioctl(void* pInstanceTmp, MS_U32 u32Cmd, void* const pArgs)
751 {
752 MS_U32 u32Ret=0;
753 char buffer_arg[2048];
754
755 printk("\033[1;36m[%s][Debug] 0x%x eCmd = %d \033[m\n",__FUNCTION__,__LINE__,u32Cmd);
756
757 switch(u32Cmd)
758 {
759 // Main MVOP
760 // Basic Command
761 case E_MVOP_CMD_INIT:
762 case E_MVOP_CMD_EXIT:
763 case E_MVOP_CMD_ENABLE_BLACK_BG:
764 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, NULL, buffer_arg,sizeof(buffer_arg));
765 break;
766 case E_MVOP_CMD_ENABLE:
767 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_ENABLE, NULL, buffer_arg,sizeof(buffer_arg));
768 break;
769 case E_MVOP_CMD_SET_INPUTCFG:
770 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_SET_INPUTCFG, spt_stMVOP_SET_INPUTCFG, buffer_arg,sizeof(buffer_arg));
771 break;
772 case E_MVOP_CMD_SET_OTPUTCFG:
773 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_SET_OTPUTCFG, spt_stMVOP_SET_OTPUTCFG, buffer_arg,sizeof(buffer_arg));
774 break;
775 case E_MVOP_CMD_ENABLE_UV_SHIFT:
776 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_ENABLE_UV_SHIFT, NULL,buffer_arg,sizeof(buffer_arg));
777 break;
778 case E_MVOP_CMD_SET_MONO_MODE:
779 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_SET_MONO_MODE, NULL,buffer_arg,sizeof(buffer_arg));
780 break;
781 // Get Command
782 case E_MVOP_CMD_GET_HSIZE:
783 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_GET_HSIZE, buffer_arg,sizeof(buffer_arg));
784 break;
785 case E_MVOP_CMD_GET_VSIZE:
786 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_GET_VSIZE, buffer_arg,sizeof(buffer_arg));
787 break;
788 case E_MVOP_CMD_GET_HSTART:
789 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_GET_HSTART, buffer_arg,sizeof(buffer_arg));
790 break;
791 case E_MVOP_CMD_GET_VSTART:
792 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_GET_VSTART, buffer_arg,sizeof(buffer_arg));
793 break;
794 case E_MVOP_CMD_GET_IS_INTERLACE:
795 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_GET_IS_INTERLACE, buffer_arg,sizeof(buffer_arg));
796 break;
797 case E_MVOP_CMD_GET_IS_HDUPLICATE:
798 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_GET_IS_HDUPLICATE,buffer_arg,sizeof(buffer_arg));
799 break;
800 case E_MVOP_CMD_GET_IS_ENABLE:
801 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_GET_IS_ENABLE, spt_stMVOP_GET_IS_ENABLE,buffer_arg,sizeof(buffer_arg));
802 break;
803 case E_MVOP_CMD_GET_OUTPUT_TIMING:
804 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_GET_OUTPUT_TIMING, spt_stMVOP_GET_OUTPUT_TIMING, buffer_arg,sizeof(buffer_arg));
805 break;
806 case E_MVOP_CMD_GET_LIBVER:
807 break;
808 case E_MVOP_CMD_CHECK_CAPABILITY:
809 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_CHECK_CAPABILITY, spt_stMVOP_CHECK_CAPABILITY, buffer_arg,sizeof(buffer_arg));
810 break;
811 case E_MVOP_CMD_GET_MAX_HOFFSET:
812 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_GET_MAX_HOFFSET, spt_stMVOP_GET_MAX_HOFFSET, buffer_arg,sizeof(buffer_arg));
813 break;
814 case E_MVOP_CMD_GET_MAX_VOFFSET:
815 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_GET_MAX_VOFFSET, spt_stMVOP_GET_MAX_VOFFSET, buffer_arg,sizeof(buffer_arg));
816 break;
817 case E_MVOP_CMD_GET_INFO:
818 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_GET_INFO, spt_stMVOP_GET_INFO, buffer_arg,sizeof(buffer_arg));
819 break;
820 case E_MVOP_CMD_GET_STATUS:
821 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_GET_STATUS, spt_stMVOP_GET_STATUS,buffer_arg,sizeof(buffer_arg));
822 break;
823 case E_MVOP_CMD_GET_DST_INFO:
824 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_GET_DST_INFO, spt_stMVOP_GET_DST_INFO, buffer_arg,sizeof(buffer_arg));
825 break;
826 case E_MVOP_CMD_GET_BASE_ADD:
827 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_GET_BASE_ADD, spt_stMVOP_GET_BASE_ADD, buffer_arg,sizeof(buffer_arg));
828 break;
829 case E_MVOP_CMD_GET_INT_STATUS:
830 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_GET_INT_STATUS, spt_stMVOP_GET_INT_STATUS,buffer_arg,sizeof(buffer_arg));
831 break;
832 // Set Command
833 case E_MVOP_CMD_SET_DBG_LEVEL:
834 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_DBG_LEVEL, NULL, buffer_arg,sizeof(buffer_arg));
835 break;
836 case E_MVOP_CMD_SET_CLK:
837 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_CLK, NULL,buffer_arg,sizeof(buffer_arg));
838 break;
839 case E_MVOP_CMD_SET_PATTERN:
840 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_PATTERN, NULL, buffer_arg,sizeof(buffer_arg));
841 break;
842 case E_MVOP_CMD_SET_TILE_FORMAT:
843 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_TILE_FORMAT, spt_stMVOP_SET_TILE_FORMAT, buffer_arg,sizeof(buffer_arg));
844 break;
845 case E_MVOP_CMD_SET_FIXVTT:
846 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_FIXVTT, spt_stMVOP_SET_FIXVTT, buffer_arg,sizeof(buffer_arg));
847 break;
848 case E_MVOP_CMD_SET_MMIO_MAPBASE:
849 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_SET_MMIO_MAPBASE,buffer_arg,sizeof(buffer_arg));
850 break;
851 case E_MVOP_CMD_SET_BASEADD:
852 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_BASEADD, spt_stMVOP_SET_BASEADD, buffer_arg,sizeof(buffer_arg));
853 break;
854 case E_MVOP_CMD_SEL_OP_FIELD:
855 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SEL_OP_FIELD, NULL, buffer_arg,sizeof(buffer_arg));
856 break;
857 case E_MVOP_CMD_SET_REGSIZE_FROM_MVD:
858 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_REGSIZE_FROM_MVD, NULL, buffer_arg,sizeof(buffer_arg));
859 break;
860 case E_MVOP_CMD_SET_START_POS:
861 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_START_POS, NULL, buffer_arg,sizeof(buffer_arg));
862 break;
863 case E_MVOP_CMD_SET_IMAGE_WIDTH_HIGHT:
864 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_IMAGE_WIDTH_HIGHT, spt_stMVOP_SET_IMAGE_WIDTH_HIGHT, buffer_arg,sizeof(buffer_arg));
865 break;
866 case E_MVOP_CMD_SET_VOP_MIRROR_MODE:
867 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_VOP_MIRROR_MODE, NULL, buffer_arg,sizeof(buffer_arg));
868 break;
869 // Others
870 case E_MVOP_CMD_MIU_SWITCH:
871 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_MIU_SWITCH, spt_stMVOP_MIU_SWITCH,buffer_arg,sizeof(buffer_arg));
872 break;
873 case E_MVOP_CMD_INV_OP_VS:
874 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_INV_OP_VS, NULL,buffer_arg,sizeof(buffer_arg));
875 break;
876 case E_MVOP_CMD_FORCE_TOP:
877 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_FORCE_TOP, NULL,buffer_arg,sizeof(buffer_arg));
878 break;
879 case E_MVOP_CMD_ENABLE_FREERUN_MODE:
880 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_ENABLE_FREERUN_MODE, spt_stMVOP_ENABLE_FREERUN_MODE, buffer_arg,sizeof(buffer_arg));
881 break;
882 case E_MVOP_CMD_SEND_BLUE_SCREEN:
883 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SEND_BLUE_SCREEN, spt_stMVOP_SEND_BLUE_SCREEN, buffer_arg,sizeof(buffer_arg));
884 break;
885 case E_MVOP_CMD_SET_POWERSTATE:
886 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_POWER_STATE, spt_stMVOP_SET_POWER_STATE,buffer_arg,sizeof(buffer_arg));
887 break;
888 case E_MVOP_CMD_SET_COMMAND:
889 {
890 stMVOP_SET_COMMAND ptr;
891 if(CPY_FROM_USER(&ptr, (stMVOP_SET_COMMAND __user *)pArgs, sizeof(stMVOP_SET_COMMAND)))
892 {
893 return UTOPIA_STATUS_FAIL;
894 }
895 switch(ptr.eCmd)
896 {
897 case E_MVOP_CMD_SET_VSIZE_MIN:
898 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_VSIZE_MIN, spt_stTYPE_MVOP_SETCMD_VSIZE_MIN,buffer_arg,sizeof(buffer_arg));
899 break;
900 case E_MVOP_CMD_SET_STB_FD_MASK_CLR:
901 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_STB_FD_MASK_CLR, spt_stTYPE_MVOP_SETCMD_STB_FD_MASK_CLR,buffer_arg,sizeof(buffer_arg));
902 break;
903 case E_MVOP_CMD_SET_3DLR_INST_VBLANK:
904 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_3DLR_INST_VBLANK, spt_stTYPE_MVOP_SETCMD_3DLR_INST_VBLANK,buffer_arg,sizeof(buffer_arg));
905 break;
906 case E_MVOP_CMD_SET_3DLR_ALT_OUT:
907 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_3DLR_ALT_OUT, spt_stTYPE_MVOP_SETCMD_3DLR_ALT_OUT,buffer_arg,sizeof(buffer_arg));
908 break;
909 case E_MVOP_CMD_SET_RGB_FMT:
910 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_RGB_FMT, spt_stTYPE_MVOP_SETCMD_RGB_FMT,buffer_arg,sizeof(buffer_arg));
911 break;
912 case E_MVOP_CMD_SET_SW_CTRL_FIELD_ENABLE:
913 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_ENABLE, spt_stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_ENABLE,buffer_arg,sizeof(buffer_arg));
914 break;
915 case E_MVOP_CMD_SET_SW_CTRL_FIELD_DSIABLE:
916 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_DSIABLE, spt_stTYPE_MVOP_SETCMD_SW_CTRL_FIELD_DSIABLE,buffer_arg,sizeof(buffer_arg));
917 break;
918 case E_MVOP_CMD_SET_3DLR_2ND_CFG:
919 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_3DLR_2ND_CFG, spt_stTYPE_MVOP_SETCMD_3DLR_2ND_CFG,buffer_arg,sizeof(buffer_arg));
920 break;
921 case E_MVOP_CMD_SET_VSIZE_DUPLICATE:
922 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_VSIZE_DUPLICATE, spt_stTYPE_MVOP_SETCMD_VSIZE_DUPLICATE,buffer_arg,sizeof(buffer_arg));
923 break;
924 case E_MVOP_CMD_SET_3DLR_ALT_OUT_SBS:
925 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_3DLR_ALT_OUT_SBS, spt_stTYPE_MVOP_SETCMD_3DLR_ALT_OUT_SBS,buffer_arg,sizeof(buffer_arg));
926 break;
927 case E_MVOP_CMD_SET_FIELD_DUPLICATE:
928 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_FIELD_DUPLICATE, spt_stTYPE_MVOP_SETCMD_FIELD_DUPLICATE,buffer_arg,sizeof(buffer_arg));
929 break;
930 case E_MVOP_CMD_SET_VSYNC_MODE:
931 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_VSYNC_MODE, spt_stTYPE_MVOP_SETCMD_VSYNC_MODE,buffer_arg,sizeof(buffer_arg));
932 break;
933 case E_MVOP_CMD_SET_VSIZE_X4_DUPLICATE:
934 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_VSIZE_X4_DUPLICATE, spt_stTYPE_MVOP_SETCMD_VSIZE_X4_DUPLICATE,buffer_arg,sizeof(buffer_arg));
935 break;
936 case E_MVOP_CMD_SET_HSIZE_X4_DUPLICATE:
937 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_HSIZE_X4_DUPLICATE, spt_stTYPE_MVOP_SETCMD_HSIZE_X4_DUPLICATE,buffer_arg,sizeof(buffer_arg));
938 break;
939 case E_MVOP_CMD_SET_BASE_ADD_MULTI_VIEW:
940 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_BASE_ADD_MULTI_VIEW, spt_stTYPE_MVOP_SETCMD_BASE_ADD_MULTI_VIEW,buffer_arg,sizeof(buffer_arg));
941 break;
942 case E_MVOP_CMD_SET_FIRE_MVOP:
943 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_FIRE_MVOP, spt_stTYPE_MVOP_SETCMD_FIRE_MVOP,buffer_arg,sizeof(buffer_arg));
944 break;
945 case E_MVOP_CMD_SET_VC1_RANGE_MAP:
946 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_VC1_RANGE_MAP, spt_stTYPE_MVOP_SETCMD_VC1_RANGE_MAP,buffer_arg,sizeof(buffer_arg));
947 break;
948 //case E_MVOP_CMD_SET_POWERSTATE:
949 //u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_POWER_STATE, spt_stTYPE_MVOP_SETCMD_POWER_STATE,buffer_arg,sizeof(buffer_arg));
950 //break;
951 case E_MVOP_CMD_SET_420_BW_SAVING_MODE:
952 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_420_BW_SAVING_MODE, spt_stTYPE_MVOP_SETCMD_420_BW_SAVING_MODE,buffer_arg,sizeof(buffer_arg));
953 break;
954 case E_MVOP_CMD_SET_EVD_BASE_ADD:
955 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_EVD_BASE_ADD, spt_stTYPE_MVOP_SETCMD_EVD_BASE_ADD,buffer_arg,sizeof(buffer_arg));
956 break;
957 case E_MVOP_CMD_SET_EVD_FEATURE:
958 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_EVD_FEATURE, spt_stTYPE_MVOP_SETCMD_EVD_FEATURE,buffer_arg,sizeof(buffer_arg));
959 break;
960 case E_MVOP_CMD_SET_MVD_LATE_REPEAT:
961 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_MVD_LATE_REPEAT, spt_stTYPE_MVOP_SETCMD_MVD_LATE_REPEAT,buffer_arg,sizeof(buffer_arg));
962 break;
963 case E_MVOP_CMD_SET_HANDSHAKE_MODE:
964 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_SET_HANDSHAKE_MODE, spt_stTYPE_MVOP_SETCMD_SET_HANDSHAKE_MODE,buffer_arg,sizeof(buffer_arg));
965 break;
966 case E_MVOP_CMD_SET_FRC_OUTPUT:
967 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_FRC_OUTPUT, spt_stTYPE_MVOP_SETCMD_FRC_OUTPUT,buffer_arg,sizeof(buffer_arg));
968 break;
969 case E_MVOP_CMD_SET_XC_GEN_TIMING:
970 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_XC_GEN_TIMING, spt_stTYPE_MVOP_SETCMD_XC_GEN_TIMING,buffer_arg,sizeof(buffer_arg));
971 break;
972 case E_MVOP_CMD_SET_RESET_SETTING:
973 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_RESET_SETTING, spt_stTYPE_MVOP_SETCMD_RESET_SETTING,buffer_arg,sizeof(buffer_arg));
974 break;
975 case E_MVOP_CMD_SET_SEL_OP_FIELD:
976 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_SEL_OP_FIELD, spt_stTYPE_MVOP_SETCMD_SEL_OP_FIELD,buffer_arg,sizeof(buffer_arg));
977 break;
978 case E_MVOP_CMD_SET_SIZE_FROM_MVD:
979 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_SET_SIZE_FROM_MVD, spt_stTYPE_MVOP_SETCMD_SET_SIZE_FROM_MVD,buffer_arg,sizeof(buffer_arg));
980 break;
981 case E_MVOP_CMD_SET_CROP_START_POS:
982 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_CROP_START_POS, spt_stTYPE_MVOP_SETCMD_CROP_START_POS,buffer_arg,sizeof(buffer_arg));
983 break;
984 case E_MVOP_CMD_SET_IMAGE_WIDTH_HEIGHT:
985 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_SETCMD_IMAGE_WIDTH_HEIGHT, spt_stTYPE_MVOP_SETCMD_IMAGE_WIDTH_HEIGHT,buffer_arg,sizeof(buffer_arg));
986 break;
987 default:
988 break;
989 }
990 }
991 break;
992 case E_MVOP_CMD_GET_COMMAND:
993 {
994 stMVOP_GET_COMMAND ptr;
995 if(CPY_FROM_USER(&ptr, (stMVOP_GET_COMMAND __user *)pArgs, sizeof(stMVOP_GET_COMMAND)))
996 {
997 return UTOPIA_STATUS_FAIL;
998 }
999 switch(ptr.eCmd)
1000 {
1001 case E_MVOP_CMD_GET_3DLR_ALT_OUT:
1002 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_3DLR_ALT_OUT, spt_stTYPE_MVOP_GETCMD_3DLR_ALT_OUT,buffer_arg,sizeof(buffer_arg));
1003 break;
1004 case E_MVOP_CMD_GET_MIRROR_MODE:
1005 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_MIRROR_MODE, spt_stTYPE_MVOP_GETCMD_MIRROR_MODE,buffer_arg,sizeof(buffer_arg));
1006 break;
1007 case E_MVOP_CMD_GET_3DLR_2ND_CFG:
1008 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_3DLR_2ND_CFG, spt_stTYPE_MVOP_GETCMD_3DLR_2ND_CFG,buffer_arg,sizeof(buffer_arg));
1009 break;
1010 case E_MVOP_CMD_GET_VSIZE_DUPLICATE:
1011 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_VSIZE_DUPLICATE, spt_stTYPE_MVOP_GETCMD_VSIZE_DUPLICATE,buffer_arg,sizeof(buffer_arg));
1012 break;
1013 case E_MVOP_CMD_GET_BASE_ADD_BITS:
1014 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_BASE_ADD_BITS, spt_stTYPE_MVOP_GETCMD_BASE_ADD_BITS,buffer_arg,sizeof(buffer_arg));
1015 break;
1016 case E_MVOP_CMD_GET_TOTAL_MVOP_NUM:
1017 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_TOTAL_MVOP_NUM, spt_stTYPE_MVOP_GETCMD_TOTAL_MVOP_NUM,buffer_arg,sizeof(buffer_arg));
1018 break;
1019 case E_MVOP_CMD_GET_MAXIMUM_CLK:
1020 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_MAXIMUM_CLK, spt_stTYPE_MVOP_GETCMD_MAXIMUM_CLK,buffer_arg,sizeof(buffer_arg));
1021 break;
1022 case E_MVOP_CMD_GET_CURRENT_CLK:
1023 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_CURRENT_CLK, spt_stTYPE_MVOP_GETCMD_CURRENT_CLK,buffer_arg,sizeof(buffer_arg));
1024 break;
1025 case E_MVOP_CMD_GET_BASE_ADD_MULTI_VIEW:
1026 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_BASE_ADD_MULTI_VIEW, spt_stTYPE_MVOP_GETCMD_BASE_ADD_MULTI_VIEW,buffer_arg,sizeof(buffer_arg));
1027 break;
1028 case E_MVOP_CMD_GET_TOP_FIELD_IMAGE_VSTART:
1029 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_TOP_FIELD_IMAGE_VSTART, spt_stTYPE_MVOP_GETCMD_TOP_FIELD_IMAGE_VSTART,buffer_arg,sizeof(buffer_arg));
1030 break;
1031 case E_MVOP_CMD_GET_BOTTOM_FIELD_IMAGE_VSTART:
1032 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_BOTTOM_FIELD_IMAGE_VSTART, spt_stTYPE_MVOP_GETCMD_BOTTOM_FIELD_IMAGE_VSTART,buffer_arg,sizeof(buffer_arg));
1033 break;
1034 case E_MVOP_CMD_GET_VCOUNT:
1035 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_VCOUNT, spt_stTYPE_MVOP_GETCMD_VCOUNT,buffer_arg,sizeof(buffer_arg));
1036 break;
1037 case E_MVOP_CMD_GET_HANDSHAKE_MODE:
1038 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_HANDSHAKE_MODE, spt_stTYPE_MVOP_GETCMD_HANDSHAKE_MODE,buffer_arg,sizeof(buffer_arg));
1039 break;
1040 case E_MVOP_CMD_GET_MAX_FPS:
1041 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_MAX_FPS, spt_stTYPE_MVOP_GETCMD_MAX_FPS,buffer_arg,sizeof(buffer_arg));
1042 break;
1043 case E_MVOP_CMD_GET_CROP_FOR_XC:
1044 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_CROP_FOR_XC, spt_stTYPE_MVOP_GETCMD_CROP_FOR_XC,buffer_arg,sizeof(buffer_arg));
1045 break;
1046 case E_MVOP_CMD_GET_MVOP_SW_CROP_ADD:
1047 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_SW_CROP_ADD, spt_stTYPE_MVOP_GETCMD_SW_CROP_ADD,buffer_arg,sizeof(buffer_arg));
1048 break;
1049 case E_MVOP_CMD_GET_IS_SW_CROP:
1050 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_IS_SW_CROP, spt_stTYPE_MVOP_GETCMD_IS_SW_CROP,buffer_arg,sizeof(buffer_arg));
1051 break;
1052 case E_MVOP_CMD_GET_OUTPUT_HV_RATIO:
1053 //u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, stTYPE_MVOP_GETCMD_HANDSHAKE_MODE, stTYPE_MVOP_GETCMD_HANDSHAKE_MODE,buffer_arg,sizeof(buffer_arg));
1054 printk("[Warning] kernel mode do not support E_MVOP_CMD_GET_OUTPUT_HV_RATIO\n");
1055 break;
1056 case E_MVOP_CMD_GET_INPUT:
1057 case E_MVOP_CMD_GET_SUB_INPUT:
1058 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_INPUT, spt_stTYPE_MVOP_GETCMD_INPUT,buffer_arg,sizeof(buffer_arg));
1059 break;
1060 case E_MVOP_CMD_GET_IS_XC_GEN_TIMING:
1061 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_IS_XC_GEN_TIMING, spt_stTYPE_MVOP_GETCMD_IS_XC_GEN_TIMING,buffer_arg,sizeof(buffer_arg));
1062 break;
1063 case E_MVOP_CMD_GET_IS_MVOP_AUTO_GEN_BLACK:
1064 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stTYPE_MVOP_GETCMD_IS_MVOP_AUTO_GEN_BLACK, spt_stTYPE_MVOP_GETCMD_IS_MVOP_AUTO_GEN_BLACK,buffer_arg,sizeof(buffer_arg));
1065 break;
1066 default:
1067 break;
1068 }
1069 }
1070 break;
1071 case E_MVOP_CMD_SET_FREQUENCY:
1072 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SET_FREQUENCY, NULL,buffer_arg,sizeof(buffer_arg));
1073 break;
1074 case E_MVOP_CMD_ENABLE_INTERRUPT:
1075 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_ENABLE_INTERRUPT, spt_stMVOP_ENABLE_INTERRUPT,buffer_arg,sizeof(buffer_arg));
1076 break;
1077 // Sub MVOP
1078 // Basic Command
1079 case E_MVOP_CMD_SUB_INIT:
1080 case E_MVOP_CMD_SUB_EXIT:
1081 case E_MVOP_CMD_SUB_ENABLE_BLACK_BG:
1082 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, NULL, buffer_arg,sizeof(buffer_arg));
1083 break;
1084 case E_MVOP_CMD_SUB_ENABLE:
1085 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_SUB_ENABLE, NULL, buffer_arg,sizeof(buffer_arg));
1086 break;
1087 case E_MVOP_CMD_SUB_SET_INPUTCFG:
1088 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_SUB_SET_INPUTCFG, spt_stMVOP_SET_INPUTCFG, buffer_arg,sizeof(buffer_arg));
1089 break;
1090 case E_MVOP_CMD_SUB_SET_OTPUTCFG:
1091 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_SUB_SET_OTPUTCFG, spt_stMVOP_SET_OTPUTCFG, buffer_arg,sizeof(buffer_arg));
1092 break;
1093 case E_MVOP_CMD_SUB_ENABLE_UV_SHIFT:
1094 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_SUB_ENABLE_UV_SHIFT, NULL,buffer_arg,sizeof(buffer_arg));
1095 break;
1096 case E_MVOP_CMD_SUB_SET_MONO_MODE:
1097 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_SUB_SET_MONO_MODE, NULL,buffer_arg,sizeof(buffer_arg));
1098 break;
1099 // Get Command
1100 case E_MVOP_CMD_SUB_GET_HSIZE:
1101 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_SUB_GET_HSIZE, buffer_arg,sizeof(buffer_arg));
1102 break;
1103 case E_MVOP_CMD_SUB_GET_VSIZE:
1104 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_SUB_GET_VSIZE, buffer_arg,sizeof(buffer_arg));
1105 break;
1106 case E_MVOP_CMD_SUB_GET_HSTART:
1107 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_SUB_GET_HSTART, buffer_arg,sizeof(buffer_arg));
1108 break;
1109 case E_MVOP_CMD_SUB_GET_VSTART:
1110 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_SUB_GET_VSTART, buffer_arg,sizeof(buffer_arg));
1111 break;
1112 case E_MVOP_CMD_SUB_GET_IS_INTERLACE:
1113 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_SUB_GET_IS_INTERLACE, buffer_arg,sizeof(buffer_arg));
1114 break;
1115 case E_MVOP_CMD_SUB_GET_IS_HDUPLICATE:
1116 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_SUB_GET_IS_HDUPLICATE,buffer_arg,sizeof(buffer_arg));
1117 break;
1118 case E_MVOP_CMD_SUB_GET_IS_ENABLE:
1119 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_GET_IS_ENABLE, spt_stMVOP_SUB_GET_IS_ENABLE,buffer_arg,sizeof(buffer_arg));
1120 break;
1121 case E_MVOP_CMD_SUB_GET_OUTPUT_TIMING:
1122 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_GET_OUTPUT_TIMING, spt_stMVOP_SUB_GET_OUTPUT_TIMING, buffer_arg,sizeof(buffer_arg));
1123 break;
1124 case E_MVOP_CMD_SUB_CHECK_CAPABILITY:
1125 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_CHECK_CAPABILITY, spt_stMVOP_SUB_CHECK_CAPABILITY, buffer_arg,sizeof(buffer_arg));
1126 break;
1127 case E_MVOP_CMD_SUB_GET_MAXHOFFSET:
1128 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_GET_MAX_HOFFSET, spt_stMVOP_SUB_GET_MAX_HOFFSET, buffer_arg,sizeof(buffer_arg));
1129 break;
1130 case E_MVOP_CMD_SUB_GET_MAXVOFFSET:
1131 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_GET_MAX_VOFFSET, spt_stMVOP_SUB_GET_MAX_VOFFSET, buffer_arg,sizeof(buffer_arg));
1132 break;
1133 case E_MVOP_CMD_SUB_GET_DST_INFO:
1134 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_GET_DST_INFO, spt_stMVOP_SUB_GET_DST_INFO, buffer_arg,sizeof(buffer_arg));
1135 break;
1136 case E_MVOP_CMD_SUB_GET_BASEADD:
1137 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_SET_BASEADD, spt_stMVOP_SUB_SET_BASEADD, buffer_arg,sizeof(buffer_arg));
1138 break;
1139 case E_MVOP_CMD_SUB_GET_INT_STATUS:
1140 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_SUB_GET_INT_STATUS, buffer_arg,sizeof(buffer_arg));
1141 break;
1142 // Set Command
1143 case E_MVOP_CMD_SUB_SET_CLK:
1144 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_SET_CLK, spt_stMVOP_SUB_SET_CLK, buffer_arg,sizeof(buffer_arg));
1145 break;
1146 case E_MVOP_CMD_SUB_SET_PATTERN:
1147 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_SET_PATTERN, NULL, buffer_arg,sizeof(buffer_arg));
1148 break;
1149 case E_MVOP_CMD_SUB_SET_TILE_FORMAT:
1150 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_SET_TILE_FORMAT, spt_stMVOP_SUB_SET_TILE_FORMAT,buffer_arg,sizeof(buffer_arg));
1151 break;
1152 case E_MVOP_CMD_SUB_SET_FIXVTT:
1153 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_SET_FIXVTT, spt_stMVOP_SUB_SET_FIXVTT, buffer_arg,sizeof(buffer_arg));
1154 break;
1155 case E_MVOP_CMD_SUB_SET_MMIO_MAPBASE:
1156 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_stMVOP_SUB_SET_MMIO_MAPBASE,buffer_arg,sizeof(buffer_arg));
1157 break;
1158 case E_MVOP_CMD_SUB_SET_BASEADD:
1159 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_SET_BASEADD, NULL,buffer_arg,sizeof(buffer_arg));
1160 break;
1161 case E_MVOP_CMD_SUB_SET_VOP_MIRRORMODE:
1162 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_SET_VOP_MIRROR_MODE, NULL, buffer_arg,sizeof(buffer_arg));
1163 break;
1164 // Others
1165 case E_MVOP_CMD_SUB_MIU_SWITCH:
1166 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_MIU_SWITCH, spt_stMVOP_SUB_MIU_SWITCH,buffer_arg,sizeof(buffer_arg));
1167 break;
1168 case E_MVOP_CMD_SUB_ENABLE_FREERUN_MODE:
1169 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_ENABLE_FREERUN_MODE, spt_stMVOP_SUB_ENABLE_FREERUN_MODE,buffer_arg,sizeof(buffer_arg));
1170 break;
1171 case E_MVOP_CMD_SUB_ENABLE_INTERRUPT:
1172 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_SUB_ENABLE_INTERRUPT, spt_stMVOP_SUB_ENABLE_INTERRUPT,buffer_arg,sizeof(buffer_arg));
1173 break;
1174 // 3rd MVOP
1175 // Basic Command
1176 case E_MVOP_CMD_EX_INIT:
1177 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_INIT, spt_stMVOP_EX_INIT, buffer_arg,sizeof(buffer_arg));
1178 break;
1179 case E_MVOP_CMD_EX_EXIT:
1180 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_EXIT, spt_stMVOP_EX_EXIT, buffer_arg,sizeof(buffer_arg));
1181 break;
1182 case E_MVOP_CMD_EX_ENABLE:
1183 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_EX_ENABLE, spt_stMVOP_EX_ENABLE, buffer_arg,sizeof(buffer_arg));
1184 break;
1185 case E_MVOP_CMD_EX_SET_INPUTCFG:
1186 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_EX_SET_INPUTCFG, spt_stMVOP_EX_SET_INPUTCFG, buffer_arg,sizeof(buffer_arg));
1187 break;
1188 case E_MVOP_CMD_EX_SET_OTPUTCFG:
1189 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_EX_SET_OTPUTCFG, spt_stMVOP_EX_SET_OTPUTCFG, buffer_arg,sizeof(buffer_arg));
1190 break;
1191 case E_MVOP_CMD_EX_ENABLE_BLACK_BG:
1192 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_ENABLE_BLACK_BG, spt_stMVOP_EX_ENABLE_BLACK_BG, buffer_arg,sizeof(buffer_arg));
1193 break;
1194 case E_MVOP_CMD_EX_ENABLE_UV_SHIFT:
1195 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_EX_ENABLE_UV_SHIFT, spt_stMVOP_EX_ENABLE_UV_SHIFT,buffer_arg,sizeof(buffer_arg));
1196 break;
1197 case E_MVOP_CMD_EX_SET_MONO_MODE:
1198 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_stMVOP_EX_SET_MONO_MODE, spt_stMVOP_EX_SET_MONO_MODE,buffer_arg,sizeof(buffer_arg));
1199 break;
1200 // Get Command
1201 case E_MVOP_CMD_EX_GET_HSIZE:
1202 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_HSIZE, spt_stMVOP_EX_GET_HSIZE, buffer_arg,sizeof(buffer_arg));
1203 break;
1204 case E_MVOP_CMD_EX_GET_VSIZE:
1205 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_VSIZE, spt_stMVOP_EX_GET_VSIZE, buffer_arg,sizeof(buffer_arg));
1206 break;
1207 case E_MVOP_CMD_EX_GET_HSTART:
1208 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_HSTART, spt_stMVOP_EX_GET_HSTART, buffer_arg,sizeof(buffer_arg));
1209 break;
1210 case E_MVOP_CMD_EX_GET_VSTART:
1211 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_VSTART, spt_stMVOP_EX_GET_VSTART, buffer_arg,sizeof(buffer_arg));
1212 break;
1213 case E_MVOP_CMD_EX_GET_IS_INTERLACE:
1214 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_IS_INTERLACE, spt_stMVOP_EX_GET_IS_INTERLACE, buffer_arg,sizeof(buffer_arg));
1215 break;
1216 case E_MVOP_CMD_EX_GET_IS_HDUPLICATE:
1217 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_IS_HDUPLICATE, spt_stMVOP_EX_GET_IS_HDUPLICATE,buffer_arg,sizeof(buffer_arg));
1218 break;
1219 case E_MVOP_CMD_EX_GET_STATUS:
1220 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_STATUS, spt_stMVOP_EX_GET_STATUS,buffer_arg,sizeof(buffer_arg));
1221 break;
1222 case E_MVOP_CMD_EX_CHECK_CAPABILITY:
1223 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_CHECK_CAPABILITY, spt_stMVOP_EX_CHECK_CAPABILITY, buffer_arg,sizeof(buffer_arg));
1224 break;
1225 case E_MVOP_CMD_EX_GET_DST_INFO:
1226 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_DST_INFO, spt_stMVOP_EX_GET_DST_INFO, buffer_arg,sizeof(buffer_arg));
1227 break;
1228 case E_MVOP_CMD_EX_GET_OUTPUT_TIMING:
1229 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_OUTPUT_TIMING, spt_stMVOP_EX_GET_OUTPUT_TIMING, buffer_arg,sizeof(buffer_arg));
1230 break;
1231 case E_MVOP_CMD_EX_GET_IS_ENABLE:
1232 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_IS_ENABLE, spt_stMVOP_EX_GET_IS_ENABLE, buffer_arg,sizeof(buffer_arg));
1233 break;
1234 case E_MVOP_CMD_EX_GET_INT_STATUS:
1235 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_GET_INT_STATUS, spt_stMVOP_EX_GET_INT_STATUS, buffer_arg,sizeof(buffer_arg));
1236 break;
1237 // Set Command
1238 case E_MVOP_CMD_EX_SET_CLK:
1239 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_SET_CLK, spt_stMVOP_EX_SET_CLK, buffer_arg,sizeof(buffer_arg));
1240 break;
1241 case E_MVOP_CMD_EX_SET_PATTERN:
1242 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_SET_PATTERN, spt_stMVOP_EX_SET_PATTERN, buffer_arg,sizeof(buffer_arg));
1243 break;
1244 case E_MVOP_CMD_EX_SET_TILEFORMAT:
1245 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_SET_TILE_FORMAT, spt_stMVOP_EX_SET_TILE_FORMAT,buffer_arg,sizeof(buffer_arg));
1246 break;
1247 case E_MVOP_CMD_EX_SET_FIXVTT:
1248 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_SET_FIXVTT, spt_stMVOP_EX_SET_FIXVTT, buffer_arg,sizeof(buffer_arg));
1249 break;
1250 case E_MVOP_CMD_EX_SET_VOP_MIRRORMODE:
1251 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_SET_VOP_MIRROR_MODE, spt_stMVOP_EX_SET_VOP_MIRROR_MODE,buffer_arg,sizeof(buffer_arg));
1252 break;
1253 // Others
1254 case E_MVOP_CMD_EX_MIU_SWITCH:
1255 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_MIU_SWITCH, spt_stMVOP_EX_MIU_SWITCH,buffer_arg,sizeof(buffer_arg));
1256 break;
1257 case E_MVOP_CMD_EX_ENABLE_FREERUN_MODE:
1258 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_ENABLE_FREERUN_MODE, spt_stMVOP_EX_ENABLE_FREERUN_MODE,buffer_arg,sizeof(buffer_arg));
1259 break;
1260 case E_MVOP_CMD_EX_ENABLE_INTERRUPT:
1261 u32Ret=UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_stMVOP_EX_ENABLE_INTERRUPT, spt_stMVOP_EX_ENABLE_INTERRUPT,buffer_arg,sizeof(buffer_arg));
1262 break;
1263 default:
1264 break;
1265 }
1266 return u32Ret;
1267 }
1268
1269 #endif
1270
1271
1272