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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 #ifndef _HAL_MVOP_H_ 96 #define _HAL_MVOP_H_ 97 98 99 //------------------------------------------------------------------------------------------------- 100 // Macro and Define 101 //------------------------------------------------------------------------------------------------- 102 #define STB_DC 0 //0 for TV series MVOP; 1 for STB DC. 103 #define STB_DC_MODE 104 105 //Information from miu owner: miu group5 should be 256bits, less than group5 are 128bits. 106 #define MVOP_MIU_CLIENT_MAIN MIU_CLIENT_MVOP_256BIT_R 107 #define MVOP_MIU_CLIENT_SUB MIU_CLIENT_MVOP1_256BIT_R 108 109 #define _MVOP_128BIT_BUS 0//128-bit MIU bus 110 #define _MVOP_64BIT_BUS 1// 64-bit MIU bus 111 #define MVOP_BUS_WIDTH _MVOP_128BIT_BUS 112 113 #define HAL_MVOP_MODULE_CNT 1 114 #if (HAL_MVOP_MODULE_CNT >= 2) 115 #define MVOP_SUPPORT_SUB 1 116 #else 117 #define MVOP_SUPPORT_SUB 0 118 #endif 119 #if (HAL_MVOP_MODULE_CNT >= 3) 120 #define MVOP_SUPPORT_3RD 1 121 #else 122 #define MVOP_SUPPORT_3RD 0 123 #endif 124 125 #define NO_MVOP_PATCH 1 126 #define ENABLE_3D_LR_MODE 1 //Enable 3D L/R feature 127 #define SUPPORT_3DLR_INST_VBLANK 0 128 #define SUPPORT_3DLR_ALT_SBS 1 129 130 #define SUPPORT_EVD_MODE 1 131 #define SUPPORT_VP9_MODE 1 132 133 #if (STB_DC == 0) 134 #define MVOP_BASE_ADD_BITS 31 //29 - 1 (MSB is signed bit) + 3 (unit in 8-byte) 135 #endif 136 137 #define SUPPORT_KERNAL_STR 1 138 139 #define MVOP_BANK_REGNUM 0x80UL 140 #define MVOP_CLK_REGNUM 0x10UL 141 142 //------------------------------------------------------------------------------------------------- 143 // Type and Structure 144 //------------------------------------------------------------------------------------------------- 145 typedef enum 146 { 147 HALMVOP_SYNCMODE, 148 HALMVOP_FREERUNMODE, 149 HALMVOP_27MHZ = 27000000ul, 150 HALMVOP_54MHZ = 54000000ul, 151 HALMVOP_320MHZ = 320000000ul, 152 HALMVOP_108MHZ = 108000000ul, 153 HALMVOP_123MHZ = 123000000ul, 154 HALMVOP_144MHZ = 144000000ul, 155 HALMVOP_160MHZ = 160000000ul, 156 HALMVOP_172MHZ = 172000000ul, 157 HALMVOP_192MHZ = 192000000ul, 158 HALMVOP_CLK_MIU, 159 HALMVOP_NOT_SUPPORT 160 }HALMVOPFREQUENCY; 161 162 typedef enum 163 { 164 E_MVOP_MASK_DB_REG, 165 E_MVOP_EN_DB_REG, 166 E_MVOP_DEBUG_SEL, 167 E_MVOP_UPDATE_SEL, 168 E_MVOP_RST_START_SEL, 169 E_MVOP_SC_VSYNC_SEL, 170 E_MVOP_READ_IP_BASE_SEL, 171 E_MVOP_CHKSUM_422_SWAP, 172 E_MVOP_CHKSUM_FULL_C, 173 E_MVOP_OFF_LATCH_CRC, 174 E_MVOP_SEL_OP_FIELD , 175 E_MVOP_INV_OP_FIELD, 176 E_MVOP_INV_OP_VS 177 }MVOPMSAKDBREGCTRL; 178 179 //for Kappa patch 180 typedef enum 181 { 182 E_MVOP_DEB2MVD_FRAME_MODE, 183 E_MVOP_DEB2MVD_FIELD_INV, 184 E_MVOP_SEQ_FROM_MVD, 185 E_MVOP_SIZE_FROM_MVD 186 }MVOPDEB2MVDFRAMECTRL; 187 188 typedef enum 189 { 190 E_MVOP_BASE_FROM_IP, 191 E_MVOP_SRC_FROM_MVD, 192 E_MVOP_FIELD_FROM_MVD, 193 E_MVOP_FIELD_FROM_MVD_INV, 194 E_MVOP_PITCH_FROM_IP, 195 E_MVOP_FMT_FROM_MVD, 196 E_MVOP_FD_MASK_CLR, 197 E_MVOP_FD_MASK_INV 198 #if (NO_MVOP_PATCH == 0) 199 , E_MVOP_SEQ_FROM_MVD_PATCH, 200 E_MVOP_SIZE_FROM_MVD_PATCH 201 #endif 202 }MVOPBASEFROMIPCTRL; 203 204 typedef struct 205 { 206 MS_U8 u8Gp:4; 207 MS_U8 u8BitPos:4; 208 }HALMVOPMIUCLIENTINFO; 209 210 typedef enum 211 { 212 E_MVOP_SEL_MIU0 = 0, 213 E_MVOP_SEL_MIU1 = 0x01, 214 E_MVOP_SEL_MIU2 = 0x02, 215 E_MVOP_SEL_MIU3 = 0x03, 216 E_MVOP_SEL_NONE = 0xFF, 217 218 } HALMVOPMIUSEL; 219 220 typedef struct 221 { 222 MS_U16 MVOP_BANK[3][0x80]; 223 MS_U16 CLK_BANK[0x10]; 224 225 }MVOP_STR_SAVE_AREA; 226 227 typedef enum 228 { 229 E_MVOP_POWER_SUSPEND = 1, // State is backup in DRAM, components power off. 230 E_MVOP_POWER_RESUME = 2, // Resume from Suspend or Hibernate mode 231 E_MVOP_POWER_MECHANICAL = 3, // Full power off mode. System return to working state only after full reboot 232 E_MVOP_POWER_SOFT_OFF = 4, // The system appears to be off, but some components remain powered for trigging boot-up. 233 } EN_MVOP_POWER_MODE; 234 235 typedef struct 236 { 237 MVOP_DrvMirror enMirror; 238 EN_MVOP_Output_3D_TYPE en3D; 239 MS_BOOL bHSK; 240 MS_BOOL bXCGenTiming; 241 MVOP_SetCropPos stCropSt; 242 MVOP_SetImageWH stCropSize; 243 MS_BOOL bOneField; 244 MS_BOOL b2P; 245 MS_BOOL bForceP; 246 MS_U32 u32Framerate; 247 }MVOP_FeatureMdb; 248 249 typedef struct 250 { 251 MS_U32 u32RegYoffset; 252 MS_U32 u32RegUVoffset; 253 MS_U16 u16RegHsize; 254 MS_U16 u16RegVsize; 255 MS_U16 u16RegStrip; 256 MS_BOOL bReg422; 257 MS_BOOL bRegPMode; 258 MS_BOOL bRegDramContd; 259 MS_BOOL bRegField; 260 MS_BOOL bReg422Pack; 261 MS_BOOL bRegRGB; 262 MS_BOOL bRegRGBType; 263 MS_U8 u8RegDSIndex; 264 MS_BOOL u8RegFDMask; 265 MS_BOOL bRegMfdecEn; 266 MS_U32 u32RegBitenAdd; 267 }MVOP_RegInputMdb; 268 269 typedef struct 270 { 271 MS_BOOL bMFDEC_EN; 272 MS_U8 u8MFDEC_ID; 273 MS_U32 u32UNCOMPRESS_MODE; 274 MS_PHY u32BITLEN_FB_ADDR; ///<0:8 bit EL y address, 1:8 bit EL uv address 275 MS_U8 u8BITLEN_FB_MIU; ///<0:8 bit EL y address, 1:8 bit EL uv address 276 MS_U32 u32BITLEN_FB_PITCH; 277 MS_BOOL bBITLEN_SHT_8; 278 }HALMVOPMFDECINFO; 279 280 typedef struct 281 { 282 MS_U32 u32RegVtt; 283 MS_U32 u32RegHtt; 284 MS_U16 u16RegVImgst; 285 MS_U16 u16RegHImgst; 286 MS_BOOL bRegInterlace; 287 MS_U8 u8RegFPS; 288 MS_U16 u16RegExpFPS; 289 MS_U16 u16RegHFreq; 290 MS_U16 u16RegWidth; 291 MS_U16 u16RegHeight; 292 MS_BOOL bRegHDup; 293 MS_BOOL bReg2P; 294 HALMVOPFREQUENCY enRegCLOCK; 295 MS_U16 u16RegVsForward; 296 }MVOP_RegOutputMdb; 297 298 //------------------------------------------------------------------------------------------------- 299 // Function and Variable 300 //------------------------------------------------------------------------------------------------- 301 void HAL_MVOP_RegSetBase(MS_VIRT u32Base); 302 void HAL_MVOP_Init(void); 303 void HAL_MVOP_SetFieldInverse(MS_BOOL b2MVD, MS_BOOL b2IP); 304 void HAL_MVOP_SetChromaWeighting(MS_BOOL bEnable); 305 void HAL_MVOP_LoadReg(void); 306 void HAL_MVOP_SetMIUReqMask(MS_BOOL bEnable); 307 void HAL_MVOP_Enable(MS_BOOL bEnable, MS_U8 u8Framerate); 308 MS_BOOL HAL_MVOP_GetEnableState(void); 309 HALMVOPFREQUENCY HAL_MVOP_GetMaxFreerunClk(void); 310 HALMVOPFREQUENCY HAL_MVOP_Get4k2kClk(void); 311 void HAL_MVOP_SetFrequency(HALMVOPFREQUENCY enFrequency); 312 HALMVOPFREQUENCY HAL_MVOP_GetMaximumClk(void); 313 HALMVOPFREQUENCY HAL_MVOP_GetCurrentClk(void); 314 void HAL_MVOP_Rst(void); 315 void HAL_MVOP_SetBlackBG(void); 316 void HAL_MVOP_SetOutputInterlace(MS_BOOL bEnable, MS_U16 u16ECOVersion); 317 void HAL_MVOP_SetCropWindow(MVOP_InputCfg *pparam); 318 void HAL_MVOP_SetInputMode( VOPINPUTMODE mode, MVOP_InputCfg *pparam, MS_U16 u16ECOVersion ); 319 void HAL_MVOP_EnableUVShift(MS_BOOL bEnable); 320 void HAL_MVOP_SetEnable60P(MS_BOOL bEnable); 321 void HAL_MVOP_SetEnable4k2kClk(MS_BOOL bEnable); 322 void HAL_MVOP_SetEnableFixClk(MS_BOOL bEnable); 323 void HAL_MVOP_SetVSyncMode(MS_U8 u8Mode); 324 void HAL_MVOP_SetOutputTiming( MVOP_Timing *ptiming ); 325 void HAL_MVOP_SetDCClk(MS_U8 clkNum, MS_BOOL bEnable); 326 void HAL_MVOP_SetSynClk(MVOP_Timing *ptiming); 327 void HAL_MVOP_SetMonoMode(MS_BOOL bEnable); 328 void HAL_MVOP_SetH264HardwireMode(MS_U16 u16ECOVersion); 329 void HAL_MVOP_SetRMHardwireMode(MS_U16 u16ECOVersion); 330 void HAL_MVOP_SetJpegHardwireMode(void); 331 void HAL_MVOP_SetEVDHardwireMode(MS_U16 u16ECOVersion); 332 void HAL_MVOP_SetVP9HardwireMode(MS_U16 u16ECOVersion); 333 void HAL_MVOP_SetEVDFeature(MVOP_DevID eID, MVOP_EVDFeature* stEVDInput); 334 void HAL_MVOP_SetPattern(MVOP_Pattern enMVOPPattern); 335 MS_BOOL HAL_MVOP_SetTileFormat(MVOP_TileFormat eTileFmt); 336 MS_BOOL HAL_MVOP_SetRgbFormat(MVOP_RgbFormat eRgbFmt); 337 MS_BOOL HAL_MVOP_GetSupportRgbFormat(MVOP_RgbFormat eRgbFmt); 338 MS_BOOL HAL_MVOP_Enable3DLR(MS_BOOL bEnable); 339 MS_BOOL HAL_MVOP_Get3DLRMode(void); 340 MS_BOOL HAL_MVOP_GetTimingInfoFromRegisters(MVOP_TimingInfo_FromRegisters *mvopTimingInfo); 341 void HAL_MVOP_SetHorizontallMirrorMode(MS_BOOL bEnable); 342 void HAL_MVOP_SetVerticalMirrorMode(MS_BOOL bEnable); 343 void HAL_MVOP_SetYUVBaseAdd(MS_PHY u32YOffset, MS_PHY u32UVOffset, MS_BOOL bProgressive, MS_BOOL b422pack); 344 void HAL_MVOP_SetRepeatField(MVOP_RptFldMode eMode); 345 void HAL_MVOP_EnableFreerunMode(MS_BOOL bEnable); 346 MS_PHY HAL_MVOP_GetYBaseAdd(void); 347 MS_PHY HAL_MVOP_GetUVBaseAdd(void); 348 MS_BOOL HAL_MVOP_Set3DLRAltOutput(MS_BOOL bEnable); 349 MS_BOOL HAL_MVOP_Set3DLRAltOutput_VHalfScaling(MS_BOOL bEnable); 350 MS_BOOL HAL_MVOP_Set3DLRAltSBSOutput(MS_BOOL bEnable); 351 MS_BOOL HAL_MVOP_Get3DLRAltOutput(void); 352 MS_BOOL HAL_MVOP_Get3DLRAltSBSOutput(void); 353 EN_MVOP_Output_3D_TYPE HAL_MVOP_GetOutput3DType(void); 354 MS_BOOL HAL_MVOP_Set3DLR2ndCfg(MS_BOOL bEnable); 355 MS_BOOL HAL_MVOP_Get3DLR2ndCfg(void); 356 MVOP_DrvMirror HAL_MVOP_GetMirrorMode(MVOP_DevID eID); 357 MS_BOOL HAL_MVOP_SetVerDup(MS_BOOL bEnable); 358 MS_BOOL HAL_MVOP_GetVerDup(void); 359 MS_BOOL HAL_MVOP_SetVerx4Dup(MS_BOOL bEnable); 360 MS_BOOL HAL_MVOP_GetVerx4Dup(void); 361 MS_BOOL HAL_MVOP_SetHorx4Dup(MS_BOOL bEnable); 362 MS_BOOL HAL_MVOP_GetHorx4Dup(void); 363 MS_BOOL HAL_MVOP_SetYUVBaseAddMultiView(MVOP_BaseAddInput *stBaseAddInfo); 364 MS_BOOL HAL_MVOP_SetEVDYUVBaseAdd(MVOP_EVDBaseAddInput *stEVDBaseAddInfo); 365 MS_PHY HAL_MVOP_GetYBaseAddMultiView(MVOP_3DView eView); 366 MS_PHY HAL_MVOP_GetUVBaseAddMultiView(MVOP_3DView eView); 367 MS_U16 HAL_MVOP_GetTopVStart(MVOP_DevID eID); 368 MS_U16 HAL_MVOP_GetBottomVStart(MVOP_DevID eID); 369 MS_U16 HAL_MVOP_GetVCount(MVOP_DevID eID); 370 MS_BOOL HAL_MVOP_SetVC1RangeMap(MVOP_DevID eID, MVOP_VC1RangeMapInfo *stVC1RangeMapInfo); 371 MS_BOOL HAL_MVOP_Set420BWSaveMode(MS_BOOL bEnable); 372 void HAL_MVOP_SetRptPreVsyncFrame(MVOP_DevID eID, MS_BOOL bEnable); 373 void HAL_MVOP_PowerStateSuspend(void); 374 MVOP_HSMode HAL_MVOP_GetHandShakeMode(MVOP_DevID eID); 375 MS_BOOL HAL_MVOP_CheckSTCCW(void); 376 MS_BOOL HAL_MVOP_GetIsMiuIPControl(HALMVOPMIUCLIENTINFO stInfo); 377 void HAL_MVOP_SelMIU(MVOP_DevID eDevID, HALMVOPMIUSEL eMiuMSB0, HALMVOPMIUSEL eMiuMSB1, HALMVOPMIUSEL eMiuLSB0, HALMVOPMIUSEL eMiuLSB1); 378 MS_BOOL HAL_MVOP_GetIsOnlyMiuIPControl(void); 379 void HAL_MVOP_SetDCSRAMClk(MS_U8 clkNum, MS_BOOL bEnable); 380 void HAL_MVOP_SetEnable4k2k2P(MS_BOOL bEnable); 381 MS_BOOL HAL_MVOP_Get4k2k2PMode(MVOP_DevID eID); 382 HALMVOPFREQUENCY HAL_MVOP_SetDefaultClk(MVOP_DevID eDevID); 383 void HAL_MVOP_GetMaxFramerate(MVOP_DevID eDevID, MVOP_GetMaxFps* stStreamInfo); 384 MS_BOOL HAL_MVOP_GetIsSendingData(MVOP_DevID eDevID); 385 void HAL_MVOP_SetTimingFromXC(MVOP_DevID eID, MS_BOOL bEnable); 386 void HAL_MVOP_ResetReg(MVOP_DevID eDevID, MS_U16 u16ECONumber); 387 MS_BOOL HAL_MVOP_GetIsCurrentHSK(MVOP_DevID eID); 388 MS_BOOL HAL_MVOP_GetIsCurrentXCGenTiming(MVOP_DevID eID); 389 HALMVOPFREQUENCY HAL_MVOP_SetFixClk(MVOP_DevID eID, MS_U32 u32MVOPClk); 390 void HAL_MVOP_SetHandShakeMode(MVOP_DevID eID, MS_BOOL bEnable, MS_U8 u8Framerate); 391 void HAL_MVOP_SetCropforXC(MVOP_DevID eID, MVOP_XCGetCrop* stXCCrop, MS_U16 u16Width, MS_U16 u16Height); 392 MS_U16 HAL_MVOP_ReadBank(MVOP_DevID eID ,MS_U16 u16Length); 393 void HAL_MVOP_WriteBank(MVOP_DevID eID ,MS_U16 u16Length,MS_U16 u16Data); 394 MS_U16 HAL_MVOP_ReadClkBank(MS_U16 u16Length); 395 void HAL_MVOP_WriteClkBank(MS_U16 u16Length,MS_U16 u16Data); 396 void HAL_MVOP_SetInterlaceType(MVOP_DevID eDevID, MS_U16 u16ECONumber, MS_U8 u8Interlace); 397 MS_BOOL HAL_MVOP_GetIsMVOPSupportBLKBackground(MVOP_DevID eID); 398 void HAL_MVOP_SetSramPower(MVOP_DevID eID ,MS_BOOL bEnable); 399 void HAL_MVOP_Exit(MVOP_DevID eID); 400 void HAL_MVOP_UVSwapEnable(MVOP_DevID eID, MS_BOOL bEnable); 401 void HAL_MVOP_SetECONumber(MS_U16 u16ECOVersion); 402 void HAL_SetTSPCW(MVOP_DevID eID); 403 void HAL_MVOP_SetMFDECInfo(MVOP_DevID eID, HALMVOPMFDECINFO *pMFDECInfo); 404 //for sub mvop 405 void HAL_MVOP_SubRegSetBase(MS_VIRT u32Base); 406 void HAL_MVOP_SubInit(void); 407 void HAL_MVOP_SubSetFieldInverse(MS_BOOL b2MVD, MS_BOOL b2IP); 408 void HAL_MVOP_SubSetChromaWeighting(MS_BOOL bEnable); 409 void HAL_MVOP_SubLoadReg(void); 410 void HAL_MVOP_SubSetMIUReqMask(MS_BOOL bEnable); 411 void HAL_MVOP_SubRst(void); 412 void HAL_MVOP_SubEnable(MS_BOOL bEnable, MS_U8 u8Framerate); 413 MS_BOOL HAL_MVOP_SubGetEnableState(void); 414 HALMVOPFREQUENCY HAL_MVOP_SubGetMaxFreerunClk(void); 415 HALMVOPFREQUENCY HAL_MVOP_SubGet4k2kClk(void); 416 void HAL_MVOP_SubSetFrequency(HALMVOPFREQUENCY enFrequency); 417 void HAL_MVOP_SubSetOutputInterlace(MS_BOOL bEnable, MS_U16 u16ECOVersion); 418 void HAL_MVOP_SubSetPattern(MVOP_Pattern enMVOPPattern); 419 MS_BOOL HAL_MVOP_SubSetTileFormat(MVOP_TileFormat eTileFmt); 420 MS_BOOL HAL_MVOP_SubSetRgbFormat(MVOP_RgbFormat eRgbFmt); 421 MS_BOOL HAL_MVOP_SubEnable3DLR(MS_BOOL bEnable); 422 MS_BOOL HAL_MVOP_SubGet3DLRMode(void); 423 void HAL_MVOP_SubSetBlackBG(void); 424 void HAL_MVOP_SubSetCropWindow(MVOP_InputCfg *pparam); 425 void HAL_MVOP_SubSetInputMode( VOPINPUTMODE mode, MVOP_InputCfg *pparam, MS_U16 u16ECOVersion ); 426 void HAL_MVOP_SubEnableUVShift(MS_BOOL bEnable); 427 void HAL_MVOP_SubSetEnable60P(MS_BOOL bEnable); 428 void HAL_MVOP_SubSetEnable4k2kClk(MS_BOOL bEnable); 429 void HAL_MVOP_SubSetOutputTiming( MVOP_Timing *ptiming ); 430 void HAL_MVOP_SubSetDCClk(MS_U8 clkNum, MS_BOOL bEnable); 431 void HAL_MVOP_SubSetDCSRAMClk(MS_U8 clkNum, MS_BOOL bEnable); 432 void HAL_MVOP_SubSetSynClk(MVOP_Timing *ptiming); 433 void HAL_MVOP_SubSetMonoMode(MS_BOOL bEnable); 434 void HAL_MVOP_SubSetH264HardwireMode(MS_U16 u16ECOVersion); 435 void HAL_MVOP_SubSetRMHardwireMode(MS_U16 u16ECOVersion); 436 void HAL_MVOP_SubSetJpegHardwireMode(MS_U16 u16ECOVersion); 437 void HAL_MVOP_SubSetEVDHardwireMode(MS_U16 u16ECOVersion); 438 void HAL_MVOP_SubSetVP9HardwireMode(MS_U16 u16ECOVersion); 439 void HAL_MVOP_SubEnableMVDInterface(MS_BOOL bEnable); 440 MS_BOOL HAL_MVOP_SubGetTimingInfoFromRegisters(MVOP_TimingInfo_FromRegisters *pMvopTimingInfo); 441 void HAL_MVOP_SubSetHorizontallMirrorMode(MS_BOOL bEnable); 442 void HAL_MVOP_SubSetVerticalMirrorMode(MS_BOOL bEnable); 443 void HAL_MVOP_SubEnableFreerunMode(MS_BOOL bEnable); 444 void HAL_MVOP_SubSetYUVBaseAdd(MS_PHY u32YOffset, MS_PHY u32UVOffset, MS_BOOL bProgressive, MS_BOOL b422pack); 445 void HAL_MVOP_SubSetRepeatField(MVOP_RptFldMode eMode); 446 void HAL_MVOP_SubSetFDMaskFromMVD(MS_BOOL bEnable); 447 MS_PHY HAL_MVOP_SubGetYBaseAdd(void); 448 MS_PHY HAL_MVOP_SubGetUVBaseAdd(void); 449 MS_BOOL HAL_MVOP_SubSet420BWSaveMode(MS_BOOL bEnable, MS_U16 u16ECOVersion); 450 MS_BOOL HAL_MVOP_SubSetEVDYUVBaseAdd(MVOP_EVDBaseAddInput *stEVDBaseAddInfo); 451 MS_BOOL HAL_MVOP_SubCheckSTCCW(void); 452 void HAL_MVOP_SubSetEnable4k2k2P(MS_BOOL bEnable); 453 void HAL_MVOP_SubSetVSyncMode(MS_U8 u8Mode); 454 MS_BOOL HAL_MVOP_SubSet3DLRAltOutput_VHalfScaling(MS_BOOL bEnable); 455 MS_BOOL HAL_MVOP_SubSet3DLRAltOutput(MS_BOOL bEnable); 456 MS_BOOL HAL_MVOP_SubSet3DLRAltSBSOutput(MS_BOOL bEnable); 457 MS_BOOL HAL_MVOP_SubGet3DLRAltOutput(void); 458 MS_BOOL HAL_MVOP_SubGet3DLRAltSBSOutput(void); 459 EN_MVOP_Output_3D_TYPE HAL_MVOP_SubGetOutput3DType(void); 460 461 //for STB_DC 462 void HAL_MVOP_SetStartX(MVOP_DevID eID, MS_U16 u16Length); 463 void HAL_MVOP_SetStartY(MVOP_DevID eID, MS_U16 u16Length, MS_BOOL bIsInterlace); 464 void HAL_MVOP_SetPicWidthMinus(MVOP_DevID eID, MS_U16 u16Sizes, MS_U16 u16Width); 465 void HAL_MVOP_SetPicHeightMinus(MVOP_DevID eID, MS_U16 u16Sizes, MS_U16 u16Height); 466 void HAL_MVOP_MaskDBRegCtrl(MVOP_DevID eID, MS_BOOL bEnable ,MVOPMSAKDBREGCTRL eModeCtrl); 467 void HAL_MVOP_SetDeb2MVDFrameModeCtrl(MVOP_DevID eID, MS_BOOL bEnable, MVOPDEB2MVDFRAMECTRL eModeCtrl); 468 void HAL_MVOP_BaseFromIPCtrl(MVOP_DevID eID, MS_BOOL bEnable ,MVOPBASEFROMIPCTRL eModeCtrl ); 469 470 #endif // _HAL_MVOP_H_ 471