1 #define U1_MsOS_Init_SECTION 1 2 #define U1_MsOS_Init_str_SECTION 1 3 #define U1_MsOS_Init_Fastboot_SECTION 1 4 #define U1_MsOS_CreateMemoryPool_SECTION 1 5 #define U1_MsOS_DeleteMemoryPool_SECTION 1 6 #define U1_MsOS_InfoMemoryPool_SECTION 1 7 #define U1_MsOS_AllocateMemory_SECTION 1 8 #define U1_MsOS_ReallocateMemory_SECTION 1 9 #define U1_MsOS_FreeMemory_SECTION 1 10 #define U1_MsOS_CreateFixSizeMemoryPool_SECTION 1 11 #define U1_MsOS_DeleteFixSizeMemoryPool_SECTION 1 12 #define U1_MsOS_InfoFixSizeMemoryPool_SECTION 1 13 #define U1_MsOS_AllocateFixSizeMemory_SECTION 1 14 #define U1_MsOS_FreeFixSizeMemory_SECTION 1 15 #define U1_MsOS_CreateTask_SECTION 1 16 #define U1_MsOS_DeleteTask_SECTION 1 17 #define U1_MsOS_YieldTask_SECTION 1 18 #define U1_MsOS_DelayTask_SECTION 1 19 #define U1_MsOS_DelayTaskUs_SECTION 1 20 #define U1_MsOS_DelayTaskUs_Poll_SECTION 1 21 #define U1_MsOS_ResumeTask_SECTION 1 22 #define U1_MsOS_SuspendTask_SECTION 1 23 #define U1_MsOS_InfoTaskID_SECTION 1 24 #define U1_MsOS_GetOSThreadID_SECTION 1 25 #define U1_MsOS_GetTaskStatus_SECTION 1 26 #define U1_MsOS_CreateMutex_SECTION 1 27 #define U1_MsOS_DeleteMutex_SECTION 1 28 #define U1_MsOS_DeleteMutex_SECTION 1 29 #define U1_MsOS_ObtainMutex_SECTION 1 30 #define U1_MsOS_ObtainMutex_SECTION 1 31 #define U1_MsOS_ObtainMutex_SECTION 1 32 #define U1_MsOS_ObtainMutex_SECTION 1 33 #define U1_MsOS_ObtainMutex_SECTION 1 34 #define U1_MsOS_ObtainMutex_SECTION 1 35 #define U1_MsOS_ReleaseMutex_SECTION 1 36 #define U1_MsOS_ReleaseMutex_SECTION 1 37 #define U1_MsOS_ReleaseMutex_SECTION 1 38 #define U1_MsOS_ReleaseMutex_SECTION 1 39 #define U1_MsOS_ReleaseMutex_SECTION 1 40 #define U1_MsOS_ReleaseMutex_SECTION 1 41 #define U1_MsOS_ReleaseMutex_SECTION 1 42 #define U1_MsOS_ReleaseMutex_SECTION 1 43 #define U1_MsOS_ReleaseMutex_SECTION 1 44 #define U1_MsOS_ReleaseMutex_SECTION 1 45 #define U1_MsOS_ReleaseMutex_SECTION 1 46 #define U1_MsOS_InfoMutex_SECTION 1 47 #define U1_MsOS_CreateSemaphore_SECTION 1 48 #define U1_MsOS_DeleteSemaphore_SECTION 1 49 #define U1_MsOS_ObtainSemaphore_SECTION 1 50 #define U1_MsOS_ReleaseSemaphore_SECTION 1 51 #define U1_MsOS_InfoSemaphore_SECTION 1 52 #define U1_MsOS_CreateEventGroup_SECTION 1 53 #define U1_MsOS_DeleteEventGroup_SECTION 1 54 #define U1_MsOS_SetEvent_SECTION 1 55 #define U1_MsOS_ClearEvent_SECTION 1 56 #define U1_MsOS_WaitEvent_SECTION 1 57 #define U1_MsOS_WaitEvent_Interrupt_SECTION 1 58 #define U1_MsOS_CreateTimer_SECTION 1 59 #define U1_MsOS_DeleteTimer_SECTION 1 60 #define U1_MsOS_StartTimer_SECTION 1 61 #define U1_MsOS_StopTimer_SECTION 1 62 #define U1_MsOS_ResetTimer_SECTION 1 63 #define U1_MsOS_GetSystemTime_SECTION 1 64 #define U1_MsOS_Timer_DiffTimeFromNow_SECTION 1 65 #define U1_MsOS_Timer_DiffTime_SECTION 1 66 #define U1_MsOS_CreateQueue_SECTION 1 67 #define U1_MsOS_DeleteQueue_SECTION 1 68 #define U1_MsOS_SendToQueue_SECTION 1 69 #define U1_MsOS_RecvFromQueue_SECTION 1 70 #define U1_MsOS_PeekFromQueue_SECTION 1 71 #define U1_MsOS_AttachInterrupt_SECTION 1 72 #define U1_MsOS_AttachInterrupt_Shared_SECTION 1 73 #define U1_MsOS_DetachInterrupt_SECTION 1 74 #define U1_MsOS_EnableInterrupt_SECTION 1 75 #define U1_MsOS_DebugInterrupt_SECTION 1 76 #define U1_MsOS_DisableInterrupt_SECTION 1 77 #define U1_MsOS_CompleteInterrupt_SECTION 1 78 #define U1_MsOS_In_Interrupt_SECTION 1 79 #define U1_MsOS_DisableAllInterrupts_SECTION 1 80 #define U1_MsOS_RestoreAllInterrupts_SECTION 1 81 #define U1_MsOS_EnableAllInterrupts_SECTION 1 82 #define U1_MsOS_CPU_DisableInterrupt_SECTION 1 83 #define U1_MsOS_CPU_EnableInterrupt_SECTION 1 84 #define U1_MsOS_CPU_RestoreInterrupt_SECTION 1 85 #define U1_MsOS_CPU_MaskAllInterrupt_SECTION 1 86 #define U1_MsOS_CPU_MaskInterrupt_SECTION 1 87 #define U1_MsOS_CPU_UnMaskInterrupt_SECTION 1 88 #define U1_MsOS_CPU_LockInterrupt_SECTION 1 89 #define U1_MsOS_CPU_UnLockInterrupt_SECTION 1 90 #define U1_MsOS_CPU_AttachInterrupt_SECTION 1 91 #define U1_MsOS_CPU_DetachInterrupt_SECTION 1 92 #define U1_MsOS_CPU_AttachException_SECTION 1 93 #define U1_MsOS_CPU_DetachExceptiont_SECTION 1 94 #define U1_MsOS_CPU_SetEBASE_SECTION 1 95 #define U1_MsOS_Dcache_Flush_SECTION 1 96 #define U1_MsOS_Dcache_Flush_All_SECTION 1 97 #define U1_MsOS_Dcache_Invalidate_SECTION 1 98 #define U1_MsOS_Dcache_Writeback_SECTION 1 99 #define U1_MsOS_Sync_SECTION 1 100 #define U1_MDrv_SYS_Info_SECTION 1 101 #define U1_MsOS_MPool_SetDbgLevel_SECTION 1 102 #define U1_MsOS_MPool_IsInitialized_SECTION 1 103 #define U1_MsOS_MPool_Init_SECTION 1 104 #define U1_MsOS_ION_IsInitialized_SECTION 1 105 #define U1_MsOS_ION_Init_SECTION 1 106 #define U1_MsOS_MPool_Get_SECTION 1 107 #define U1_MsOS_MPool_Close_SECTION 1 108 #define U1_MsOS_MPool_InfoMsg_SECTION 1 109 #define U1_MsOS_ION_Close_SECTION 1 110 #define U1_MsOS_MPool_VA2PA_SECTION 1 111 #define U1_MsOS_MPool_PA2KSEG1_SECTION 1 112 #define U1_MsOS_MPool_PA2KSEG0_SECTION 1 113 #define U1_MsOS_MPool_Dcache_Flush_SECTION 1 114 #define U1_MsOS_MPool_Dcache_Flush_All_SECTION 1 115 #define U1_MsOS_MPool_Mapping_SECTION 1 116 #define U1_MsOS_MPool_UnMapping_SECTION 1 117 #define U1_MsOS_MPool_Mapping_Dynamic_SECTION 1 118 #define U1_MsOS_MPool_Kernel_Detect_SECTION 1 119 #define U1_MsOS_MPool_SetWatchPT_SECTION 1 120 #define U1_MsOS_MPool_GetWatchPT_SECTION 1 121 #define U1_MsOS_ION_Mapping_SECTION 1 122 #define U1_MsOS_GetSHMSize_SECTION 1 123 #define U1_MsOS_Mapping_SharedMem_SECTION 1 124 #define U1_MsOS_CreateNamedMutex_SECTION 1 125 #define U1_MsOS_LockMutex_SECTION 1 126 #define U1_MsOS_UnlockMutex_SECTION 1 127 #define U1_MsOS_DeleteNamedMutexbyIndex_SECTION 1 128 #define U1_MsOS_CreateNamedSemaphore_SECTION 1 129 #define U1_MsOS_ObtainNamedSemaphore_SECTION 1 130 #define U1_MsOS_ReleaseNamedSemaphore_SECTION 1 131 #define U1_MsOS_MPool_Add_PA2VARange_SECTION 1 132 #define U1_MsOS_MPool_Remove_PA2VARange_SECTION 1 133 #define U1_MsOS_SHM_Init_SECTION 1 134 #define U1_MsOS_SHM_GetId_SECTION 1 135 #define U1_MsOS_SHM_FreeId_SECTION 1 136 #define U1_MsOS_VA2PA_SECTION 1 137 #define U1_MsOS_PA2KSEG0_SECTION 1 138 #define U1_MsOS_PA2KSEG1_SECTION 1 139 #define U1_MsOS_PA2BA_SECTION 1 140 #define U1_MsOS_BA2PA_SECTION 1 141 #define U1_MsOS_FlushMemory_SECTION 1 142 #define U1_MsOS_ReadMemory_SECTION 1 143 #define U1_MsOS_GetKattribute_SECTION 1 144 #define U1_MsOS_RegMyDbg_SECTION 1 145 #define U1_MsOS_Dbg_ParseCmd_SECTION 1 146 #define U1_MsOS_Dbg_Regist_SECTION 1 147 #define U1_MsOS_Dbg_ExecuteSubCB_SECTION 1 148 #define U1_filter_log_SECTION 1 149 #define U1_mlog_showTags_SECTION 1 150 #define U1_mlog_addTAG_SECTION 1 151 #define U1_mlog_removeTAG_SECTION 1 152 #define U1_mlog_getPriority_SECTION 1 153 #define U1_mlog_setPriority_SECTION 1 154 #define U1_MsFS_Init_SECTION 1 155 #define U1_MsFS_Mount_SECTION 1 156 #define U1_MsFS_Umount_SECTION 1 157 #define U1_MsFS_Open_SECTION 1 158 #define U1_MsFS_Unlink_SECTION 1 159 #define U1_MsFS_MkDir_SECTION 1 160 #define U1_MsFS_RmDir_SECTION 1 161 #define U1_MsFS_ChDir_SECTION 1 162 #define U1_MsFS_Rename_SECTION 1 163 #define U1_MsFS_Link_SECTION 1 164 #define U1_MsFS_Stat_SECTION 1 165 #define U1_MsFS_FStat_SECTION 1 166 #define U1_MsFS_PathConf_SECTION 1 167 #define U1_MsFS_FPathConf_SECTION 1 168 #define U1_MsFS_Access_SECTION 1 169 #define U1_MsFS_GetCwd_SECTION 1 170 #define U1_MsFS_OpenDir_SECTION 1 171 #define U1_MsFS_ReadDir_SECTION 1 172 #define U1_MsFS_RewindDir_SECTION 1 173 #define U1_MsFS_CloseDir_SECTION 1 174 #define U1_MsFS_Read_SECTION 1 175 #define U1_MsFS_Write_SECTION 1 176 #define U1_MsFS_Close_SECTION 1 177 #define U1_MsFS_Lseek_SECTION 1 178 #define U1_MsFS_FCntl_SECTION 1 179 #define U1_MsFS_FSync_SECTION 1 180 #define U1_MsFS_Sync_SECTION 1 181 #define U1_MsFS_Fopen_SECTION 1 182 #define U1_MsFS_Fclose_SECTION 1 183 #define U1_MsFS_Fread_SECTION 1 184 #define U1_MsFS_Fwrite_SECTION 1 185 #define U1_MsFS_Fseek_SECTION 1 186 #define U1_MsFS_Rewind_SECTION 1 187 #define U1_MsFS_Ftell_SECTION 1 188 #define U1_MsFS_Fflush_SECTION 1 189 #define U1_MApi_FS_Info_SECTION 1 190 #define U1_MApi_ACP_SetProtection_SECTION 1 191 #define U1_MApi_ACP_SetMV_BitControl_SECTION 1 192 #define U1_MApi_DCS_SetProtection_SECTION 1 193 #define U1_MApi_DCS_SetActivationKey_SECTION 1 194 #define U1_MApi_AUDIO_SetPowerOn_SECTION 1 195 #define U1_MApi_AUDIO_Initialize_SECTION 1 196 #define U1_MApi_AUDIO_SetSystemInfo_SECTION 1 197 #define U1_MApi_Audio_Monitor_SECTION 1 198 #define U1_MApi_AUDIO_SetOutConnectivity_SECTION 1 199 #define U1_MApi_AUDIO_SetPathInfo_SECTION 1 200 #define U1_MApi_AUDIO_GetPathInfo_SECTION 1 201 #define U1_MApi_AUDIO_SetOutputInfo_SECTION 1 202 #define U1_MApi_AUDIO_SetSourceInfo_SECTION 1 203 #define U1_MApi_AUDIO_InputSwitch_SECTION 1 204 #define U1_MApi_AUDIO_SetDataCaptureSource_SECTION 1 205 #define U1_MApi_AUDIO_SetOutputSourceInfo_SECTION 1 206 #define U1_MApi_AUDIO_GetOutputSourceInfo_SECTION 1 207 #define U1_MApi_AUDIO_ReadMailBox_SECTION 1 208 #define U1_MApi_AUDIO_WriteMailBox_SECTION 1 209 #define U1_MApi_AUDIO_FwTriggerDSP_SECTION 1 210 #define U1_MApi_AUDIO_SetFwStatus_SECTION 1 211 #define U1_MApi_AUDIO_ExitAudioSystem_SECTION 1 212 #define U1_MApi_AUDIO_RebootDsp_SECTION 1 213 #define U1_MApi_AUDIO_SendIntrupt_SECTION 1 214 #define U1_MApi_AUDIO_I2S_SetMode_SECTION 1 215 #define U1_MApi_AUDIO_WritePreInitTable_SECTION 1 216 #define U1_MApi_AUDIO_EnaEarphone_LowPower_Stage_SECTION 1 217 #define U1_MApi_AUDIO_EnaEarphone_HighDriving_Stage_SECTION 1 218 #define U1_MApi_SND_ProcessEnable_SECTION 1 219 #define U1_MApi_SND_SetParam1_SECTION 1 220 #define U1_MApi_SND_GetParam1_SECTION 1 221 #define U1_MApi_AUDIO_SOUND_SetParam_SECTION 1 222 #define U1_MApi_AUDIO_SetAbsoluteVolume_SECTION 1 223 #define U1_MApi_AUDIO_SetPreScale_SECTION 1 224 #define U1_MApi_AUDIO_SetMute_SECTION 1 225 #define U1_MApi_AUDIO_SourceConnect_SECTION 1 226 #define U1_MApi_AUDIO_SetBalance_SECTION 1 227 #define U1_MApi_AUDIO_EnableEQ_SECTION 1 228 #define U1_MApi_AUDIO_EnableTone_SECTION 1 229 #define U1_MApi_AUDIO_EnableAutoVolume_SECTION 1 230 #define U1_MApi_AUDIO_EnableSurround_SECTION 1 231 #define U1_MApi_AUDIO_EnableBalance_SECTION 1 232 #define U1_MApi_AUDIO_SetDynamicBass_SECTION 1 233 #define U1_MApi_AUDIO_SetBass_SECTION 1 234 #define U1_MApi_AUDIO_AbsoluteBass_SECTION 1 235 #define U1_MApi_AUDIO_SetTreble_SECTION 1 236 #define U1_MApi_AUDIO_AbsoluteTreble_SECTION 1 237 #define U1_MApi_AUDIO_SetEq_SECTION 1 238 #define U1_MApi_AUDIO_SetEq_7band_SECTION 1 239 #define U1_MApi_AUDIO_SetAvcThreshold_SECTION 1 240 #define U1_MApi_AUDIO_SetAvcMode_SECTION 1 241 #define U1_MApi_AUDIO_SetAvcAT_SECTION 1 242 #define U1_MApi_AUDIO_SetAvcRT_SECTION 1 243 #define U1_MApi_AUDIO_SetBufferProcess_SECTION 1 244 #define U1_MApi_AUDIO_SetSurroundXA_SECTION 1 245 #define U1_MApi_AUDIO_SetSurroundXB_SECTION 1 246 #define U1_MApi_AUDIO_SetSurroundXK_SECTION 1 247 #define U1_MApi_AUDIO_SetSurroundLPFGain_SECTION 1 248 #define U1_MApi_AUDIO_ConvertVolumeUnit_SECTION 1 249 #define U1_MApi_AUDIO_SetPEQCoef_SECTION 1 250 #define U1_MApi_AUDIO_EnablePEQ_SECTION 1 251 #define U1_MApi_AUDIO_EnableDcRemove_SECTION 1 252 #define U1_MApi_AUDIO_ReleaseDecodeSystem_SECTION 1 253 #define U1_MApi_AUDIO_SetDecodeSystem_SECTION 1 254 #define U1_MApi_AUDIO_GetDecodeSystem_SECTION 1 255 #define U1_MApi_AUDIO_SetDecodeCmd_SECTION 1 256 #define U1_MApi_AUDIO_OpenDecodeSystem_SECTION 1 257 #define U1_MApi_AUDIO_SetSystem_SECTION 1 258 #define U1_MApi_AUDIO_GetDecSysSupportStatus_SECTION 1 259 #define U1_MApi_AUDIO_SetH264StreamID_Mod_SECTION 1 260 #define U1_MApi_AUDIO_IsMadLock_SECTION 1 261 #define U1_MApi_AUDIO_GetDecStatus_SECTION 1 262 #define U1_MApi_AUDIO_GetCommand_SECTION 1 263 #define U1_MApi_AUDIO_SetCommand_SECTION 1 264 #define U1_MApi_AUDIO_GetMAD_LOCK_SECTION 1 265 #define U1_MApi_AUDIO_SetADOutputMode_SECTION 1 266 #define U1_MApi_AUDIO_SetADAbsoluteVolume_SECTION 1 267 #define U1_MApi_AUDIO_ADSetMute_SECTION 1 268 #define U1_MApi_AUDIO_SetEncInit_SECTION 1 269 #define U1_MApi_AUDIO_SetEncCommand_SECTION 1 270 #define U1_MApi_AUDIO_GetEncodeFrameInfo_SECTION 1 271 #define U1_MApi_AUDIO_GetEncodeDoneFlag_SECTION 1 272 #define U1_MApi_AUDIO_SIF_SetStandard_SECTION 1 273 #define U1_MApi_AUDIO_SIF_GetSoundMode_SECTION 1 274 #define U1_MApi_AUDIO_SIF_SetSoundMode_SECTION 1 275 #define U1_MApi_AUDIO_SIF_GetAudioStatus_SECTION 1 276 #define U1_MApi_AUDIO_SIF_StartAutoStandardDetection_SECTION 1 277 #define U1_MApi_AUDIO_SIF_GetResultOfAutoStandardDetection_SECTION 1 278 #define U1_MApi_AUDIO_SIF_ConvertToBasicAudioStandard_SECTION 1 279 #define U1_MApi_AUDIO_SIF_SetThreshold_SECTION 1 280 #define U1_MApi_AUDIO_SIF_SetPrescale_SECTION 1 281 #define U1_MApi_AUDIO_SIF_IsPALType_SECTION 1 282 #define U1_MApi_AUDIO_SIF_SetPALType_SECTION 1 283 #define U1_MApi_AUDIO_SIF_SendCmd_SECTION 1 284 #define U1_MApi_AUDIO_SIF_Shift_SECTION 1 285 #define U1_MApi_AUDIO_FM_RADIO_GetSoundMode_SECTION 1 286 #define U1_MApi_AUDIO_FM_RADIO_SetSoundMode_SECTION 1 287 #define U1_MApi_AUDIO_FM_RADIO_DeEmphassisOption_SECTION 1 288 #define U1_MApi_AUDIO_FM_RADIO_GET_DC_AMP_SECTION 1 289 #define U1_MApi_AUDIO_FM_RADIO_GET_NSR_SECTION 1 290 #define U1_MApi_AUDIO_FM_RADIO_RESET_SECTION 1 291 #define U1_MApi_AUDIO_SPDIF_HWEN_SECTION 1 292 #define U1_MApi_AUDIO_SPDIF_SetMute_SECTION 1 293 #define U1_MApi_AUDIO_SPDIF_SetMode_SECTION 1 294 #define U1_MApi_AUDIO_SPDIF_GetMode_SECTION 1 295 #define U1_MApi_AUDIO_SPDIF_SetSCMS_SECTION 1 296 #define U1_MApi_AUDIO_SPDIF_GetSCMS_SECTION 1 297 #define U1_MApi_AUDIO_SPDIF_SetOutputType_SECTION 1 298 #define U1_MApi_Audio_SPDIF_Monitor_SECTION 1 299 #define U1_MApi_Audio_Monitor_SPDIF_NONPCM_SmpRate_SECTION 1 300 #define U1_MApi_AUDIO_SPDIF_ChannelStatus_CTRL_SECTION 1 301 #define U1_MApi_AUDIO_DigitalOut_SetChannelStatus_SECTION 1 302 #define U1_MApi_AUDIO_DigitalOut_SetDeviceCapability_SECTION 1 303 #define U1_MApi_AUDIO_HDMI_Tx_SetMute_SECTION 1 304 #define U1_MApi_AUDIO_HDMI_Tx_GetStatus_SECTION 1 305 #define U1_MApi_AUDIO_HDMI_Monitor_SECTION 1 306 #define U1_MApi_AUDIO_HDMI_GetNonpcmFlag_SECTION 1 307 #define U1_MApi_AUDIO_HDMI_SetNonpcm_SECTION 1 308 #define U1_MApi_AUDIO_HDMI_RX_SetNonpcm_SECTION 1 309 #define U1_MApi_AUDIO_HDMI_RX_GetNonPCM_SECTION 1 310 #define U1_MApi_AUDIO_DTV_HDMI_CFG_SECTION 1 311 #define U1_MApi_AUDIO_HDMI_GetSynthFreq_SECTION 1 312 #define U1_MApi_AUDIO_HDMI_SetDownSample_SECTION 1 313 #define U1_MApi_AUDIO_HDMI_TX_SetMode_SECTION 1 314 #define U1_MApi_AUDIO_HDMI_RX_GetHdmiInAudioStatus_SECTION 1 315 #define U1_MApi_AUDIO_ADVSOUND_ProcessEnable_SECTION 1 316 #define U1_MApi_AUDIO_ADVSOUND_SubProcessEnable_SECTION 1 317 #define U1_MApi_AUDIO_ADVSOUND_SetParam_SECTION 1 318 #define U1_MApi_AUDIO_ADVSND_SetParam_SECTION 1 319 #define U1_MApi_AUDIO_ADVSOUND_GetInfo_SECTION 1 320 #define U1_MApi_DBXTV_SetMode_SECTION 1 321 #define U1_MApi_AUDIO_SeInit_SECTION 1 322 #define U1_MApi_AUDIO_SetAdvSndSys_SECTION 1 323 #define U1_MApi_AUDIO_SetVDS_SECTION 1 324 #define U1_MApi_AUDIO_SetVSPK_SECTION 1 325 #define U1_MApi_AUDIO_SetSRS_SECTION 1 326 #define U1_MApi_AUDIO_SetBBE_SECTION 1 327 #define U1_MApi_AUDIO_VSPK_WMod_SECTION 1 328 #define U1_MApi_AUDIO_VSPK_SMod_SECTION 1 329 #define U1_MApi_AUDIO_SRS_DC_SECTION 1 330 #define U1_MApi_AUDIO_SRS_TruBass_SECTION 1 331 #define U1_MApi_AUDIO_SRS_SetTsxtPara_SECTION 1 332 #define U1_MApi_AUDIO_SetSRSTSHD_SECTION 1 333 #define U1_Mapi_SOUND_TSHD_TruBass_SECTION 1 334 #define U1_MApi_AUDIO_TSHD_Definition_SECTION 1 335 #define U1_Mapi_SOUND_TSHD_Definition_SECTION 1 336 #define U1_MApi_AUDIO_SRS_SetTshdPara_SECTION 1 337 #define U1_MApi_AUDIO_COPY_Parameter_SECTION 1 338 #define U1_MApi_AUDIO_SetKTVInfo_SECTION 1 339 #define U1_MApi_AUDIO_GetKTVInfo_SECTION 1 340 #define U1_MApi_AUDIO_SetMixModeVolume_SECTION 1 341 #define U1_MApi_AUDIO_SetMixModeMute_SECTION 1 342 #define U1_MApi_AUDIO_PlayMenuSound_SECTION 1 343 #define U1_MApi_AUDIO_SetCertMode_SECTION 1 344 #define U1_MApi_AUDIO_SetCommAudioInfo_SECTION 1 345 #define U1_MApi_AUDIO_SetMpegInfo_SECTION 1 346 #define U1_MApi_AUDIO_SetAC3Info_SECTION 1 347 #define U1_MApi_AUDIO_SetAC3PInfo_SECTION 1 348 #define U1_MApi_AUDIO_SetAACInfo_SECTION 1 349 #define U1_MApi_AUDIO_SetWmaInfo_SECTION 1 350 #define U1_MApi_AUDIO_SetDTSCommonCtrl_SECTION 1 351 #define U1_MApi_AUDIO_GetCommAudioInfo_SECTION 1 352 #define U1_MApi_AUDIO_GetMpegInfo_SECTION 1 353 #define U1_MApi_AUDIO_GetAC3Info_SECTION 1 354 #define U1_MApi_AUDIO_GetAC3PInfo_SECTION 1 355 #define U1_MApi_AUDIO_GetAACInfo_SECTION 1 356 #define U1_MApi_AUDIO_GetWmaInfo_SECTION 1 357 #define U1_MApi_AUDIO_GetDTSInfo_SECTION 1 358 #define U1_MApi_AUDIO_XPCM_Param_SECTION 1 359 #define U1_MApi_AUDIO_XPCM2_Param_SECTION 1 360 #define U1_MApi_AUDIO_XPCM2_CheckIntStatus_SECTION 1 361 #define U1_MApi_AUDIO_RA8_Param_SECTION 1 362 #define U1_MApi_AUDIO_PlayMelody_SECTION 1 363 #define U1_MApi_AUDIO_Init_SECTION 1 364 #define U1_MApi_AUDIO_StartDecode_SECTION 1 365 #define U1_MApi_AUDIO_StartBrowse_SECTION 1 366 #define U1_MApi_AUDIO_StopDecode_SECTION 1 367 #define U1_MApi_AUDIO_PauseDecode_SECTION 1 368 #define U1_MApi_AUDIO_CheckPlayDone_SECTION 1 369 #define U1_MApi_AUDIO_GetResidualBufferSize_SECTION 1 370 #define U1_MApi_AUDIO_GetPCMBufferSize_SECTION 1 371 #define U1_MApi_AUDIO_GetPCMBufferSize2_SECTION 1 372 #define U1_MApi_AUDIO_GetCurrentFrameNumber_SECTION 1 373 #define U1_MApi_AUDIO_GetSampleRate_SECTION 1 374 #define U1_MApi_AUDIO_GetBitRate_SECTION 1 375 #define U1_MApi_AUDIO_GetLayer_SECTION 1 376 #define U1_MApi_AUDIO_CheckInputRequest_SECTION 1 377 #define U1_MApi_AUDIO_SetInput_SECTION 1 378 #define U1_MApi_AUDIO_SetSampleRateIndex_SECTION 1 379 #define U1_MApi_AUDIO_SetXPCMParam_SECTION 1 380 #define U1_MApi_AUDIO_FileEndNotification_SECTION 1 381 #define U1_MApi_AUDIO_FileEndDataHandle_SECTION 1 382 #define U1_MApi_AUDIO_GetPlayTick_SECTION 1 383 #define U1_MApi_AUDIO_GetEsMEMCnt_SECTION 1 384 #define U1_MApi_AUDIO_SetASFParm_SECTION 1 385 #define U1_MApi_AUDIO_MM_SetInput_SECTION 1 386 #define U1_MApi_AUDIO_MM_CheckPlayDone_SECTION 1 387 #define U1_MApi_AUDIO_MM_CheckInputRequest_SECTION 1 388 #define U1_MApi_AUDIO_DmaReader_Init_SECTION 1 389 #define U1_MApi_AUDIO_DmaReader_AllInput_Init_SECTION 1 390 #define U1_MApi_AUDIO_DmaReader_WritePCM_SECTION 1 391 #define U1_MApi_AUDIO_DmaWriter_Init_SECTION 1 392 #define U1_MApi_AUDIO_USBPCM_Enable_SECTION 1 393 #define U1_MApi_AUDIO_USBPCM_SetFlag_SECTION 1 394 #define U1_MApi_AUDIO_USBPCM_GetFlag_SECTION 1 395 #define U1_MApi_AUDIO_USBPCM_GetMemInfo_SECTION 1 396 #define U1_MApi_AUDIO_PCMCapture_Init_SECTION 1 397 #define U1_MApi_AUDIO_PCMCapture_Start_SECTION 1 398 #define U1_MApi_AUDIO_PCMCapture_Stop_SECTION 1 399 #define U1_MApi_AUDIO_PCMCapture_Read_SECTION 1 400 #define U1_MApi_AUDIO_VoIP_Config_SECTION 1 401 #define U1_MApi_AUDIO_ALSA_Check_SECTION 1 402 #define U1_MApi_AUDIO_ALSA_Enable_SECTION 1 403 #define U1_MApi_AUDIO_UNI_CheckDecodeDone_SECTION 1 404 #define U1_MApi_AUDIO_UNI_SetOutput_SECTION 1 405 #define U1_MApi_AUDIO_UNI_Set_PCMInputWriteAddr_SECTION 1 406 #define U1_MApi_AUDIO_UNI_Get_OutPCMLevel_SECTION 1 407 #define U1_MApi_AUDIO_RingTask_SECTION 1 408 #define U1_MApi_AUDIO_Ring_DataTransfer_SECTION 1 409 #define U1_MApi_AUDIO_MM2_initAesInfo_SECTION 1 410 #define U1_MApi_AUDIO_MM2_checkAesInfo_SECTION 1 411 #define U1_MApi_AUDIO_MM2_inputAesFinished_SECTION 1 412 #define U1_MApi_AUDIO_PCM_Open_SECTION 1 413 #define U1_MApi_AUDIO_PCM_Close_SECTION 1 414 #define U1_MApi_AUDIO_PCM_Start_SECTION 1 415 #define U1_MApi_AUDIO_PCM_Stop_SECTION 1 416 #define U1_MApi_AUDIO_PCM_Set_SECTION 1 417 #define U1_MApi_AUDIO_PCM_Get_SECTION 1 418 #define U1_MApi_AUDIO_PCM_Read_SECTION 1 419 #define U1_MApi_AUDIO_PCM_Write_SECTION 1 420 #define U1_MApi_AUDIO_PCM_Flush_SECTION 1 421 #define U1_MApi_AUDIO_SetAudioParam2_SECTION 1 422 #define U1_MApi_AUDIO_GetAudioInfo2_SECTION 1 423 #define U1_MApi_AUDIO_GetDDRInfo_SECTION 1 424 #define U1_MApi_AUDIO_GetCaps_SECTION 1 425 #define U1_MApi_CEC_PortSelcet_SECTION 1 426 #define U1_MApi_CEC_GetLibVer_SECTION 1 427 #define U1_MApi_DDC2BI_GetInfo_SECTION 1 428 #define U1_MApi_DDC2BI_GetStatus_SECTION 1 429 #define U1_MApi_DDC2BI_SetDbgLevel_SECTION 1 430 #define U1_MApi_CEC_Exit_SECTION 1 431 #define U1_MApi_CEC_Init_SECTION 1 432 #define U1_MApi_CEC_InitChip_SECTION 1 433 #define U1_MApi_CEC_SetMyLogicalAddress_SECTION 1 434 #define U1_MApi_CEC_ChkRxBuf_SECTION 1 435 #define U1_MApi_CEC_TxSendMsg_SECTION 1 436 #define U1_MApi_CEC_TxSendMsg2_SECTION 1 437 #define U1_MsAPI_CecTxSendPollingMsg_SECTION 1 438 #define U1_MApi_CEC_Msg_ActiveSource_SECTION 1 439 #define U1_MApi_CEC_Msg_RoutingChange_SECTION 1 440 #define U1_MApi_CEC_Msg_ReqActiveSource_SECTION 1 441 #define U1_MApi_CEC_Msg_SetStreamPath_SECTION 1 442 #define U1_MApi_CEC_Msg_Standby_SECTION 1 443 #define U1_MApi_CEC_Msg_RecordOff_SECTION 1 444 #define U1_MsAPI_CEC_Msg_RecordOn_SECTION 1 445 #define U1_MApi_CEC_Msg_ReportCECVersion_SECTION 1 446 #define U1_MApi_CEC_Msg_ReqCECVersion_SECTION 1 447 #define U1_MApi_CEC_Msg_ReportPhycalAddress_SECTION 1 448 #define U1_MApi_CEC_Msg_ReqPhycalAddress_SECTION 1 449 #define U1_MApi_CEC_Msg_DeckControl_SECTION 1 450 #define U1_MApi_CEC_Msg_DecStatus_SECTION 1 451 #define U1_MApi_CEC_MSg_GiveDeckStatus_SECTION 1 452 #define U1_MApi_CEC_MSg_DCPlay_SECTION 1 453 #define U1_MApi_CEC_Msg_ReqMenuStatus_SECTION 1 454 #define U1_MApi_CEC_Msg_UserCtrlPressed_SECTION 1 455 #define U1_MApi_CEC_Msg_UserCtrlReleased_SECTION 1 456 #define U1_MApi_CEC_Msg_ReportPowerStatus_SECTION 1 457 #define U1_MApi_CEC_Msg_ReqPowerStatus_SECTION 1 458 #define U1_MApi_CEC_Msg_FeatureAbort_SECTION 1 459 #define U1_MApi_CEC_Msg_Abort_SECTION 1 460 #define U1_MApi_CEC_Msg_SendMenuLanguage_SECTION 1 461 #define U1_MsAPI_CecMsg_ReqARCInitiation_SECTION 1 462 #define U1_MsAPI_CecMsg_ReqARCTermination_SECTION 1 463 #define U1_MsAPI_CecMsg_AudioModeReq_SECTION 1 464 #define U1_MApi_CEC_Msg_GiveAudioStatus_SECTION 1 465 #define U1_MApi_CEC_Get_Header_SECTION 1 466 #define U1_MApi_CEC_Get_OpCode_SECTION 1 467 #define U1_MApi_CEC_Get_Para_SECTION 1 468 #define U1_MApi_CEC_GetCmdLen_SECTION 1 469 #define U1_MApi_CEC_SetActiveLogicalAddress_SECTION 1 470 #define U1_MApi_CEC_GetActiveLogicalAddress_SECTION 1 471 #define U1_MApi_CEC_GetPowerStatus_SECTION 1 472 #define U1_MApi_CEC_GetFifoIdx_SECTION 1 473 #define U1_MApi_CEC_SetFifoIdx_SECTION 1 474 #define U1_MApi_CEC_SetActivePowerStatus_SECTION 1 475 #define U1_MApi_CEC_GetActivePowerStatus_SECTION 1 476 #define U1_MApi_CEC_SetActivePhysicalAddress_SECTION 1 477 #define U1_MApi_CEC_SetActiveDeviceCECVersion_SECTION 1 478 #define U1_MApi_CEC_SetActiveDeviceType_SECTION 1 479 #define U1_MApi_CEC_GetMsgCnt_SECTION 1 480 #define U1_MApi_CEC_SetMsgCnt_SECTION 1 481 #define U1_MApi_CEC_GetRxData_SECTION 1 482 #define U1_MApi_CEC_CheckFrame_SECTION 1 483 #define U1_MApi_CEC_CheckExistDevices_SECTION 1 484 #define U1_MApi_CEC_ConfigWakeUp_SECTION 1 485 #define U1_MApi_CEC_Enabled_SECTION 1 486 #define U1_MApi_CEC_SetMyPhysicalAddress_SECTION 1 487 #define U1_MApi_CEC_GetTxStatus_SECTION 1 488 #define U1_MApi_CEC_SetPowerState_SECTION 1 489 #define U1_MApi_CEC_SetRetryCount_SECTION 1 490 #define U1_MApi_CEC_ConfigWakeupInfoVendorID_SECTION 1 491 #define U1_MApi_CEC_NextDevice_SECTION 1 492 #define U1_MApi_CEC_IsRxBufEmpty_SECTION 1 493 #define U1_MApi_CEC_CheckDeviceIsTx_SECTION 1 494 #define U1_MApi_CEC_Ctrl_SECTION 1 495 #define U1_mapi_CEC_GetConfig_SECTION 1 496 #define U1_MApi_DAC_GetLibVer_SECTION 1 497 #define U1_MApi_DAC_GetInfo_SECTION 1 498 #define U1_MApi_DAC_GetStatus_SECTION 1 499 #define U1_MApi_DAC_SetDbgLevel_SECTION 1 500 #define U1_MApi_DAC_Init_SECTION 1 501 #define U1_MApi_DAC_Enable_SECTION 1 502 #define U1_MApi_DAC_SetClkInv_SECTION 1 503 #define U1_MApi_DAC_SetYPbPrOutputTiming_SECTION 1 504 #define U1_MApi_DAC_SetOutputSource_SECTION 1 505 #define U1_MApi_DAC_SetOutputLevel_SECTION 1 506 #define U1_MApi_DAC_SetOutputSwapSel_SECTION 1 507 #define U1_MApi_DAC_OnOffSD_SECTION 1 508 #define U1_MApi_DAC_GetSDStatus_SECTION 1 509 #define U1_MApi_DAC_OnOffHD_SECTION 1 510 #define U1_MApi_DAC_GetHDStatus_SECTION 1 511 #define U1_MApi_DAC_ClkSel_SECTION 1 512 #define U1_MApi_DAC_DumpTable_SECTION 1 513 #define U1_MApi_DAC_Exit_SECTION 1 514 #define U1_MApi_DAC_SetIHalfOutput_SECTION 1 515 #define U1_MApi_DAC_SetQuartOutput_SECTION 1 516 #define U1_MApi_DAC_SetDacState_SECTION 1 517 #define U1_MApi_DAC_HotPlugDetect_SECTION 1 518 #define U1_Mapi_DAC_SetPowerState_SECTION 1 519 #define U1_MApi_DAC_SetWSSOnOff_SECTION 1 520 #define U1_MApi_DAC_GetWSSStatus_SECTION 1 521 #define U1_MApi_DAC_ResetWSSData_SECTION 1 522 #define U1_MApi_DAC_SetWSSOutput_SECTION 1 523 #define U1_MApi_DAC_EnableICT_SECTION 1 524 #define U1_MApi_DMX_InitLibResource_SECTION 1 525 #define U1_MApi_DMX_SetFW_SECTION 1 526 #define U1_MApi_DMX_SetFwDataAddr_SECTION 1 527 #define U1_MApi_DMX_SetHK_SECTION 1 528 #define U1_MApi_DMX_Init_SECTION 1 529 #define U1_MApi_DMX_TSPInit_GetConfig_SECTION 1 530 #define U1_MApi_DMX_TSPInit_SECTION 1 531 #define U1_MApi_DMX_Exit_SECTION 1 532 #define U1_MApi_DMX_ForceExit_SECTION 1 533 #define U1_MApi_DMX_Suspend_SECTION 1 534 #define U1_MApi_DMX_Resume_SECTION 1 535 #define U1_MApi_DMX_ChkAlive_SECTION 1 536 #define U1_MApi_DMX_Reset_SECTION 1 537 #define U1_MApi_DMX_ReleaseSemaphone_SECTION 1 538 #define U1_MApi_DMX_WriteProtect_Enable_SECTION 1 539 #define U1_MApi_DMX_OrzWriteProtect_Enable_SECTION 1 540 #define U1_MApi_DMX_Read_DropPktCnt_SECTION 1 541 #define U1_MApi_DMX_SetPowerState_SECTION 1 542 #define U1_MApi_DMX_TEI_RemoveErrorPkt_SECTION 1 543 #define U1_MApi_DMX_SetPacketMode_SECTION 1 544 #define U1_MApi_DMX_SetMergeStrSyncByte_SECTION 1 545 #define U1_MApi_DMX_DropScmbPkt_SECTION 1 546 #define U1_MApi_DMX_ResAllocate_SECTION 1 547 #define U1_MApi_DMX_ResFree_SECTION 1 548 #define U1_MApi_DMX_Pcr_Get_MapSTC_SECTION 1 549 #define U1_MApi_DMX_SetOwner_SECTION 1 550 #define U1_MApi_DMX_GetCap_SECTION 1 551 #define U1_MApi_DMX_GetCap_Ex_SECTION 1 552 #define U1_MApi_DMX_Parl_Invert_SECTION 1 553 #define U1_MApi_DMX_SetBurstLen_SECTION 1 554 #define U1_MApi_DMX_VQ_Enable_SECTION 1 555 #define U1_MApi_DMX_FlowSet_SECTION 1 556 #define U1_MApi_DMX_PVR_FlowSet_SECTION 1 557 #define U1_MApi_DMX_Get_FlowInput_Status_SECTION 1 558 #define U1_MApi_DMX_FlowEnable_SECTION 1 559 #define U1_MApi_DMX_Flow_DscmbEng_SECTION 1 560 #define U1_MApi_DMX_TsOutputPadCfg_SECTION 1 561 #define U1_MApi_DMX_TsS2POutputClkPhase_SECTION 1 562 #define U1_MApi_DMX_STC64_Mode_Enable_SECTION 1 563 #define U1_MApi_DMX_Stc_Get_SECTION 1 564 #define U1_MApi_DMX_Stc_Set_SECTION 1 565 #define U1_MApi_DMX_Pcr_Get_SECTION 1 566 #define U1_MApi_DMX_Stc_Select_SECTION 1 567 #define U1_MApi_DMX_Stc_Eng_Get_SECTION 1 568 #define U1_MApi_DMX_Stc_Eng_Set_SECTION 1 569 #define U1_MApi_DMX_Pcr_Eng_Get_SECTION 1 570 #define U1_MApi_DMX_STC_UpdateCtrl_SECTION 1 571 #define U1_MApi_DMX_Stc_Eng_SetOffset_SECTION 1 572 #define U1_MApi_DMX_Stc_Clk_Adjust_SECTION 1 573 #define U1_MApi_DMX_Open_SECTION 1 574 #define U1_MApi_DMX_Open_Ex_SECTION 1 575 #define U1_MApi_DMX_Close_SECTION 1 576 #define U1_MApi_DMX_Start_SECTION 1 577 #define U1_MApi_DMX_Stop_SECTION 1 578 #define U1_MApi_DMX_Info_SECTION 1 579 #define U1_MApi_DMX_Info_Ex_SECTION 1 580 #define U1_MApi_DMX_Pid_SECTION 1 581 #define U1_MApi_DMX_IsStart_SECTION 1 582 #define U1_MApi_DMX_CopyData_SECTION 1 583 #define U1_MApi_DMX_Proc_SECTION 1 584 #define U1_MApi_DMX_Change_FilterSource_SECTION 1 585 #define U1_MApi_DMX_LiveSrcSwitch_SECTION 1 586 #define U1_MApi_DMX_GetOwner_SECTION 1 587 #define U1_MApi_DMX_Get_FltScmbSts_SECTION 1 588 #define U1_MApi_DMX_Get_PesScmbSts_SECTION 1 589 #define U1_MApi_DMX_Get_TsScmbSts_SECTION 1 590 #define U1_MApi_DMX_Open_MultiFlt_SECTION 1 591 #define U1_MApi_DMX_Drop_Enable_SECTION 1 592 #define U1_MApi_DMX_SectReset_SECTION 1 593 #define U1_MApi_DMX_SectReadSet_SECTION 1 594 #define U1_MApi_DMX_SectReadGet_SECTION 1 595 #define U1_MApi_DMX_SectWriteGet_SECTION 1 596 #define U1_MApi_DMX_SectStartGet_SECTION 1 597 #define U1_MApi_DMX_SectEndGet_SECTION 1 598 #define U1_MApi_DMX_SectPatternSet_SECTION 1 599 #define U1_MApi_DMX_TTX_WriteGet_SECTION 1 600 #define U1_MApi_DMX_GetAccess_SECTION 1 601 #define U1_MApi_DMX_ReleaseAccess_SECTION 1 602 #define U1_MApi_DMX_AVFifo_Reset_SECTION 1 603 #define U1_MApi_DMX_AVFifo_Status_SECTION 1 604 #define U1_MApi_DMX_RemoveDupAVPkt_SECTION 1 605 #define U1_MApi_DMX_RemoveDupAVFifoPkt_SECTION 1 606 #define U1_MApi_DMX_AU_BD_Mode_Enable_SECTION 1 607 #define U1_MApi_DMX_AVFifo_BlockEnable_SECTION 1 608 #define U1_MApi_DMX_Pvr_Open_SECTION 1 609 #define U1_MApi_DMX_Pvr_Close_SECTION 1 610 #define U1_MApi_DMX_Pvr_Pause_SECTION 1 611 #define U1_MApi_DMX_Pvr_Pid_Open_SECTION 1 612 #define U1_MApi_DMX_Pvr_Pid_Close_SECTION 1 613 #define U1_MApi_DMX_Pvr_Start_SECTION 1 614 #define U1_MApi_DMX_Pvr_Stop_SECTION 1 615 #define U1_MApi_DMX_Pvr_WriteGet_SECTION 1 616 #define U1_MApi_DMX_PVR_SetPacketMode_SECTION 1 617 #define U1_MApi_DMX_Pvr_SetRecordStamp_SECTION 1 618 #define U1_MApi_DMX_Pvr_GetRecordStamp_SECTION 1 619 #define U1_MApi_DMX_Pvr_MOBF_Enable_SECTION 1 620 #define U1_MApi_DMX_Pvr_SetPlaybackStamp_SECTION 1 621 #define U1_MApi_DMX_Pvr_GetPlaybackStamp_SECTION 1 622 #define U1_MApi_DMX_Pvr_TimeStampEnable_SECTION 1 623 #define U1_MApi_DMX_Pvr_TimeStampDisable_SECTION 1 624 #define U1_MApi_DMX_Pvr_Eng_Open_SECTION 1 625 #define U1_MApi_DMX_Pvr_Eng_Close_SECTION 1 626 #define U1_MApi_DMX_Pvr_Eng_Pause_SECTION 1 627 #define U1_MApi_DMX_Pvr_Eng_Pid_Open_SECTION 1 628 #define U1_MApi_DMX_Pvr_Eng_Pid_Close_SECTION 1 629 #define U1_MApi_DMX_Pvr_Eng_Start_SECTION 1 630 #define U1_MApi_DMX_Pvr_Eng_Stop_SECTION 1 631 #define U1_MApi_DMX_Pvr_Eng_WriteGet_SECTION 1 632 #define U1_MApi_DMX_Pvr_Eng_SetPacketMode_SECTION 1 633 #define U1_MApi_DMX_Pvr_Eng_SetRecordStamp_SECTION 1 634 #define U1_MApi_DMX_Pvr_Eng_GetRecordStamp_SECTION 1 635 #define U1_MApi_DMX_Pvr_Eng_MOBF_Enable_SECTION 1 636 #define U1_MApi_DMX_Pvr_Eng_IsStart_SECTION 1 637 #define U1_MApi_DMX_Pvr_Eng_Pid_SECTION 1 638 #define U1_MApi_DMX_Pvr_Eng_SetRecordStampClk_SECTION 1 639 #define U1_MApi_DMX_Pvr_Eng_CallbackSize_SECTION 1 640 #define U1_MApi_DMX_Pvr_Eng_SetCaMode_SECTION 1 641 #define U1_MApi_DMX_Pvr_Eng_SetPlaybackStampClk_SECTION 1 642 #define U1_MApi_DMX_PvrCA_Pid_Open_SECTION 1 643 #define U1_MApi_DMX_PvrCA_Pid_Close_SECTION 1 644 #define U1_MApi_DMX_PvrCA_Start_SECTION 1 645 #define U1_MApi_DMX_PvrCA_Stop_SECTION 1 646 #define U1_MApi_DMX_PvrCA_Eng_Pid_Open_SECTION 1 647 #define U1_MApi_DMX_PvrCA_Eng_Pid_Close_SECTION 1 648 #define U1_MApi_DMX_PvrCA_Eng_Start_SECTION 1 649 #define U1_MApi_DMX_PvrCA_Eng_Stop_SECTION 1 650 #define U1_MApi_DMX_Filein_Pvr_Eng_Pid_Open_SECTION 1 651 #define U1_MApi_DMX_Filein_Pvr_Eng_Pid_Close_SECTION 1 652 #define U1_MApi_DMX_Filein_Pvr_Eng_Start_SECTION 1 653 #define U1_MApi_DMX_Filein_Pvr_Eng_Stop_SECTION 1 654 #define U1_MApi_DMX_Filein_Start_SECTION 1 655 #define U1_MApi_DMX_Filein_Stop_SECTION 1 656 #define U1_MApi_DMX_Filein_Info_SECTION 1 657 #define U1_MApi_DMX_Filein_Pause_SECTION 1 658 #define U1_MApi_DMX_Filein_Resume_SECTION 1 659 #define U1_MApi_DMX_Filein_IsIdle_SECTION 1 660 #define U1_MApi_DMX_Filein_IsBusy_SECTION 1 661 #define U1_MApi_DMX_Filein_IsPause_SECTION 1 662 #define U1_MApi_DMX_Filein_CMDQ_Reset_SECTION 1 663 #define U1_MApi_DMX_Filein_CMDQ_GetEmptyNum_SECTION 1 664 #define U1_MApi_DMX_Filein_CMDQ_FIFOWriteLevel_SECTION 1 665 #define U1_MApi_DMX_BypassFileInTimeStamp_SECTION 1 666 #define U1_MApi_DMX_GetFileInTimeStamp_SECTION 1 667 #define U1_MApi_DMX_Filein_GetReadAddr_SECTION 1 668 #define U1_MApi_DMX_Filein_MOBF_Enable_SECTION 1 669 #define U1_MApi_DMX_Filein_Eng_Start_SECTION 1 670 #define U1_MApi_DMX_Filein_Eng_Stop_SECTION 1 671 #define U1_MApi_DMX_Filein_Eng_Info_SECTION 1 672 #define U1_MApi_DMX_Filein_Eng_Pause_SECTION 1 673 #define U1_MApi_DMX_Filein_Eng_Resume_SECTION 1 674 #define U1_MApi_DMX_Filein_Eng_IsIdle_SECTION 1 675 #define U1_MApi_DMX_Filein_Eng_IsBusy_SECTION 1 676 #define U1_MApi_DMX_Filein_Eng_IsPause_SECTION 1 677 #define U1_MApi_DMX_Filein_Eng_CMDQ_Reset_SECTION 1 678 #define U1_MApi_DMX_Filein_Eng_CMDQ_GetEmptyNum_SECTION 1 679 #define U1_MApi_DMX_Filein_Eng_BypassFileInTimeStamp_SECTION 1 680 #define U1_MApi_DMX_Filein_Eng_CMDQ_FIFOWriteLevel_SECTION 1 681 #define U1_MApi_DMX_Filein_Eng_GetFileInTimeStamp_SECTION 1 682 #define U1_MApi_DMX_Filein_Eng_GetReadAddr_SECTION 1 683 #define U1_MApi_DMX_Filein_Eng_MOBF_Enable_SECTION 1 684 #define U1_MApi_DMX_Filein_Eng_PlaybackTimeStampEnable_SECTION 1 685 #define U1_MApi_DMX_Filein_Eng_PlaybackTimeStampDisable_SECTION 1 686 #define U1_MApi_DMX_Filein_Eng_SetPlaybackStamp_SECTION 1 687 #define U1_MApi_DMX_Filein_Eng_GetPlaybackStamp_SECTION 1 688 #define U1_MApi_DMX_MMFI_Filein_IsIdle_SECTION 1 689 #define U1_MApi_DMX_MMFI_Filein_IsBusy_SECTION 1 690 #define U1_MApi_DMX_MMFI_Filein_CMDQ_Reset_SECTION 1 691 #define U1_MApi_DMX_MMFI_Filein_CMDQ_GetEmptyNum_SECTION 1 692 #define U1_MApi_DMX_MMFI_Filein_Start_SECTION 1 693 #define U1_MApi_DMX_MMFI_Filein_Info_SECTION 1 694 #define U1_MApi_DMX_MMFI_Filein_BypassTimeStamp_SECTION 1 695 #define U1_MApi_DMX_MMFI_GetFileInTimeStamp_SECTION 1 696 #define U1_MApi_DMX_MMFI_Pid_Open_SECTION 1 697 #define U1_MApi_DMX_MMFI_Pid_Close_SECTION 1 698 #define U1_MApi_DMX_MMFI_Filein_CMDQ_FIFOWriteLevel_SECTION 1 699 #define U1_MApi_DMX_MMFI_SetPlaybackTimeStamp_SECTION 1 700 #define U1_MApi_DMX_MMFI_GetPlaybackTimeStamp_SECTION 1 701 #define U1_MApi_DMX_MMFI_RemoveDupAVPkt_SECTION 1 702 #define U1_MApi_DMX_MMFI_TimeStampEnable_SECTION 1 703 #define U1_MApi_DMX_MMFI_TimeStampDisable_SECTION 1 704 #define U1_MApi_DMX_MMFI_MOBF_Enable_SECTION 1 705 #define U1_MApi_DMX_MMFI_MOBF_SetLevel_SECTION 1 706 #define U1_MApi_DMX_MMFI_TimeStampClk_SECTION 1 707 #define U1_MApi_DMX_TSO_Filein_Info_SECTION 1 708 #define U1_MApi_DMX_TSO_Filein_IsIdle_SECTION 1 709 #define U1_MApi_DMX_TSO_Filein_CMDQ_GetEmptyNum_SECTION 1 710 #define U1_MApi_DMX_TSO_Filein_CMDQ_Reset_SECTION 1 711 #define U1_MApi_DMX_TSO_Filein_Start_SECTION 1 712 #define U1_MApi_DMX_TSO_Filein_Stop_SECTION 1 713 #define U1_MApi_DMX_TSO_SetPlaybackTimeStamp_SECTION 1 714 #define U1_MApi_DMX_TSO_GetPlaybackStamp_SECTION 1 715 #define U1_MApi_DMX_TSO_GetFileInTimeStamp_SECTION 1 716 #define U1_MApi_DMX_TSO_BypassFileInTimeStamp_SECTION 1 717 #define U1_MApi_DMX_TSO_TimeStampEnable_SECTION 1 718 #define U1_MApi_DMX_TSO_TimeStampDisable_SECTION 1 719 #define U1_MApi_DMX_TSO_SetOutClk_SECTION 1 720 #define U1_MApi_DMX_TSO_OutputEnable_SECTION 1 721 #define U1_MApi_DMX_TSO_LocalStreamId_SECTION 1 722 #define U1_MApi_DMX_TSO_SVQBuf_Set_SECTION 1 723 #define U1_MApi_DMX_TSO_Flow_InputCfg_SECTION 1 724 #define U1_MApi_DMX_TSO_Flow_OutputCfg_SECTION 1 725 #define U1_MApi_DMX_TSO_Configure_SECTION 1 726 #define U1_MApi_DMX_TSO_Pid_Open_SECTION 1 727 #define U1_MApi_DMX_TSO_Pid_Close_SECTION 1 728 #define U1_MApi_DMX_TSO_Filein_GetReadAddr_SECTION 1 729 #define U1_MApi_TSP_Get_FW_VER_SECTION 1 730 #define U1_MApi_DMX_SetDbgLevel_SECTION 1 731 #define U1_MApi_DMX_Get_Intr_Count_SECTION 1 732 #define U1_MApi_DMX_GetLibVer_SECTION 1 733 #define U1_MApi_DMX_GetDbgPortInfo_SECTION 1 734 #define U1_MApi_DMX_SetFwDbgParam_SECTION 1 735 #define U1_MApi_DMX_Get_DisContiCnt_SECTION 1 736 #define U1_MApi_DMX_Get_DropPktCnt_SECTION 1 737 #define U1_MApi_DMX_Get_LockPktCnt_SECTION 1 738 #define U1_MApi_DMX_Get_AVPktCnt_SECTION 1 739 #define U1_MApi_DMX_Get_SecTEI_PktCount_SECTION 1 740 #define U1_MApi_DMX_Reset_SecTEI_PktCount_SECTION 1 741 #define U1_MApi_DMX_Get_SecDisCont_PktCount_SECTION 1 742 #define U1_MApi_DMX_Reset_SecDisCont_PktCount_SECTION 1 743 #define U1_MApi_DMX_FQ_SetFltRushPass_SECTION 1 744 #define U1_MApi_DMX_FQ_Init_SECTION 1 745 #define U1_MApi_DMX_FQ_Exit_SECTION 1 746 #define U1_MApi_DMX_FQ_RushEnable_SECTION 1 747 #define U1_MApi_DMX_FQ_SkipRushData_SECTION 1 748 #define U1_MApi_DMX_FQ_Configure_SECTION 1 749 #define U1_MApi_DMX_FQ_SetRushAddr_SECTION 1 750 #define U1_MApi_DMX_FQ_ReadGet_SECTION 1 751 #define U1_MApi_DMX_FQ_WriteGet_SECTION 1 752 #define U1_MApi_DMX_MStr_SyncByte_SECTION 1 753 #define U1_MApi_DMX_Get_PipeId_SECTION 1 754 #define U1_MApi_DMX_CMD_Run_SECTION 1 755 #define U1_MApi_DMX_TEE_SetControl_SECTION 1 756 #define U1_MApi_DMX_TEE_ProcReeCmd_SECTION 1 757 #define U1_MApi_DMX_TSIO_RegisterIntCb_SECTION 1 758 #define U1_MApi_DMX_TSIO_Init_SECTION 1 759 #define U1_MApi_DMX_TSIO_Open_SECTION 1 760 #define U1_MApi_DMX_TSIO_Exit_SECTION 1 761 #define U1_MApi_DMX_TSIO_Close_SECTION 1 762 #define U1_MApi_DMX_TSIO_Cmd_SECTION 1 763 #define U1_MApi_DMX_TSIO_CC_SECTION 1 764 #define U1_MApi_DMX_TSIO_GetInfo_SECTION 1 765 #define U1_MApi_DMX_TSIO_Service_SetDMAoutVC_SECTION 1 766 #define U1_MApi_DMX_TSIO_Service_DMAout_WriteGet_SECTION 1 767 #define U1_MApi_DMX_TSIO_Service_SetDestination_SECTION 1 768 #define U1_MApi_DMX_TSIO_Service_DMAin_PidOpen_SECTION 1 769 #define U1_MApi_DMX_TSIO_Service_DMAin_PidClose_SECTION 1 770 #define U1_MApi_DMX_TSIO_Service_SetDMAinVC_SECTION 1 771 #define U1_MApi_DMX_TSIO_Service_DMAinVC_Start_SECTION 1 772 #define U1_MApi_DMX_TSIO_Service_SetLocdecKey_SECTION 1 773 #define U1_MApi_DMX_TSIO_Service_LocdecKeyEnable_SECTION 1 774 #define U1_MApi_DMX_TSIO_Service_Alloc_SECTION 1 775 #define U1_MApi_DMX_TSIO_Service_Free_SECTION 1 776 #define U1_MApi_DMX_TSIO_Service_PidOpen_SECTION 1 777 #define U1_MApi_DMX_TSIO_Service_PidClose_SECTION 1 778 #define U1_MApi_GFX_Init_SECTION 1 779 #define U1_MApi_GFX_GetConfig_SECTION 1 780 #define U1_MApi_GFX_GetFontInfo_SECTION 1 781 #define U1_MApi_GFX_GetClip_SECTION 1 782 #define U1_MApi_GFX_GetIntensity_SECTION 1 783 #define U1_MApi_GFX_GetTAGID_SECTION 1 784 #define U1_MApi_GFX_GetNextTAGID_SECTION 1 785 #define U1_MApi_GFX_GetInfo_SECTION 1 786 #define U1_MApi_GFX_GetGECaps_SECTION 1 787 #define U1_MApi_GFX_DrawLine_SECTION 1 788 #define U1_MApi_GFX_RectFill_SECTION 1 789 #define U1_MApi_GFX_TriFill_SECTION 1 790 #define U1_MApi_GFX_SpanFill_SECTION 1 791 #define U1_MApi_GFX_SetSrcBufferInfo_SECTION 1 792 #define U1_MApi_GFX_SetDstBufferInfo_SECTION 1 793 #define U1_MApi_GFX_SetROP2_SECTION 1 794 #define U1_MApi_GFX_SetSrcColorKey_SECTION 1 795 #define U1_MApi_GFX_SetDstColorKey_SECTION 1 796 #define U1_MApi_GFX_SetAlpha_SECTION 1 797 #define U1_MApi_GFX_EnableAlphaBlending_SECTION 1 798 #define U1_MApi_GFX_EnableDFBBlending_SECTION 1 799 #define U1_MApi_GFX_SetDFBBldFlags_SECTION 1 800 #define U1_MApi_GFX_SetDFBBldOP_SECTION 1 801 #define U1_MApi_GFX_SetDFBBldConstColor_SECTION 1 802 #define U1_MApi_GFX_BitBlt_SECTION 1 803 #define U1_MApi_GFX_BitBltEx_SECTION 1 804 #define U1_MApi_GFX_SetIntensity_SECTION 1 805 #define U1_MApi_GFX_SetClip_SECTION 1 806 #define U1_MApi_GFX_SetItalic_SECTION 1 807 #define U1_MApi_GFX_SetDither_SECTION 1 808 #define U1_MApi_GFX_SetOnePixelMode_SECTION 1 809 #define U1_MApi_GFX_SetNearestMode_SECTION 1 810 #define U1_MApi_GFX_SetMirror_SECTION 1 811 #define U1_MApi_GFX_SetDstMirror_SECTION 1 812 #define U1_MApi_GFX_SetRotate_SECTION 1 813 #define U1_MApi_GFX_SetTAGID_SECTION 1 814 #define U1_MApi_GFX_WaitForTAGID_SECTION 1 815 #define U1_MApi_GFX_SetNextTAGID_SECTION 1 816 #define U1_MApi_GFX_EnableVCmdQueue_SECTION 1 817 #define U1_MApi_GFX_SetVCmdBuffer_SECTION 1 818 #define U1_MApi_GE_SetVCmd_W_Thread_SECTION 1 819 #define U1_MApi_GE_SetVCmd_R_Thread_SECTION 1 820 #define U1_MApi_GFX_FlushQueue_SECTION 1 821 #define U1_MApi_GFX_PowerOn_SECTION 1 822 #define U1_MApi_GFX_PowerOff_SECTION 1 823 #define U1_MApi_GFX_SetPowerState_SECTION 1 824 #define U1_MApi_GFX_WriteProtect_SECTION 1 825 #define U1_MApi_GFX_SetPaletteOpt_SECTION 1 826 #define U1_MApi_GFX_DrawBitmap_SECTION 1 827 #define U1_MApi_GFX_TextOut_SECTION 1 828 #define U1_MApi_GFX_CharacterOut_SECTION 1 829 #define U1_MApi_GFX_GetBitmapInfo_SECTION 1 830 #define U1_MApi_GFX_GetFrameBufferInfo_SECTION 1 831 #define U1_MApi_GFX_TrapezoidFill_SECTION 1 832 #define U1_MApi_GFX_EnableTrapezoidAA_SECTION 1 833 #define U1_MApi_GFX_EnableTrapSubPixCorr_SECTION 1 834 #define U1_MApi_GFX_QueryTextDispLength_SECTION 1 835 #define U1_MApi_GFX_SetAlphaSrcFrom_SECTION 1 836 #define U1_MApi_GFX_SetAlphaBlending_SECTION 1 837 #define U1_MApi_GFX_QueryDFBBldCaps_SECTION 1 838 #define U1_MApi_GFX_SetDFBBldSrcColorMask_SECTION 1 839 #define U1_MApi_GFX_Line_Pattern_Reset_SECTION 1 840 #define U1_MApi_GFX_Set_Line_Pattern_SECTION 1 841 #define U1_MApi_GFX_BeginDraw_SECTION 1 842 #define U1_MApi_GFX_EndDraw_SECTION 1 843 #define U1_MApi_GFX_YUV_Get_SECTION 1 844 #define U1_MApi_GFX_RectFrame_SECTION 1 845 #define U1_MApi_GFX_SetDC_CSC_FMT_SECTION 1 846 #define U1_MApi_GFX_SetPatchMode_SECTION 1 847 #define U1_MApi_GFX_GetBufferInfo_SECTION 1 848 #define U1_MApi_GFX_ClearFrameBufferByWord_SECTION 1 849 #define U1_MApi_GFX_ClearFrameBuffer_SECTION 1 850 #define U1_MApi_GFX_SetAlpha_ARGB1555_SECTION 1 851 #define U1_MApi_GFX_GetAlpha_ARGB1555_SECTION 1 852 #define U1_MApi_GFX_RegisterGetFontCB_SECTION 1 853 #define U1_MApi_GFX_RegisterGetBMPCB_SECTION 1 854 #define U1_MApi_GFX_SetAlphaCmp_SECTION 1 855 #define U1_MApi_GFX_SetDbgLevel_SECTION 1 856 #define U1_MApi_GFX_SetStrBltSckType_SECTION 1 857 #define U1_MApi_GFX_SetHK_SECTION 1 858 #define U1_MApi_GFX_GetHK_SECTION 1 859 #define U1_MApi_GFX_DrawOval_SECTION 1 860 #define U1_MApi_GFX_GetStatus_SECTION 1 861 #define U1_MApi_GFX_GetLibVer_SECTION 1 862 #define U1_MApi_GFX_GetAlignCaps_SECTION 1 863 #define U1_msAPI_GE_ClearFrameBufferByWord_SECTION 1 864 #define U1_MDrv_GE_EnableAlphaBlending_SECTION 1 865 #define U1_MDrv_GE_SetAlphaBlending_SECTION 1 866 #define U1_MDrv_GE_PE_SetIntensity_SECTION 1 867 #define U1_MApi_GFX_SetTLBMode_SECTION 1 868 #define U1_MApi_GFX_SetTLBBaseADDR_SECTION 1 869 #define U1_MApi_GFX_SetTLBFlushTable_SECTION 1 870 #define U1_MApi_GFX_SetTLBTag_SECTION 1 871 #define U1_MApi_GFX_SetConfig_SECTION 1 872 #define U1_MApi_GFX_BitbltByTwoSourceBuffer_SECTION 1 873 #define U1_MApi_GE_Exit_SECTION 1 874 #define U1_MApi_GOP_Init_SECTION 1 875 #define U1_MApi_GOP_GetInfo_SECTION 1 876 #define U1_MApi_GOP_GetStatus_SECTION 1 877 #define U1_MApi_GOP_SetDbgLevel_SECTION 1 878 #define U1_MApi_GOP_GetLibVer_SECTION 1 879 #define U1_MApi_GOP_InitByGOP_SECTION 1 880 #define U1_MApi_GOP_GWIN_SwitchGOP_SECTION 1 881 #define U1_MApi_GOP_Initialize_StretchWindow_SECTION 1 882 #define U1_MApi_GOP_SetGOPClk_SECTION 1 883 #define U1_MApi_GOP_GWIN_GetCurrentGOP_SECTION 1 884 #define U1_MApi_GOP_GWIN_GetMaxGOPNum_SECTION 1 885 #define U1_MApi_GOP_GWIN_GetGwinNum_SECTION 1 886 #define U1_MApi_GOP_GWIN_GetTotalGwinNum_SECTION 1 887 #define U1_MApi_GOP_PowerOn_SECTION 1 888 #define U1_MApi_GOP_PowerOff_SECTION 1 889 #define U1_Mapi_GOP_GWIN_ResetGOP_SECTION 1 890 #define U1_MApi_GOP_GWIN_ResetPool_SECTION 1 891 #define U1_MApi_GOP_SetPowerState_SECTION 1 892 #define U1_MApi_GOP_SetGOPBWStrength_SECTION 1 893 #define U1_MApi_GOP_GetGOPBWStrength_SECTION 1 894 #define U1_MApi_GOP_SetGOPHStart_SECTION 1 895 #define U1_MApi_GOP_SetGOPBrightness_SECTION 1 896 #define U1_MApi_GOP_GetGOPBrightness_SECTION 1 897 #define U1_MApi_GOP_EnableLBCouple_SECTION 1 898 #define U1_MApi_GOP_VE_SetOutputTiming_SECTION 1 899 #define U1_MApi_GOP_Enable_VEOSD_SECTION 1 900 #define U1_MApi_GOP_MIXER_SetOutputTiming_SECTION 1 901 #define U1_MApi_GOP_MIXER_SetMIXER2OPOutputTiming_SECTION 1 902 #define U1_MApi_GOP_MIXER_EnableVfilter_SECTION 1 903 #define U1_MApi_GOP_MIXER_EnableOldBlendMode_SECTION 1 904 #define U1_MApi_GOP_RestoreFromVsyncLimitation_SECTION 1 905 #define U1_MApi_GOP_MIUSel_SECTION 1 906 #define U1_MApi_GOP_SetUVSwap_SECTION 1 907 #define U1_MApi_GOP_SetYCSwap_SECTION 1 908 #define U1_MApi_GOP_GetMIUSel_SECTION 1 909 #define U1_MApi_GOP_SetGOPContrast_SECTION 1 910 #define U1_MApi_GOP_GetGOPContrast_SECTION 1 911 #define U1_MApi_GOP_EnaVECapture_SECTION 1 912 #define U1_MApi_GOP_GetVECaptureState_SECTION 1 913 #define U1_MApi_GOP_VECaptureWaitOnFrame_SECTION 1 914 #define U1_MApi_GOP_SetConfig_SECTION 1 915 #define U1_MApi_GOP_SetConfigEx_SECTION 1 916 #define U1_MApi_GOP_GetConfigEx_SECTION 1 917 #define U1_MApi_GOP_Set3DOSDMode_SECTION 1 918 #define U1_MApi_GOP_Set3D_LR_FrameExchange_SECTION 1 919 #define U1_MApi_GOP_Set_GPIO3DPin_SECTION 1 920 #define U1_MApi_GOP_GetChipCaps_SECTION 1 921 #define U1_MApi_GOP_TestPattern_SECTION 1 922 #define U1_MApi_GOP_TestPatternAlpha_Enable_SECTION 1 923 #define U1_MApi_GOP_IsRegUpdated_SECTION 1 924 #define U1_MApi_GOP_GWIN_GetLayerFromGOP_SECTION 1 925 #define U1_MApi_GOP_GWIN_GetGOPFromLayer_SECTION 1 926 #define U1_MApi_GOP_GWIN_Enable_SECTION 1 927 #define U1_MApi_GOP_GWIN_EnableTransClr_SECTION 1 928 #define U1_MApi_GOP_GWIN_EnableTransClr_EX_SECTION 1 929 #define U1_MApi_GOP_GWIN_EnableProgressive_SECTION 1 930 #define U1_MApi_GOP_GWIN_EnableProgressive_EX_SECTION 1 931 #define U1_MApi_GOP_GWIN_DeleteWin_SECTION 1 932 #define U1_MApi_GOP_GWIN_ReleaseWin_SECTION 1 933 #define U1_MApi_GOP_GWIN_DestroyWin_SECTION 1 934 #define U1_MApi_GOP_GWIN_DeleteWinHVSize_SECTION 1 935 #define U1_MApi_GOP_GWIN_SetLayer_SECTION 1 936 #define U1_MApi_GOP_GWIN_GetLayer_SECTION 1 937 #define U1_MApi_GOP_GWIN_OutputColor_SECTION 1 938 #define U1_MApi_GOP_GWIN_OutputColor_EX_SECTION 1 939 #define U1_MApi_GOP_GWIN_SwapOverlapWin_SECTION 1 940 #define U1_MApi_GOP_GWIN_SetRelativeWinPrio_SECTION 1 941 #define U1_MApi_GOP_GWIN_Switch2Gwin_SECTION 1 942 #define U1_MApi_GOP_GWIN_SetAlphaInverse_SECTION 1 943 #define U1_MApi_GOP_GWIN_SetAlphaInverse_EX_SECTION 1 944 #define U1_MApi_GOP_GWIN_GetAlphaInverse_SECTION 1 945 #define U1_MApi_GOP_GWIN_GetAlphaInverse_EX_SECTION 1 946 #define U1_MApi_GOP_GWIN_SetPalette_SECTION 1 947 #define U1_MApi_GOP_GWIN_EnableMultiAlpha_SECTION 1 948 #define U1_MApi_GOP_GWIN_IsMultiAlphaEnable_SECTION 1 949 #define U1_MApi_GOP_GWIN_SetAlphaValue_SECTION 1 950 #define U1_MApi_GOP_GWIN_SetHScroll_SECTION 1 951 #define U1_MApi_GOP_GWIN_SetVScroll_SECTION 1 952 #define U1_MApi_GOP_GWIN_SetScrollRate_SECTION 1 953 #define U1_MApi_GOP_GWIN_SetScrollType_SECTION 1 954 #define U1_MApi_GOP_GWIN_SetSWScrollBuffer_SECTION 1 955 #define U1_MApi_GOP_GWIN_SetFMT0TransClr_SECTION 1 956 #define U1_MApi_GOP_GWIN_SetFMT0TransClr_EX_SECTION 1 957 #define U1_MApi_GOP_GWIN_SetTransClr_8888_SECTION 1 958 #define U1_MApi_GOP_GWIN_SetTransClr_8888_EX_SECTION 1 959 #define U1_MApi_GOP_GWIN_EnableT3DMode_SECTION 1 960 #define U1_MApi_GOP_GWIN_SetBlending_SECTION 1 961 #define U1_MApi_GOP_GWIN_SetDuplication_SECTION 1 962 #define U1_MApi_GOP_GWIN_SetWinPosition_SECTION 1 963 #define U1_MApi_GOP_GWIN_SetWinPositionOffset_SECTION 1 964 #define U1_MApi_GOP_GWIN_SetWinProperty_SECTION 1 965 #define U1_MApi_GOP_GWIN_SetGOPDst_SECTION 1 966 #define U1_MApi_GOP_GWIN_SetBlink_SECTION 1 967 #define U1_MApi_GOP_GWIN_SetFieldInver_SECTION 1 968 #define U1_MApi_GOP_GWIN_SetFieldInver_EX_SECTION 1 969 #define U1_MApi_GOP_GWIN_Set_STRETCHWIN_SECTION 1 970 #define U1_MApi_GOP_GWIN_SetStretchWinPosition_SECTION 1 971 #define U1_MApi_GOP_GWIN_SetHDisplaySize_SECTION 1 972 #define U1_MApi_GOP_GWIN_SetWinInfo_SECTION 1 973 #define U1_MApi_GOP_GWIN_SetTransClr_SECTION 1 974 #define U1_MApi_GOP_GWIN_SetTransparentClr_SECTION 1 975 #define U1_MApi_GOP_GWIN_SetTransClr_EX_SECTION 1 976 #define U1_MApi_GOP_GWIN_SetWinDispPosition_SECTION 1 977 #define U1_MApi_GOP_GWIN_SetHMirror_SECTION 1 978 #define U1_MApi_GOP_GWIN_SetHMirror_EX_SECTION 1 979 #define U1_MApi_GOP_GWIN_SetVMirror_SECTION 1 980 #define U1_MApi_GOP_GWIN_SetVMirror_EX_SECTION 1 981 #define U1_MApi_GOP_GWIN_IsMirrorOn_SECTION 1 982 #define U1_MApi_GOP_GWIN_IsMirrorOn_EX_SECTION 1 983 #define U1_MApi_GOP_GWIN_Set_HSCALE_SECTION 1 984 #define U1_MApi_GOP_GWIN_Set_HSCALE_EX_SECTION 1 985 #define U1_MApi_GOP_GWIN_Set_VSCALE_SECTION 1 986 #define U1_MApi_GOP_GWIN_Set_VSCALE_EX_SECTION 1 987 #define U1_MApi_GOP_GWIN_Set_HStretchMode_SECTION 1 988 #define U1_MApi_GOP_GWIN_Set_HStretchMode_EX_SECTION 1 989 #define U1_MApi_GOP_GWIN_Set_VStretchMode_SECTION 1 990 #define U1_MApi_GOP_GWIN_Set_VStretchMode_EX_SECTION 1 991 #define U1_MApi_GOP_GWIN_Set_TranspColorStretchMode_SECTION 1 992 #define U1_MApi_GOP_GWIN_Set_TranspColorStretchMode_EX_SECTION 1 993 #define U1_MApi_GOP_GWIN_SetForceWrite_SECTION 1 994 #define U1_MApi_GOP_GWIN_SetBnkForceWrite_SECTION 1 995 #define U1_MApi_GOP_GWIN_GetAlphaValue_SECTION 1 996 #define U1_MApi_GOP_GWIN_GetWinPosition_SECTION 1 997 #define U1_MApi_GOP_GWIN_GetWinProperty_SECTION 1 998 #define U1_MApi_GOP_GWIN_GetWinAttr_SECTION 1 999 #define U1_MApi_GOP_GWIN_GetWinInfo_SECTION 1 1000 #define U1_MApi_GOP_GWIN_UpdateRegOnceEx_SECTION 1 1001 #define U1_MApi_GOP_GWIN_UpdateRegOnceEx2_SECTION 1 1002 #define U1_MApi_GOP_GWIN_UpdateRegOnceByMask_SECTION 1 1003 #define U1_MApi_GOP_TriggerRegWriteIn_SECTION 1 1004 #define U1_MApi_GOP_TriggerRegWriteIn_Ex_SECTION 1 1005 #define U1_MApi_GOP_GWIN_SetFadeInOut_SECTION 1 1006 #define U1_MApi_GOP_GWIN_SetGWinShared_SECTION 1 1007 #define U1_MApi_GOP_GWIN_SetGWinSharedCnt_SECTION 1 1008 #define U1_MApi_GOP_GWIN_EnableTileMode_SECTION 1 1009 #define U1_MApi_GOP_SetPINPON_SECTION 1 1010 #define U1_MApi_GOP_SetGOPYUV_SECTION 1 1011 #define U1_MApi_GOP_MIXER_SetMux_SECTION 1 1012 #define U1_MApi_GOP_GWIN_SetNewAlphaMode_SECTION 1 1013 #define U1_MApi_GOP_GWIN_SetPreAlphaMode_SECTION 1 1014 #define U1_MApi_GOP_GWIN_CreateWin_SECTION 1 1015 #define U1_MApi_GOP_GWIN_CreateWin2_SECTION 1 1016 #define U1_MApi_GOP_GWIN_CreateWin_Assign_FB_SECTION 1 1017 #define U1_MApi_GOP_GWIN_CreateWin_Assign_32FB_SECTION 1 1018 #define U1_MApi_GOP_GWIN_CreateStaticWin_SECTION 1 1019 #define U1_MApi_GOP_GWIN_CreateStaticWin2_SECTION 1 1020 #define U1_MApi_GOP_GWIN_CreateStaticWin_Assign_FB_SECTION 1 1021 #define U1_MApi_GOP_GWIN_CreateStaticWin_Assign_32FB_SECTION 1 1022 #define U1_MApi_GOP_GWIN_IsGwinExist_SECTION 1 1023 #define U1_MApi_GOP_GWIN_GetFreeWinID_SECTION 1 1024 #define U1_MApi_GOP_GWIN_GetMAXWinID_SECTION 1 1025 #define U1_MApi_GOP_GWIN_GetCurrentWinId_SECTION 1 1026 #define U1_MApi_GOP_GWIN_GetMaxActiveGwin_v_SECTION 1 1027 #define U1_MApi_GOP_GWIN_Get_HSTART_SECTION 1 1028 #define U1_MApi_GOP_GWIN_GetActiveGWIN_SECTION 1 1029 #define U1_MApi_GOP_GWIN_GetMaxVEnd_SECTION 1 1030 #define U1_MApi_GOP_GWIN_IsAllGWINDisabled_SECTION 1 1031 #define U1_MApi_GOP_GWIN_IsGWINEnabled_SECTION 1 1032 #define U1_MApi_GOP_GWIN_IsEnabled_SECTION 1 1033 #define U1_MApi_GOP_GWIN_CheckOpmodeIsOn_SECTION 1 1034 #define U1_MApi_GOP_GWIN_CheckOpmodeIsOn_EX_SECTION 1 1035 #define U1_MApi_GOP_GWIN_SetResolution_SECTION 1 1036 #define U1_MApi_GOP_GWIN_SetResolution_32FB_SECTION 1 1037 #define U1_MApi_GOP_Exit_SECTION 1 1038 #define U1_MApi_GOP_FB_SEL_SECTION 1 1039 #define U1_MApi_GOP_GWIN_SetDoubleHeap_SECTION 1 1040 #define U1_MApi_GOP_GWIN_MapFB2Win_SECTION 1 1041 #define U1_MApi_GOP_GWIN_Map32FB2Win_SECTION 1 1042 #define U1_MApi_GOP_GWIN_Switch2FB_SECTION 1 1043 #define U1_MApi_GOP_GWIN_Switch2_32FB_SECTION 1 1044 #define U1_MApi_GOP_Switch_GWIN_2_FB_SECTION 1 1045 #define U1_MApi_GOP_Switch_GWIN_2_32FB_SECTION 1 1046 #define U1_MApi_GOP_Switch_GWIN_2_FB_BY_ADDR_SECTION 1 1047 #define U1_MApi_GOP_Switch_3DGWIN_2_FB_BY_ADDR_SECTION 1 1048 #define U1_MApi_GOP_Switch_Multi_GWIN_2_FB_BY_ADDR_SECTION 1 1049 #define U1_MApi_GOP_GWIN_DeleteFB_SECTION 1 1050 #define U1_MApi_GOP_GWIN_Delete32FB_SECTION 1 1051 #define U1_MApi_GOP_GWIN_GetFBRegion_SECTION 1 1052 #define U1_MApi_GOP_GWIN_Get32FBRegion_SECTION 1 1053 #define U1_MApi_GOP_GWIN_GetFBPosition_SECTION 1 1054 #define U1_MApi_GOP_GWIN_Get32FBPosition_SECTION 1 1055 #define U1_MApi_GOP_GWIN_SetFBInfo_SECTION 1 1056 #define U1_MApi_GOP_GWIN_Set32FBInfo_SECTION 1 1057 #define U1_MApi_GOP_GWIN_GetFBInfo_SECTION 1 1058 #define U1_MApi_GOP_GWIN_Get32FBInfo_SECTION 1 1059 #define U1_MApi_GOP_GWIN_GetFBAddr_SECTION 1 1060 #define U1_MApi_GOP_GWIN_Get32FBAddr_SECTION 1 1061 #define U1_MApi_GOP_GWIN_ClearFlipQueue_SECTION 1 1062 #define U1_MApi_GOP_GWIN_GetMaxFBNum_SECTION 1 1063 #define U1_MApi_GOP_GWIN_GetMax32FBNum_SECTION 1 1064 #define U1_MApi_GOP_FB_Get_SECTION 1 1065 #define U1_MApi_GOP_GWIN_GetMAXFBID_SECTION 1 1066 #define U1_MApi_GOP_GWIN_GetMAX32FBID_SECTION 1 1067 #define U1_MApi_GOP_GWIN_DestroyFB_SECTION 1 1068 #define U1_MApi_GOP_GWIN_Destroy32FB_SECTION 1 1069 #define U1_MApi_GOP_GWIN_CreateFBFrom3rdSurf_SECTION 1 1070 #define U1_MApi_GOP_GWIN_Create32FBFrom3rdSurf_SECTION 1 1071 #define U1_MApi_GOP_GWIN_CreateFBbyStaticAddr_SECTION 1 1072 #define U1_MApi_GOP_GWIN_Create32FBbyStaticAddr_SECTION 1 1073 #define U1_MApi_GOP_GWIN_CreateFBbyStaticAddr2_SECTION 1 1074 #define U1_MApi_GOP_GWIN_Create32FBbyStaticAddr2_SECTION 1 1075 #define U1_MApi_GOP_GWIN_CreateFB2_SECTION 1 1076 #define U1_MApi_GOP_GWIN_Create32FB2_SECTION 1 1077 #define U1_MApi_GOP_GWIN_CreateFB2_EXT_SECTION 1 1078 #define U1_MApi_GOP_GWIN_Create32FB2_EXT_SECTION 1 1079 #define U1_MApi_GOP_GWIN_GetCurrentFBID_SECTION 1 1080 #define U1_MApi_GOP_GWIN_GetCurrent32FBID_SECTION 1 1081 #define U1_MApi_GOP_GWIN_GetFBfromGWIN_SECTION 1 1082 #define U1_MApi_GOP_GWIN_Get32FBfromGWIN_SECTION 1 1083 #define U1_MApi_GOP_GWIN_IsFBExist_SECTION 1 1084 #define U1_MApi_GOP_GWIN_Is32FBExist_SECTION 1 1085 #define U1_MApi_GOP_GWIN_GetFreeFBID_SECTION 1 1086 #define U1_MApi_GOP_GWIN_GetFree32FBID_SECTION 1 1087 #define U1_MApi_GOP_GWIN_CreateFB_SECTION 1 1088 #define U1_MApi_GOP_GWIN_Create32FB_SECTION 1 1089 #define U1_MApi_GOP_GWIN_GetFBFmt_SECTION 1 1090 #define U1_MApi_GOP_GWIN_Get32FBFmt_SECTION 1 1091 #define U1_MApi_GOP_GWIN_SetPaletteOpt_SECTION 1 1092 #define U1_MApi_GOP_GWIN_SetPaletteOpt_EX_SECTION 1 1093 #define U1_MApi_GOP_GWIN_SetPaletteRead_SECTION 1 1094 #define U1_MApi_GOP_GWIN_SetPaletteRead_EX_SECTION 1 1095 #define U1_MApi_GOP_GWIN_ReadPalette_SECTION 1 1096 #define U1_MApi_GOP_GWIN_ReadPalette_EX_SECTION 1 1097 #define U1_MApi_GOP_GWIN_2GSetPaletteOpt_SECTION 1 1098 #define U1_MApi_GOP_GWIN_2GSetPaletteOpt_EX_SECTION 1 1099 #define U1_MApi_GOP_GWIN_2GSetPaletteRead_SECTION 1 1100 #define U1_MApi_GOP_GWIN_2GSetPaletteRead_EX_SECTION 1 1101 #define U1_MApi_GOP_GWIN_2GReadPalette_SECTION 1 1102 #define U1_MApi_GOP_GWIN_2GReadPalette_EX_SECTION 1 1103 #define U1_MApi_GOP_DWIN_Init_SECTION 1 1104 #define U1_MApi_GOP_DWIN_SetSourceSel_SECTION 1 1105 #define U1_MApi_GOP_DWIN_CaptureOneFrame2_SECTION 1 1106 #define U1_MApi_GOP_DWIN_EnableIntr_SECTION 1 1107 #define U1_MApi_GOP_DWIN_CaptureOneFrame_SECTION 1 1108 #define U1_MApi_GOP_DWIN_Enable_SECTION 1 1109 #define U1_MApi_GOP_DWIN_GetWinProperty_SECTION 1 1110 #define U1_MApi_GOP_DWIN_SetWinProperty_SECTION 1 1111 #define U1_MApi_GOP_DWIN_SelectSourceScanType_SECTION 1 1112 #define U1_MApi_GOP_DWIN_SetDataFmt_SECTION 1 1113 #define U1_MApi_GOP_DWIN_SetAlphaValue_SECTION 1 1114 #define U1_MApi_GOP_DWIN_SetAlphaSrc_SECTION 1 1115 #define U1_MApi_GOP_DWIN_SetAlphaInverse_SECTION 1 1116 #define U1_MApi_GOP_DWIN_SetUVSample_SECTION 1 1117 #define U1_MApi_GOP_DWIN_SetSkipFrame_SECTION 1 1118 #define U1_MApi_GOP_DWIN_ClearIntr_SECTION 1 1119 #define U1_MApi_GOP_DWIN_GetDWinIntInfo_SECTION 1 1120 #define U1_MApi_GOP_DWIN_GetDWinIntInfoTimeout_SECTION 1 1121 #define U1_MApi_GOP_SetClkForCapture_SECTION 1 1122 #define U1_MApi_GOP_DWIN_GetIntrStatus_SECTION 1 1123 #define U1_MApi_GOP_DWIN_EnableR2YCSC_SECTION 1 1124 #define U1_MApi_GOP_DWIN_SetUVSwap_SECTION 1 1125 #define U1_MApi_GOP_GWIN_BeginDraw_SECTION 1 1126 #define U1_MApi_GOP_GWIN_EndDraw_SECTION 1 1127 #define U1_MApi_GOP_GWIN_Enable_BGWIN_SECTION 1 1128 #define U1_MApi_GOP_GWIN_Set_BGWIN_SECTION 1 1129 #define U1_MApi_GOP_GWIN_Set_BGWIN_Alpha_SECTION 1 1130 #define U1_MApi_GOP_DWIN_SetBufferPINPON_SECTION 1 1131 #define U1_MApi_GOP_RegisterFBFmtCB_SECTION 1 1132 #define U1_MApi_GOP_RegisterXCIsInterlaceCB_SECTION 1 1133 #define U1_MApi_GOP_RegisterXCGetCapHStartCB_SECTION 1 1134 #define U1_MApi_GOP_RegisterXCReduceBWForOSDCB_SECTION 1 1135 #define U1_MApi_GOP_RegisterEventNotify_SECTION 1 1136 #define U1_MApi_GOP_RegisterXCSetDwinInfo_SECTION 1 1137 #define U1_MApi_GOP_OC_SetOCFBinfo_SECTION 1 1138 #define U1_MApi_GOP_GWIN_SetGPUTile_SECTION 1 1139 #define U1_MApi_GOP_TLB_Enable_SECTION 1 1140 #define U1_MApi_GOP_GWIN_UpdateRegOnce_SECTION 1 1141 #define U1_MApi_GOP_GWIN_SetMux_SECTION 1 1142 #define U1_MApi_GOP_GWIN_OutputLayerSwitch_SECTION 1 1143 #define U1_MApi_GOPSC_Init_SECTION 1 1144 #define U1_MApi_GOPSC_Enable_SECTION 1 1145 #define U1_MApi_GOPSC_GetGOPSCInfo_SECTION 1 1146 #define U1_MApi_GOPSC_SetGOPSCInfo_SECTION 1 1147 #define U1_MApi_GOPSC_SetHVSPSize_SECTION 1 1148 #define U1_MApi_GOPSC_SetSkipPixel_SECTION 1 1149 #define U1_MApi_GOPSC_ScalingDownOnce_SECTION 1 1150 #define U1_MApi_GOP_SC_SkipInit_SECTION 1 1151 #define U1_MApi_GOP_SC_Init_SECTION 1 1152 #define U1_MApi_GOP_SC_SetCfg_SECTION 1 1153 #define U1_MApi_GOP_SC_MuxSel_SECTION 1 1154 #define U1_MApi_GOP_SC_SetFPLL_Enable_SECTION 1 1155 #define U1_MApi_GPD_Init_SECTION 1 1156 #define U1_MApi_GPD_InputSource_SECTION 1 1157 #define U1_MApi_GPD_OutputDecode_SECTION 1 1158 #define U1_MApi_GPD_OutputDecodeROI_SECTION 1 1159 #define U1_MApi_GPD_OutputDecodeMGIF_SECTION 1 1160 #define U1_MApi_GPD_GetDuration_SECTION 1 1161 #define U1_MApi_GPD_SetGIFMode_SECTION 1 1162 #define U1_MApi_GPD_ScalingEnable_SECTION 1 1163 #define U1_MApi_GPD_ScalingDisable_SECTION 1 1164 #define U1_MApi_GPD_SetControl_SECTION 1 1165 #define U1_MApi_GPD_GetControl_SECTION 1 1166 #define U1_MApi_GPD_GetCRCResult_SECTION 1 1167 #define U1_MApi_GPD_GetConfig_SECTION 1 1168 #define U1_GPDRegisterToUtopia_SECTION 1 1169 #define U1_GPD_Open_SECTION 1 1170 #define U1_GPD_Close_SECTION 1 1171 #define U1_GPD_Ioctl_SECTION 1 1172 #define U1_MApi_HDMITx_Init_SECTION 1 1173 #define U1_MApi_HDMITx_Exit_SECTION 1 1174 #define U1_MApi_HDMITx_TurnOnOff_SECTION 1 1175 #define U1_MApi_HDMITx_EnablePacketGen_SECTION 1 1176 #define U1_MApi_HDMITx_SetHDMITxMode_SECTION 1 1177 #define U1_MApi_HDMITx_SetHDMITxMode_CD_SECTION 1 1178 #define U1_MApi_HDMITx_SetTMDSOnOff_SECTION 1 1179 #define U1_MApi_HDMITx_DisableTMDSCtrl_SECTION 1 1180 #define U1_MApi_HDMITx_SetRBChannelSwap_SECTION 1 1181 #define U1_MApi_HDMITx_Exhibit_SECTION 1 1182 #define U1_MApi_HDMITx_ForceHDMIOutputMode_SECTION 1 1183 #define U1_MApi_HDMITx_ForceHDMIOutputColorFormat_SECTION 1 1184 #define U1_MApi_HDMITx_GetRxStatus_SECTION 1 1185 #define U1_MApi_HDMITx_GetRxDCInfoFromEDID_SECTION 1 1186 #define U1_MApi_HDMITx_GetRxVideoFormatFromEDID_SECTION 1 1187 #define U1_MApi_HDMITx_GetVICListFromEDID_SECTION 1 1188 #define U1_MApi_HDMITx_GetDataBlockLengthFromEDID_SECTION 1 1189 #define U1_MApi_HDMITx_GetRxAudioFormatFromEDID_SECTION 1 1190 #define U1_MApi_HDMITx_EDID_HDMISupport_SECTION 1 1191 #define U1_MApi_HDMITx_GetRxIDManufacturerName_SECTION 1 1192 #define U1_MApi_HDMITx_GetBksv_SECTION 1 1193 #define U1_MApi_HDMITx_GetAksv_SECTION 1 1194 #define U1_MApi_HDMITx_GetEDIDData_SECTION 1 1195 #define U1_MApi_HDMITx_GetRx3DStructureFromEDID_SECTION 1 1196 #define U1_MApi_HDMITx_GetColorFormatFromEDID_SECTION 1 1197 #define U1_MApi_HDMITx_PKT_User_Define_Clear_SECTION 1 1198 #define U1_MApi_HDMITx_PKT_User_Define_SECTION 1 1199 #define U1_MApi_HDMITx_PKT_Content_Define_SECTION 1 1200 #define U1_MApi_HDMITx_SetVideoOnOff_SECTION 1 1201 #define U1_MApi_HDMITx_SetColorFormat_SECTION 1 1202 #define U1_MApi_HDMITx_SetVideoOutputTiming_SECTION 1 1203 #define U1_MApi_HDMITx_SetVideoOutputAsepctRatio_SECTION 1 1204 #define U1_MApi_HDMITx_SetVideoOutputOverscan_AFD_SECTION 1 1205 #define U1_MApi_HDMITx_SetVideoOutputOverscan_AFD_II_SECTION 1 1206 #define U1_MApi_HDMITx_Set_VS_InfoFrame_SECTION 1 1207 #define U1_MApi_HDMITx_SetAVIInfoExtColorimetry_SECTION 1 1208 #define U1_MApi_HDMITx_SetAudioOnOff_SECTION 1 1209 #define U1_MApi_HDMITx_SetAudioFrequency_SECTION 1 1210 #define U1_MApi_HDMITx_SetAudioConfiguration_SECTION 1 1211 #define U1_MApi_HDMITx_GetAudioCTS_SECTION 1 1212 #define U1_MApi_HDMITx_MuteAudioFIFO_SECTION 1 1213 #define U1_MApi_HDMITx_SetAudioSourceFormat_SECTION 1 1214 #define U1_MApi_HDMITx_GetHdcpKey_SECTION 1 1215 #define U1_MApi_HDMITx_SetHDCPOnOff_SECTION 1 1216 #define U1_MApi_HDMITx_SetAVMUTE_SECTION 1 1217 #define U1_MApi_HDMITx_GetAVMUTEStatus_SECTION 1 1218 #define U1_MApi_HDMITx_GetHDCPStatus_SECTION 1 1219 #define U1_MApi_HDMITx_HDCP_StartAuth_SECTION 1 1220 #define U1_MApi_HDMITx_GetINTHDCPStatus_SECTION 1 1221 #define U1_MApi_HDMITx_GetHDCP_PreStatus_SECTION 1 1222 #define U1_MApi_HDMITx_UnHDCPRxControl_SECTION 1 1223 #define U1_MApi_HDMITx_HDCPRxFailControl_SECTION 1 1224 #define U1_MApi_HDMITx_SetAksv2R0Interval_SECTION 1 1225 #define U1_MApi_HDMITx_IsHDCPRxValid_SECTION 1 1226 #define U1_MApi_HDMITx_HDCP_RevocationKey_Check_SECTION 1 1227 #define U1_MApi_HDMITx_HDCP_RevocationKey_List_SECTION 1 1228 #define U1_MApi_HDMITx_GetLibVer_SECTION 1 1229 #define U1_MApi_HDMITx_GetInfo_SECTION 1 1230 #define U1_MApi_HDMITx_GetStatus_SECTION 1 1231 #define U1_MApi_HDMITx_HDCP_IsSRMSignatureValid_SECTION 1 1232 #define U1_MApi_HDMITx_SetDbgLevel_SECTION 1 1233 #define U1_MApi_HDMITx_SetHPDGpioPin_SECTION 1 1234 #define U1_MApi_HDMITx_AnalogTuning_SECTION 1 1235 #define U1_MApi_HDMITx_DisableRegWrite_SECTION 1 1236 #define U1_MApi_HDMITx_GetEDIDPhyAdr_SECTION 1 1237 #define U1_MApi_HDMITx_SetCECOnOff_SECTION 1 1238 #define U1_MApi_HDMITx_GetCECStatus_SECTION 1 1239 #define U1_MApi_HDMITx_EdidChecking_SECTION 1 1240 #define U1_MApi_HDMITx_RxBypass_Mode_SECTION 1 1241 #define U1_MApi_HDMITx_Disable_RxBypass_SECTION 1 1242 #define U1_MApi_HDMITx_GetChipCaps_SECTION 1 1243 #define U1_MApi_HDMITx_SetPowerState_SECTION 1 1244 #define U1_MApi_HDMITx_GetEdidDataBlocks_SECTION 1 1245 #define U1_MApi_HDMITx_GetKSVList_SECTION 1 1246 #define U1_MApi_HDMITx_GeneralCtrl_SECTION 1 1247 #define U1_MApi_HDMITx_HDCP2AccessX74_SECTION 1 1248 #define U1_MApi_HDMITx_HDCP2TxInit_SECTION 1 1249 #define U1_MApi_HDMITx_HDCP2TxEnableEncrypt_SECTION 1 1250 #define U1_MApi_HDMITx_HDCP2TxFillCipherKey_SECTION 1 1251 #define U1_MApi_HDMITx2_Init_SECTION 1 1252 #define U1_MApi_HDMITx2_Exit_SECTION 1 1253 #define U1_MApi_HDMITx2_SetInitTiming_SECTION 1 1254 #define U1_MApi_JPEG_EnableOJPD_SECTION 1 1255 #define U1_MApi_JPEG_Init_UsingOJPD_SECTION 1 1256 #define U1_msAPI_JPEG_get_APP0_info_SECTION 1 1257 #define U1_MApi_JPEG_Init_SECTION 1 1258 #define U1_MApi_JPEG_DecodeHdr_SECTION 1 1259 #define U1_MApi_JPEG_Decode_SECTION 1 1260 #define U1_MApi_JPEG_Exit_SECTION 1 1261 #define U1_MApi_JPEG_GetErrorCode_SECTION 1 1262 #define U1_MApi_JPEG_GetJPDEventFlag_SECTION 1 1263 #define U1_MApi_JPEG_SetJPDEventFlag_SECTION 1 1264 #define U1_MApi_JPEG_Rst_SECTION 1 1265 #define U1_MApi_JPEG_PowerOn_SECTION 1 1266 #define U1_MApi_JPEG_PowerOff_SECTION 1 1267 #define U1_MApi_JPEG_GetCurVidx_SECTION 1 1268 #define U1_MApi_JPEG_IsProgressive_SECTION 1 1269 #define U1_MApi_JPEG_ThumbnailFound_SECTION 1 1270 #define U1_MApi_JPEG_GetWidth_SECTION 1 1271 #define U1_MApi_JPEG_GetHeight_SECTION 1 1272 #define U1_MApi_JPEG_GetOriginalWidth_SECTION 1 1273 #define U1_MApi_JPEG_GetOriginalHeight_SECTION 1 1274 #define U1_MApi_JPEG_GetNonAlignmentWidth_SECTION 1 1275 #define U1_MApi_JPEG_GetNonAlignmentHeight_SECTION 1 1276 #define U1_MApi_JPEG_GetAlignedPitch_SECTION 1 1277 #define U1_MApi_JPEG_GetAlignedPitch_H_SECTION 1 1278 #define U1_MApi_JPEG_GetAlignedWidth_SECTION 1 1279 #define U1_MApi_JPEG_GetAlignedHeight_SECTION 1 1280 #define U1_MApi_JPEG_GetScaleDownFactor_SECTION 1 1281 #define U1_MApi_JPEG_SetMaxDecodeResolution_SECTION 1 1282 #define U1_MApi_JPEG_SetProMaxDecodeResolution_SECTION 1 1283 #define U1_MApi_JPEG_SetMRBufferValid_SECTION 1 1284 #define U1_MApi_JPEG_UpdateReadInfo_SECTION 1 1285 #define U1_MApi_JPEG_ProcessEOF_SECTION 1 1286 #define U1_MApi_JPEG_SetErrCode_SECTION 1 1287 #define U1_MApi_JPEG_SetDbgLevel_SECTION 1 1288 #define U1_MApi_JPEG_GetDbgLevel_SECTION 1 1289 #define U1_MApi_JPEG_GetInfo_SECTION 1 1290 #define U1_MApi_JPEG_GetStatus_SECTION 1 1291 #define U1_MApi_JPEG_GetLibVer_SECTION 1 1292 #define U1_MApi_JPEG_HdlVidxChk_SECTION 1 1293 #define U1_MApi_JPEG_GetBuffLoadType_SECTION 1 1294 #define U1_MApi_JPEG_EnableISR_SECTION 1 1295 #define U1_MApi_JPEG_DisableISR_SECTION 1 1296 #define U1_MApi_JPEG_WaitDone_SECTION 1 1297 #define U1_MApi_JPEG_GetEXIFDateTime_SECTION 1 1298 #define U1_MApi_JPEG_GetEXIFOrientation_SECTION 1 1299 #define U1_MApi_JPEG_GetControl_SECTION 1 1300 #define U1_MApi_JPEG_DisableAddressConvert_SECTION 1 1301 #define U1_MApi_JPEG_GetFreeMemory_SECTION 1 1302 #define U1_MApi_JPEG_GetDataOffset_SECTION 1 1303 #define U1_MApi_JPEG_GetSOFOffset_SECTION 1 1304 #define U1_MApi_JPEG_SetNJPDInstance_SECTION 1 1305 #define U1_MApi_JPEG_SupportCMYK_SECTION 1 1306 #define U1_MApi_JPEG_SupportRGB_SECTION 1 1307 #define U1_MApi_JPEG_SetMHEG5_SECTION 1 1308 #define U1_MApi_JPEG_IsMPOFormat_SECTION 1 1309 #define U1_MApi_JPEG_GetMPOIndex_SECTION 1 1310 #define U1_MApi_JPEG_GetMPOAttr_SECTION 1 1311 #define U1_MApi_JPEG_DumpMPO_SECTION 1 1312 #define U1_MApi_JPEG_SetMPOBuffer_SECTION 1 1313 #define U1_MApi_JPEG_SetMPOMaxDecodeResolution_SECTION 1 1314 #define U1_MApi_JPEG_SetMPOProMaxDecodeResolution_SECTION 1 1315 #define U1_MApi_JPEG_SetVerificationMode_SECTION 1 1316 #define U1_MApi_JPEG_GetVerificationMode_SECTION 1 1317 #define U1_MApi_NJPD_Debug_SECTION 1 1318 #define U1_MApi_JPEG_IsNJPD_SECTION 1 1319 #define U1_MApi_JPEG_GetConfig_SECTION 1 1320 #define U1_NJPEG_EXRegisterToUtopia_SECTION 1 1321 #define U1_JPEG_Open_SECTION 1 1322 #define U1_JPEG_Close_SECTION 1 1323 #define U1_JPEG_Ioctl_SECTION 1 1324 #define U1_JPEG_SetDbgLevel_V2_SECTION 1 1325 #define U1_MApi_LD_Init_SECTION 1 1326 #define U1_MApi_LD_SetDbgLevel_SECTION 1 1327 #define U1_MApi_MBX_Init_SECTION 1 1328 #define U1_MApi_MBX_DeInit_SECTION 1 1329 #define U1_MApi_MBX_RegisterMSG_SECTION 1 1330 #define U1_MApi_MBX_RegisterMSGWithCallBack_SECTION 1 1331 #define U1_MApi_MBX_UnRegisterMSG_SECTION 1 1332 #define U1_MApi_MBX_ClearMSG_SECTION 1 1333 #define U1_MApi_MBX_SendMsg_SECTION 1 1334 #define U1_MApi_MBX_GetMsgQueueStatus_SECTION 1 1335 #define U1_MApi_MBX_RecvMsg_SECTION 1 1336 #define U1_MApi_MBX_CheckMsg_SECTION 1 1337 #define U1_MApi_MBX_SendMsgLoopback_SECTION 1 1338 #define U1_MApi_MBX_Enable_SECTION 1 1339 #define U1_MApi_MBX_RemoveLatestMsg_SECTION 1 1340 #define U1_MApi_MBX_QueryDynamicClass_SECTION 1 1341 #define U1_MApi_MBX_GenerateDynamicClass_SECTION 1 1342 #define U1_MFERegisterToUtopia_SECTION 1 1343 #define U1_MFE_Open_SECTION 1 1344 #define U1_MFE_Close_SECTION 1 1345 #define U1_MFE_Ioctl_SECTION 1 1346 #define U1_mapi_mhl_MHLSupportPath_SECTION 1 1347 #define U1_mapi_mhl_init_SECTION 1 1348 #define U1_mapi_mhl_handler_SECTION 1 1349 #define U1_mapi_mhl_AutoSwitchHandler_SECTION 1 1350 #define U1_mapi_mhl_SetPowerState_SECTION 1 1351 #define U1_mapi_mhl_CbusControl_SECTION 1 1352 #define U1_mapi_mhl_LoadEDID_SECTION 1 1353 #define U1_mapi_mhl_ReadEDID_SECTION 1 1354 #define U1_mapi_mhl_LoadDeviceCapability_SECTION 1 1355 #define U1_mapi_mhl_SetVenderID_SECTION 1 1356 #define U1_mapi_mhl_InvertCableDetect_SECTION 1 1357 #define U1_mapi_mhl_VbusConfigSetting_SECTION 1 1358 #define U1_mapi_mhl_AdjustSettingIControl_SECTION 1 1359 #define U1_mapi_mhl_AdjustImpedanceSetting_SECTION 1 1360 #define U1_mapi_mhl_CableDetect_SECTION 1 1361 #define U1_mapi_mhl_CbusStatus_SECTION 1 1362 #define U1_mapi_mhl_CbusWakeupIntFlag_SECTION 1 1363 #define U1_mapi_mhl_SrcRCPSupportFlag_SECTION 1 1364 #define U1_mapi_mhl_SrcRAPSupportFlag_SECTION 1 1365 #define U1_mapi_mhl_CbusGetStatusFlag_SECTION 1 1366 #define U1_mapi_mhl_SendRAPCmd_SECTION 1 1367 #define U1_mapi_mhl_SendRCPAutoReleaseCmd_SECTION 1 1368 #define U1_mapi_mhl_SendUCPCmd_SECTION 1 1369 #define U1_mapi_mhl_SendWriteBurst_SECTION 1 1370 #define U1_mapi_mhl_CbusSendUserWriteBurst_SECTION 1 1371 #define U1_mapi_mhl_GetDeviceCapacibility_SECTION 1 1372 #define U1_mapi_mhl_GetExtendDeviceCapacibility_SECTION 1 1373 #define U1_mapi_mhl_GetDeviceVenderID_SECTION 1 1374 #define U1_mapi_mhl_GetWriteBurstData_SECTION 1 1375 #define U1_mapi_mhl_RegisterCallBackFunctions_SECTION 1 1376 #define U1_mapi_mhl_RegisterRcpCallBackFunction_SECTION 1 1377 #define U1_mapi_mhl_RegisterRapCallBackFunction_SECTION 1 1378 #define U1_mapi_mhl_RegisterUcpCallBackFunction_SECTION 1 1379 #define U1_mapi_mhl_RegisterAttCallBackFunction_SECTION 1 1380 #define U1_mapi_mhl_RegisterRbpCallBackFunction_SECTION 1 1381 #define U1_mapi_mhl_GetConfig_SECTION 1 1382 #define U1_mapi_mhl_Send3DInformation_SECTION 1 1383 #define U1_mapi_mhl_CbusWakeupIntSetting_SECTION 1 1384 #define U1_mapi_mhl_PowerCtrl_SECTION 1 1385 #define U1_MApi_PNL_GetLibVer_SECTION 1 1386 #define U1_MApi_PNL_GetInfo_SECTION 1 1387 #define U1_MApi_PNL_GetStatus_SECTION 1 1388 #define U1_MApi_PNL_GetStatusEx_SECTION 1 1389 #define U1_MApi_PNL_SetDbgLevel_SECTION 1 1390 #define U1_MApi_PNL_IOMapBaseInit_SECTION 1 1391 #define U1_MApi_PNL_PreInit_SECTION 1 1392 #define U1_MApi_PNL_Init_Ex_SECTION 1 1393 #define U1_MApi_PNL_GetConfig_SECTION 1 1394 #define U1_MApi_PNL_SetOutput_SECTION 1 1395 #define U1_MApi_PNL_ChangePanelType_SECTION 1 1396 #define U1_MApi_PNL_TCONMAP_DumpTable_SECTION 1 1397 #define U1_MApi_PNL_TCONMAP_Power_Sequence_SECTION 1 1398 #define U1_MApi_PNL_TCON_Count_Reset_SECTION 1 1399 #define U1_MApi_PNL_TCON_Init_SECTION 1 1400 #define U1_MApi_PNL_GetDstInfo_SECTION 1 1401 #define U1_MApi_PNL_Control_Out_Swing_SECTION 1 1402 #define U1_MApi_PNL_ForceSetPanelDCLK_SECTION 1 1403 #define U1_MApi_PNL_ForceSetPanelHStart_SECTION 1 1404 #define U1_MApi_PNL_SetOutputPattern_SECTION 1 1405 #define U1_MApi_Mod_Calibration_Setting_SECTION 1 1406 #define U1_MApi_Mod_Do_Calibration_SECTION 1 1407 #define U1_MApi_BD_LVDS_Output_Type_SECTION 1 1408 #define U1_MApi_PNL_SetLPLLTypeExt_SECTION 1 1409 #define U1_MApi_PNL_Init_MISC_SECTION 1 1410 #define U1_MApi_PNL_GetMiscStatus_SECTION 1 1411 #define U1_MApi_PNL_MOD_OutputConfig_User_SECTION 1 1412 #define U1_MApi_PNL_MOD_OutputChannelOrder_SECTION 1 1413 #define U1_MApi_PNL_HWLVDSReservedtoLRFlag_SECTION 1 1414 #define U1_MApi_MOD_PVDD_Power_Setting_SECTION 1 1415 #define U1_MApi_PNL_SetSSC_En_SECTION 1 1416 #define U1_MApi_PNL_SetSSC_Fmodulation_SECTION 1 1417 #define U1_MApi_PNL_SetSSC_Rdeviation_SECTION 1 1418 #define U1_MApi_PNL_SetOSDSSC_En_SECTION 1 1419 #define U1_MApi_PNL_SetOSDSSC_Fmodulation_SECTION 1 1420 #define U1_MApi_PNL_SetOSDSSC_Rdeviation_SECTION 1 1421 #define U1_MApi_PNL_SkipTimingChange_SECTION 1 1422 #define U1_MApi_PNL_PreSetModeOn_SECTION 1 1423 #define U1_MApi_PNL_OverDriver_Init_SECTION 1 1424 #define U1_MApi_PNL_OverDriver_Enable_SECTION 1 1425 #define U1_MApi_PNL_Get_TCON_Capability_SECTION 1 1426 #define U1_MApi_PNL_SetPairSwap_SECTION 1 1427 #define U1_MApi_PNL_SetExt_LPLL_Type_SECTION 1 1428 #define U1_MApi_PNL_CalExtLPLLSETbyDClk_SECTION 1 1429 #define U1_MApi_PNL_EnableInternalTermination_SECTION 1 1430 #define U1_MApi_PNL_SetPowerState_SECTION 1 1431 #define U1_MApi_PNL_SetDiffSwingLevel_SECTION 1 1432 #define U1_MApi_PNL_OutputDeviceHandshake_SECTION 1 1433 #define U1_MApi_PNL_OutputDeviceOCHandshake_SECTION 1 1434 #define U1_MApi_PNL_SetOutputInterlaceTiming_SECTION 1 1435 #define U1_MApi_PNL_GetPanelData_SECTION 1 1436 #define U1_MApi_PNL_DumpPanelData_SECTION 1 1437 #define U1_MApi_PNL_SetSSC_SECTION 1 1438 #define U1_MApi_PNL_GetPanelOnTiming_SECTION 1 1439 #define U1_MApi_PNL_GetPanelOffTiming_SECTION 1 1440 #define U1_MApi_PNL_GetPanelDimCtrl_SECTION 1 1441 #define U1_MApi_PNL_GetAllGammaTbl_SECTION 1 1442 #define U1_MApi_PNL_EnablePanel_SECTION 1 1443 #define U1_MApi_PNL_SetGammaTbl_SECTION 1 1444 #define U1_MApi_PNL_GetGammaTbl_SECTION 1 1445 #define U1_MApi_PNL_SetGammaValue_SECTION 1 1446 #define U1_MApi_PNL_Check_VBY1_Handshake_Status_SECTION 1 1447 #define U1_MApi_PNL_SetVideoHWTraining_SECTION 1 1448 #define U1_MApi_PNL_SetOSDHWTraining_SECTION 1 1449 #define U1_MApi_PNL_GetVideoHWTraining_Status_SECTION 1 1450 #define U1_MApi_PNL_GetOSDHWTraining_Status_SECTION 1 1451 #define U1_MApi_PNL_GetOutputInterlaceTiming_SECTION 1 1452 #define U1_MApi_PNL_Setting_SECTION 1 1453 #define U1_MApi_PNL_EX_GetLibVer_SECTION 1 1454 #define U1_MApi_PNL_EX_GetInfo_SECTION 1 1455 #define U1_MApi_PNL_EX_GetStatus_SECTION 1 1456 #define U1_MApi_PNL_EX_GetStatusEx_SECTION 1 1457 #define U1_MApi_PNL_EX_SetDbgLevel_SECTION 1 1458 #define U1_MApi_PNL_EX_IOMapBaseInit_SECTION 1 1459 #define U1_MApi_PNL_EX_PreInit_SECTION 1 1460 #define U1_MApi_PNL_EX_Init_Ex_SECTION 1 1461 #define U1_MApi_PNL_EX_SetOutput_SECTION 1 1462 #define U1_MApi_PNL_EX_ChangePanelType_SECTION 1 1463 #define U1_MApi_PNL_EX_TCONMAP_DumpTable_SECTION 1 1464 #define U1_MApi_PNL_EX_TCONMAP_Power_Sequence_SECTION 1 1465 #define U1_MApi_PNL_EX_TCON_Count_Reset_SECTION 1 1466 #define U1_MApi_PNL_EX_TCON_Init_SECTION 1 1467 #define U1_MApi_PNL_EX_GetDstInfo_SECTION 1 1468 #define U1_MApi_PNL_EX_GetConfig_SECTION 1 1469 #define U1_MApi_PNL_EX_Control_Out_Swing_SECTION 1 1470 #define U1_MApi_PNL_EX_ForceSetPanelDCLK_SECTION 1 1471 #define U1_MApi_PNL_EX_ForceSetPanelHStart_SECTION 1 1472 #define U1_MApi_PNL_EX_SetOutputPattern_SECTION 1 1473 #define U1_MApi_PNL_EX_Mod_Calibration_Setting_SECTION 1 1474 #define U1_MApi_PNL_EX_Mod_Do_Calibration_SECTION 1 1475 #define U1_MApi_PNL_EX_BD_LVDS_Output_Type_SECTION 1 1476 #define U1_MApi_PNL_EX_SetLPLLTypeExt_SECTION 1 1477 #define U1_MApi_PNL_EX_Init_MISC_SECTION 1 1478 #define U1_MApi_PNL_EX_MOD_OutputConfig_User_SECTION 1 1479 #define U1_MApi_PNL_EX_HWLVDSReservedtoLRFlag_SECTION 1 1480 #define U1_MApi_PNL_EX_MOD_PVDD_Power_Setting_SECTION 1 1481 #define U1_MApi_PNL_EX_SetSSC_En_SECTION 1 1482 #define U1_MApi_PNL_EX_SetSSC_Fmodulation_SECTION 1 1483 #define U1_MApi_PNL_EX_SetSSC_Rdeviation_SECTION 1 1484 #define U1_MApi_PNL_EX_SkipTimingChange_SECTION 1 1485 #define U1_MApi_PNL_EX_OverDriver_Init_SECTION 1 1486 #define U1_MApi_PNL_EX_OverDriver_Enable_SECTION 1 1487 #define U1_MApi_PNL_EX_Get_TCON_Capability_SECTION 1 1488 #define U1_MApi_PNL_EX_SetPairSwap_SECTION 1 1489 #define U1_MApi_PNL_EX_CalExtLPLLSETbyDClk_SECTION 1 1490 #define U1_MApi_PNL_EX_SetDiffSwingLevel_SECTION 1 1491 #define U1_MApi_SWI2C_Init_SECTION 1 1492 #define U1_MApi_SWI2C_WriteBytes_SECTION 1 1493 #define U1_MApi_SWI2C_WriteBytesStop_SECTION 1 1494 #define U1_MApi_SWI2C_ReadBytes_SECTION 1 1495 #define U1_MApi_SWI2C_ReadBytes_ThruMode_SECTION 1 1496 #define U1_MApi_SWI2C_ReadByte_SECTION 1 1497 #define U1_MApi_SWI2C_WriteByte_SECTION 1 1498 #define U1_MApi_SWI2C_Write2Bytes_SECTION 1 1499 #define U1_MApi_SWI2C_Read2Bytes_SECTION 1 1500 #define U1_MApi_SWI2C_Write4Bytes_SECTION 1 1501 #define U1_MApi_SWI2C_ReadByteDirectly_SECTION 1 1502 #define U1_MApi_SWI2C_WriteGroupBytes_SECTION 1 1503 #define U1_MApi_SWI2C_ReadGroupBytes_SECTION 1 1504 #define U1_MApi_SWI2C_GetMaxBuses_SECTION 1 1505 #define U1_MApi_SWI2C_Speed_Setting_SECTION 1 1506 #define U1_MApi_SWI2C_SetReadMode_SECTION 1 1507 #define U1_MApi_SWI2C_SetBusReadMode_SECTION 1 1508 #define U1_MApi_SWI2C_GetLibVer_SECTION 1 1509 #define U1_MApi_SWI2C_SetDbgLevel_SECTION 1 1510 #define U1_MApi_SWI2C_SetPowerState_SECTION 1 1511 #define U1_MApi_SWI2C_MutexLock_SECTION 1 1512 #define U1_MApi_SWI2C_MutexUnlock_SECTION 1 1513 #define U1_MApi_SWI2C_UseBus_SECTION 1 1514 #define U1_MApi_SWI2C_UnuseBus_SECTION 1 1515 #define U1_MApi_SWI2C_AccessStart_SECTION 1 1516 #define U1_MApi_SWI2C_Stop_SECTION 1 1517 #define U1_MApi_SWI2C_Start_SECTION 1 1518 #define U1_MApi_SWI2C_SendByte_SECTION 1 1519 #define U1_MApi_SWI2C_GetByte_SECTION 1 1520 #define U1_MApi_VDEC_GetLibVer_SECTION 1 1521 #define U1_MApi_VDEC_GetInfo_SECTION 1 1522 #define U1_MApi_VDEC_GetStatus_SECTION 1 1523 #define U1_MApi_VDEC_CheckCaps_SECTION 1 1524 #define U1_MApi_VDEC_EnableTurboMode_SECTION 1 1525 #define U1_MApi_VDEC_Init_SECTION 1 1526 #define U1_MApi_VDEC_Init_EX_SECTION 1 1527 #define U1_MApi_VDEC_Rst_SECTION 1 1528 #define U1_MApi_VDEC_Exit_SECTION 1 1529 #define U1_MApi_VDEC_CheckDispInfoRdy_SECTION 1 1530 #define U1_MApi_VDEC_SetFrcMode_SECTION 1 1531 #define U1_MApi_VDEC_SetDynScalingParams_SECTION 1 1532 #define U1_MApi_VDEC_SetDbgLevel_SECTION 1 1533 #define U1_MApi_VDEC_Play_SECTION 1 1534 #define U1_MApi_VDEC_Pause_SECTION 1 1535 #define U1_MApi_VDEC_Resume_SECTION 1 1536 #define U1_MApi_VDEC_StepDisp_SECTION 1 1537 #define U1_MApi_VDEC_IsStepDispDone_SECTION 1 1538 #define U1_MApi_VDEC_StepDecode_SECTION 1 1539 #define U1_MApi_VDEC_IsStepDecodeDone_SECTION 1 1540 #define U1_MApi_VDEC_SetTrickMode_SECTION 1 1541 #define U1_MApi_VDEC_SetBlockDisplay_SECTION 1 1542 #define U1_MApi_VDEC_EnableESBuffMalloc_SECTION 1 1543 #define U1_MApi_VDEC_GetESBuffVacancy_SECTION 1 1544 #define U1_MApi_VDEC_GetESBuff_SECTION 1 1545 #define U1_MApi_VDEC_PushDecQ_SECTION 1 1546 #define U1_MApi_VDEC_PushDispQ_SECTION 1 1547 #define U1_MApi_VDEC_Flush_SECTION 1 1548 #define U1_MApi_VDEC_EnableLastFrameShow_SECTION 1 1549 #define U1_MApi_VDEC_SetSpeed_SECTION 1 1550 #define U1_MApi_VDEC_SetFreezeDisp_SECTION 1 1551 #define U1_MApi_VDEC_SetBlueScreen_SECTION 1 1552 #define U1_MApi_VDEC_ResetPTS_SECTION 1 1553 #define U1_MApi_VDEC_AVSyncOn_SECTION 1 1554 #define U1_MApi_VDEC_SetAVSyncFreerunThreshold_SECTION 1 1555 #define U1_MApi_VDEC_GetDispInfo_SECTION 1 1556 #define U1_MApi_VDEC_IsAVSyncOn_SECTION 1 1557 #define U1_MApi_VDEC_IsWithValidStream_SECTION 1 1558 #define U1_MApi_VDEC_IsDispFinish_SECTION 1 1559 #define U1_MApi_VDEC_IsFrameRdy_SECTION 1 1560 #define U1_MApi_VDEC_IsIFrameFound_SECTION 1 1561 #define U1_MApi_VDEC_IsSeqChg_SECTION 1 1562 #define U1_MApi_VDEC_IsReachSync_SECTION 1 1563 #define U1_MApi_VDEC_IsFreerun_SECTION 1 1564 #define U1_MApi_VDEC_IsStartSync_SECTION 1 1565 #define U1_MApi_VDEC_IsWithLowDelay_SECTION 1 1566 #define U1_MApi_VDEC_IsAllBufferEmpty_SECTION 1 1567 #define U1_MApi_VDEC_GetExtDispInfo_SECTION 1 1568 #define U1_MApi_VDEC_GetDecFrameInfo_SECTION 1 1569 #define U1_MApi_VDEC_GetDispFrameInfo_SECTION 1 1570 #define U1_MApi_VDEC_GetNextDispFrame_SECTION 1 1571 #define U1_MApi_VDEC_DisplayFrame_SECTION 1 1572 #define U1_MApi_VDEC_ReleaseFrame_SECTION 1 1573 #define U1_MApi_VDEC_GetDecTimeCode_SECTION 1 1574 #define U1_MApi_VDEC_GetDispTimeCode_SECTION 1 1575 #define U1_MApi_VDEC_SetEvent_SECTION 1 1576 #define U1_MApi_VDEC_UnsetEvent_SECTION 1 1577 #define U1_MApi_VDEC_SetEvent_EX_SECTION 1 1578 #define U1_MApi_VDEC_UnsetEvent_EX_SECTION 1 1579 #define U1_MApi_VDEC_GetEventInfo_SECTION 1 1580 #define U1_MApi_VDEC_GetPatchPattern_SECTION 1 1581 #define U1_MApi_VDEC_FireDecCmd_SECTION 1 1582 #define U1_MApi_VDEC_SeekToPTS_SECTION 1 1583 #define U1_MApi_VDEC_SkipToPTS_SECTION 1 1584 #define U1_MApi_VDEC_DisableDeblocking_SECTION 1 1585 #define U1_MApi_VDEC_DisableQuarterPixel_SECTION 1 1586 #define U1_MApi_VDEC_SetAutoRmLstZeroByte_SECTION 1 1587 #define U1_MApi_VDEC_SetBalanceBW_SECTION 1 1588 #define U1_MApi_VDEC_GetActiveFormat_SECTION 1 1589 #define U1_MApi_VDEC_GetColourPrimaries_SECTION 1 1590 #define U1_MApi_VDEC_GetGOPCnt_SECTION 1 1591 #define U1_MApi_VDEC_GetESWritePtr_SECTION 1 1592 #define U1_MApi_VDEC_GetESReadPtr_SECTION 1 1593 #define U1_MApi_VDEC_GetPTS_SECTION 1 1594 #define U1_MApi_VDEC_GetNextPTS_SECTION 1 1595 #define U1_MApi_VDEC_GetErrCode_SECTION 1 1596 #define U1_MApi_VDEC_GetErrCnt_SECTION 1 1597 #define U1_MApi_VDEC_GetBitsRate_SECTION 1 1598 #define U1_MApi_VDEC_GetFrameCnt_SECTION 1 1599 #define U1_MApi_VDEC_GetSkipCnt_SECTION 1 1600 #define U1_MApi_VDEC_GetDropCnt_SECTION 1 1601 #define U1_MApi_VDEC_GetDecQVacancy_SECTION 1 1602 #define U1_MApi_VDEC_GetDispQVacancy_SECTION 1 1603 #define U1_MApi_VDEC_Is32PullDown_SECTION 1 1604 #define U1_MApi_VDEC_IsAlive_SECTION 1 1605 #define U1_MApi_VDEC_GetVideoPtsStcDelta_SECTION 1 1606 #define U1_MApi_VDEC_IsCCAvailable_SECTION 1 1607 #define U1_MApi_VDEC_GetCCInfo_SECTION 1 1608 #define U1_MApi_VDEC_GetTrickMode_SECTION 1 1609 #define U1_MApi_VDEC_GetActiveCodecType_SECTION 1 1610 #define U1_MDrv_VDEC_GenPattern_SECTION 1 1611 #define U1_MApi_VDEC_GenPattern_SECTION 1 1612 #define U1_MApi_VDEC_GetPatternLeastLength_SECTION 1 1613 #define U1_MApi_VDEC_MHEG_DecodeIFrame_SECTION 1 1614 #define U1_MApi_VDEC_MHEG_IsIFrameDecoding_SECTION 1 1615 #define U1_MApi_VDEC_MHEG_RstIFrameDec_SECTION 1 1616 #define U1_MApi_VDEC_CC_StartParsing_SECTION 1 1617 #define U1_MApi_VDEC_CC_StopParsing_SECTION 1 1618 #define U1_MApi_VDEC_CC_GetWritePtr_SECTION 1 1619 #define U1_MApi_VDEC_CC_GetReadPtr_SECTION 1 1620 #define U1_MApi_VDEC_CC_UpdateReadPtr_SECTION 1 1621 #define U1_MApi_VDEC_CC_GetIsOverflow_SECTION 1 1622 #define U1_MApi_VDEC_CC_Init_SECTION 1 1623 #define U1_MApi_VDEC_CC_SetCfg_SECTION 1 1624 #define U1_MApi_VDEC_CC_SetBuffStartAdd_SECTION 1 1625 #define U1_MApi_VDEC_CC_UpdateWriteAdd_SECTION 1 1626 #define U1_MApi_VDEC_CC_UpdateReadAdd_SECTION 1 1627 #define U1_MApi_VDEC_CC_DisableParsing_SECTION 1 1628 #define U1_MApi_VDEC_CC_GetIsRstDone_SECTION 1 1629 #define U1_MApi_VDEC_CC_GetIsBuffOverflow_SECTION 1 1630 #define U1_MApi_VDEC_CC_GetWriteAdd_SECTION 1 1631 #define U1_MApi_VDEC_CC_GetReadAdd_SECTION 1 1632 #define U1_MApi_VDEC_DbgCmd_SECTION 1 1633 #define U1_MApi_VDEC_DbgSetData_SECTION 1 1634 #define U1_MApi_VDEC_DbgGetData_SECTION 1 1635 #define U1_MApi_VDEC_SetControl_SECTION 1 1636 #define U1_MApi_VDEC_PreSetControl_SECTION 1 1637 #define U1_MApi_VDEC_GetFwVersion_SECTION 1 1638 #define U1_MApi_VDEC_GetDispCnt_SECTION 1 1639 #define U1_MApi_VDEC_GetControl_SECTION 1 1640 #define U1_MApi_VDEC_FlushPTSBuf_SECTION 1 1641 #define U1_MApi_VDEC_SystemPreSetControl_SECTION 1 1642 #define U1_MApi_VDEC_V2_SetPowerState_SECTION 1 1643 #define U1_MApi_VDEC_V2_GetLibVer_SECTION 1 1644 #define U1_MApi_VDEC_V2_GetInfo_SECTION 1 1645 #define U1_MApi_VDEC_V2_GetStatus_SECTION 1 1646 #define U1_MApi_VDEC_V2_CheckCaps_SECTION 1 1647 #define U1_MApi_VDEC_V2_EnableTurboMode_SECTION 1 1648 #define U1_MApi_VDEC_V2_Init_SECTION 1 1649 #define U1_MApi_VDEC_V2_Init_EX_SECTION 1 1650 #define U1_MApi_VDEC_V2_Rst_SECTION 1 1651 #define U1_MApi_VDEC_V2_Exit_SECTION 1 1652 #define U1_MApi_VDEC_V2_CheckDispInfoRdy_SECTION 1 1653 #define U1_MApi_VDEC_V2_SetFrcMode_SECTION 1 1654 #define U1_MApi_VDEC_V2_SetDynScalingParams_SECTION 1 1655 #define U1_MApi_VDEC_V2_Play_SECTION 1 1656 #define U1_MApi_VDEC_V2_Pause_SECTION 1 1657 #define U1_MApi_VDEC_V2_Resume_SECTION 1 1658 #define U1_MApi_VDEC_V2_StepDisp_SECTION 1 1659 #define U1_MApi_VDEC_V2_IsStepDispDone_SECTION 1 1660 #define U1_MApi_VDEC_V2_SeekToPTS_SECTION 1 1661 #define U1_MApi_VDEC_V2_SkipToPTS_SECTION 1 1662 #define U1_MApi_VDEC_V2_StepDecode_SECTION 1 1663 #define U1_MApi_VDEC_V2_IsStepDecodeDone_SECTION 1 1664 #define U1_MApi_VDEC_V2_SetTrickMode_SECTION 1 1665 #define U1_MApi_VDEC_V2_PushDecQ_SECTION 1 1666 #define U1_MApi_VDEC_V2_FireDecCmd_SECTION 1 1667 #define U1_MApi_VDEC_V2_GetDecQVacancy_SECTION 1 1668 #define U1_MApi_VDEC_V2_IsCCAvailable_SECTION 1 1669 #define U1_MApi_VDEC_V2_GetCCInfo_SECTION 1 1670 #define U1_MApi_VDEC_V2_Flush_SECTION 1 1671 #define U1_MApi_VDEC_V2_GetESWritePtr_SECTION 1 1672 #define U1_MApi_VDEC_V2_GetESReadPtr_SECTION 1 1673 #define U1_MApi_VDEC_V2_EnableLastFrameShow_SECTION 1 1674 #define U1_MApi_VDEC_V2_IsDispFinish_SECTION 1 1675 #define U1_MApi_VDEC_V2_SetSpeed_SECTION 1 1676 #define U1_MApi_VDEC_V2_IsFrameRdy_SECTION 1 1677 #define U1_MApi_VDEC_V2_SetFreezeDisp_SECTION 1 1678 #define U1_MApi_VDEC_V2_SetBlueScreen_SECTION 1 1679 #define U1_MApi_VDEC_V2_ResetPTS_SECTION 1 1680 #define U1_MApi_VDEC_V2_AVSyncOn_SECTION 1 1681 #define U1_MApi_VDEC_V2_SetAVSyncFreerunThreshold_SECTION 1 1682 #define U1_MApi_VDEC_V2_IsAVSyncOn_SECTION 1 1683 #define U1_MApi_VDEC_V2_GetPTS_SECTION 1 1684 #define U1_MApi_VDEC_V2_GetNextPTS_SECTION 1 1685 #define U1_MApi_VDEC_V2_IsStartSync_SECTION 1 1686 #define U1_MApi_VDEC_V2_IsReachSync_SECTION 1 1687 #define U1_MApi_VDEC_V2_IsFreerun_SECTION 1 1688 #define U1_MApi_VDEC_V2_MHEG_DecodeIFrame_SECTION 1 1689 #define U1_MApi_VDEC_V2_MHEG_IsIFrameDecoding_SECTION 1 1690 #define U1_MApi_VDEC_V2_MHEG_RstIFrameDec_SECTION 1 1691 #define U1_MApi_VDEC_V2_GetErrCode_SECTION 1 1692 #define U1_MApi_VDEC_V2_GetErrCnt_SECTION 1 1693 #define U1_MApi_VDEC_V2_GetActiveCodecType_SECTION 1 1694 #define U1_MApi_VDEC_V2_GetBitsRate_SECTION 1 1695 #define U1_MApi_VDEC_V2_Is32PullDown_SECTION 1 1696 #define U1_MApi_VDEC_V2_IsAlive_SECTION 1 1697 #define U1_MApi_VDEC_V2_GetVideoPtsStcDelta_SECTION 1 1698 #define U1_MApi_VDEC_V2_IsWithValidStream_SECTION 1 1699 #define U1_MApi_VDEC_V2_IsIFrameFound_SECTION 1 1700 #define U1_MApi_VDEC_V2_IsWithLowDelay_SECTION 1 1701 #define U1_MApi_VDEC_V2_IsAllBufferEmpty_SECTION 1 1702 #define U1_MApi_VDEC_V2_GetGOPCnt_SECTION 1 1703 #define U1_MApi_VDEC_V2_GetFrameCnt_SECTION 1 1704 #define U1_MApi_VDEC_V2_GetSkipCnt_SECTION 1 1705 #define U1_MApi_VDEC_V2_GetDropCnt_SECTION 1 1706 #define U1_MApi_VDEC_V2_GetDispInfo_SECTION 1 1707 #define U1_MApi_VDEC_V2_GetTrickMode_SECTION 1 1708 #define U1_MApi_VDEC_V2_GetActiveFormat_SECTION 1 1709 #define U1_MApi_VDEC_V2_GetColourPrimaries_SECTION 1 1710 #define U1_MApi_VDEC_V2_GetHWKey_SECTION 1 1711 #define U1_MApi_VDEC_V2_IsSeqChg_SECTION 1 1712 #define U1_MApi_VDEC_V2_SetDbgLevel_SECTION 1 1713 #define U1_MApi_VDEC_V2_GetDecFrameInfo_SECTION 1 1714 #define U1_MApi_VDEC_V2_GetDispFrameInfo_SECTION 1 1715 #define U1_MApi_VDEC_V2_GetExtDispInfo_SECTION 1 1716 #define U1_MApi_VDEC_V2_GetDecTimeCode_SECTION 1 1717 #define U1_MApi_VDEC_V2_GetDispTimeCode_SECTION 1 1718 #define U1_MApi_VDEC_V2_CC_StartParsing_SECTION 1 1719 #define U1_MApi_VDEC_V2_CC_StopParsing_SECTION 1 1720 #define U1_MApi_VDEC_V2_CC_GetWritePtr_SECTION 1 1721 #define U1_MApi_VDEC_V2_CC_GetReadPtr_SECTION 1 1722 #define U1_MApi_VDEC_V2_CC_UpdateReadPtr_SECTION 1 1723 #define U1_MApi_VDEC_V2_CC_GetIsOverflow_SECTION 1 1724 #define U1_MApi_VDEC_V2_SetEvent_SECTION 1 1725 #define U1_MApi_VDEC_V2_UnsetEvent_SECTION 1 1726 #define U1_MApi_VDEC_V2_SetEvent_EX_SECTION 1 1727 #define U1_MApi_VDEC_V2_UnsetEvent_EX_SECTION 1 1728 #define U1_MApi_VDEC_V2_GetEventInfo_SECTION 1 1729 #define U1_MApi_VDEC_V2_GenPattern_SECTION 1 1730 #define U1_MApi_VDEC_V2_GetPatternLeastLength_SECTION 1 1731 #define U1_MApi_VDEC_V2_DisableDeblocking_SECTION 1 1732 #define U1_MApi_VDEC_V2_DisableQuarterPixel_SECTION 1 1733 #define U1_MApi_VDEC_V2_SetAutoRmLstZeroByte_SECTION 1 1734 #define U1_MApi_VDEC_V2_SetBalanceBW_SECTION 1 1735 #define U1_MApi_VDEC_V2_DbgDumpStatus_SECTION 1 1736 #define U1_MApi_VDEC_V2_SetControl_SECTION 1 1737 #define U1_MApi_VDEC_V2_GetControl_SECTION 1 1738 #define U1_MApi_VDEC_V2_GetDispCnt_SECTION 1 1739 #define U1_MApi_VDEC_V2_GetFwVersion_SECTION 1 1740 #define U1_MApi_VDEC_V2_SetBlockDisplay_SECTION 1 1741 #define U1_MApi_VDEC_V2_EnableESBuffMalloc_SECTION 1 1742 #define U1_MApi_VDEC_V2_GetESBuffVacancy_SECTION 1 1743 #define U1_MApi_VDEC_V2_GetESBuff_SECTION 1 1744 #define U1_MApi_VDEC_V2_GetNextDispFrame_SECTION 1 1745 #define U1_MApi_VDEC_V2_DisplayFrame_SECTION 1 1746 #define U1_MApi_VDEC_V2_FlushPTSBuf_SECTION 1 1747 #define U1_MApi_VDEC_V2_CaptureFrame_SECTION 1 1748 #define U1_MApi_VDEC_V2_CC_Init_SECTION 1 1749 #define U1_MApi_VDEC_V2_CC_SetCfg_SECTION 1 1750 #define U1_MApi_VDEC_V2_CC_SetBuffStartAdd_SECTION 1 1751 #define U1_MApi_VDEC_V2_CC_UpdateWriteAdd_SECTION 1 1752 #define U1_MApi_VDEC_V2_CC_UpdateReadAdd_SECTION 1 1753 #define U1_MApi_VDEC_V2_CC_DisableParsing_SECTION 1 1754 #define U1_MApi_VDEC_V2_CC_GetInfo_SECTION 1 1755 #define U1_MApi_VDEC_V2_CC_GetIsRstDone_SECTION 1 1756 #define U1_MApi_VDEC_V2_CC_GetIsBuffOverflow_SECTION 1 1757 #define U1_MApi_VDEC_V2_CC_GetWriteAdd_SECTION 1 1758 #define U1_MApi_VDEC_V2_CC_GetReadAdd_SECTION 1 1759 #define U1_MApi_VDEC_V2_CC_SystemPreSetControl_SECTION 1 1760 #define U1_MApi_VDEC_V2_CC_PreSetControl_SECTION 1 1761 #define U1_MApi_VDEC_EX_GetLibVer_SECTION 1 1762 #define U1_MApi_VDEC_EX_GetInfo_SECTION 1 1763 #define U1_MApi_VDEC_EX_GetStatus_SECTION 1 1764 #define U1_MApi_VDEC_EX_EnableTurboMode_SECTION 1 1765 #define U1_MApi_VDEC_EX_CheckCaps_SECTION 1 1766 #define U1_MApi_VDEC_EX_SetSingleDecode_SECTION 1 1767 #define U1_MApi_VDEC_EX_GetFreeStream_SECTION 1 1768 #define U1_MApi_VDEC_EX_GetConfig_SECTION 1 1769 #define U1_MApi_VDEC_EX_Init_SECTION 1 1770 #define U1_MApi_VDEC_EX_Rst_SECTION 1 1771 #define U1_MApi_VDEC_EX_Exit_SECTION 1 1772 #define U1_MApi_VDEC_EX_CheckDispInfoRdy_SECTION 1 1773 #define U1_MApi_VDEC_EX_SetFrcMode_SECTION 1 1774 #define U1_MApi_VDEC_EX_SetDynScalingParams_SECTION 1 1775 #define U1_MApi_VDEC_EX_SetDbgLevel_SECTION 1 1776 #define U1_MApi_VDEC_EX_Play_SECTION 1 1777 #define U1_MApi_VDEC_EX_Pause_SECTION 1 1778 #define U1_MApi_VDEC_EX_Resume_SECTION 1 1779 #define U1_MApi_VDEC_EX_StepDisp_SECTION 1 1780 #define U1_MApi_VDEC_EX_IsStepDispDone_SECTION 1 1781 #define U1_MApi_VDEC_EX_StepDecode_SECTION 1 1782 #define U1_MApi_VDEC_EX_IsStepDecodeDone_SECTION 1 1783 #define U1_MApi_VDEC_EX_SetTrickMode_SECTION 1 1784 #define U1_MApi_VDEC_EX_PushDecQ_SECTION 1 1785 #define U1_MApi_VDEC_EX_Flush_SECTION 1 1786 #define U1_MApi_VDEC_EX_EnableLastFrameShow_SECTION 1 1787 #define U1_MApi_VDEC_EX_SetSpeed_SECTION 1 1788 #define U1_MApi_VDEC_EX_SetFreezeDisp_SECTION 1 1789 #define U1_MApi_VDEC_EX_SetBlueScreen_SECTION 1 1790 #define U1_MApi_VDEC_EX_ResetPTS_SECTION 1 1791 #define U1_MApi_VDEC_EX_AVSyncOn_SECTION 1 1792 #define U1_MApi_VDEC_EX_SetAVSyncFreerunThreshold_SECTION 1 1793 #define U1_MApi_VDEC_EX_GetDispInfo_SECTION 1 1794 #define U1_MApi_VDEC_EX_IsAVSyncOn_SECTION 1 1795 #define U1_MApi_VDEC_EX_IsWithValidStream_SECTION 1 1796 #define U1_MApi_VDEC_EX_IsDispFinish_SECTION 1 1797 #define U1_MApi_VDEC_EX_IsFrameRdy_SECTION 1 1798 #define U1_MApi_VDEC_EX_IsIFrameFound_SECTION 1 1799 #define U1_MApi_VDEC_EX_IsSeqChg_SECTION 1 1800 #define U1_MApi_VDEC_EX_GetActiveSrcMode_SECTION 1 1801 #define U1_MApi_VDEC_EX_IsReachSync_SECTION 1 1802 #define U1_MApi_VDEC_EX_IsStartSync_SECTION 1 1803 #define U1_MApi_VDEC_EX_IsFreerun_SECTION 1 1804 #define U1_MApi_VDEC_EX_IsWithLowDelay_SECTION 1 1805 #define U1_MApi_VDEC_EX_IsAllBufferEmpty_SECTION 1 1806 #define U1_MApi_VDEC_EX_GetExtDispInfo_SECTION 1 1807 #define U1_MApi_VDEC_EX_GetDecFrameInfo_SECTION 1 1808 #define U1_MApi_VDEC_EX_GetDispFrameInfo_SECTION 1 1809 #define U1_MApi_VDEC_EX_GetDecTimeCode_SECTION 1 1810 #define U1_MApi_VDEC_EX_GetDispTimeCode_SECTION 1 1811 #define U1_MApi_VDEC_EX_SetEvent_SECTION 1 1812 #define U1_MApi_VDEC_EX_UnsetEvent_SECTION 1 1813 #define U1_MApi_VDEC_EX_SetEvent_MultiCallback_SECTION 1 1814 #define U1_MApi_VDEC_EX_UnsetEvent_MultiCallback_SECTION 1 1815 #define U1_MApi_VDEC_EX_GetEventInfo_SECTION 1 1816 #define U1_MApi_VDEC_EX_FireDecCmd_SECTION 1 1817 #define U1_MApi_VDEC_EX_SeekToPTS_SECTION 1 1818 #define U1_MApi_VDEC_EX_SkipToPTS_SECTION 1 1819 #define U1_MApi_VDEC_EX_DisableDeblocking_SECTION 1 1820 #define U1_MApi_VDEC_EX_DisableQuarterPixel_SECTION 1 1821 #define U1_MApi_VDEC_EX_SetAutoRmLstZeroByte_SECTION 1 1822 #define U1_MApi_VDEC_EX_SetBalanceBW_SECTION 1 1823 #define U1_MApi_VDEC_EX_GetActiveFormat_SECTION 1 1824 #define U1_MApi_VDEC_EX_GetColourPrimaries_SECTION 1 1825 #define U1_MApi_VDEC_EX_GetFwVersion_SECTION 1 1826 #define U1_MApi_VDEC_EX_GetGOPCnt_SECTION 1 1827 #define U1_MApi_VDEC_EX_GetESWritePtr_SECTION 1 1828 #define U1_MApi_VDEC_EX_GetESReadPtr_SECTION 1 1829 #define U1_MApi_VDEC_EX_GetPTS_SECTION 1 1830 #define U1_MApi_VDEC_EX_GetNextPTS_SECTION 1 1831 #define U1_MApi_VDEC_EX_GetVideoPtsStcDelta_SECTION 1 1832 #define U1_MApi_VDEC_EX_GetErrCode_SECTION 1 1833 #define U1_MApi_VDEC_EX_GetErrCnt_SECTION 1 1834 #define U1_MApi_VDEC_EX_GetBitsRate_SECTION 1 1835 #define U1_MApi_VDEC_EX_GetFrameCnt_SECTION 1 1836 #define U1_MApi_VDEC_EX_GetSkipCnt_SECTION 1 1837 #define U1_MApi_VDEC_EX_GetDropCnt_SECTION 1 1838 #define U1_MApi_VDEC_EX_GetDispCnt_SECTION 1 1839 #define U1_MApi_VDEC_EX_GetDecQVacancy_SECTION 1 1840 #define U1_MApi_VDEC_EX_Is32PullDown_SECTION 1 1841 #define U1_MApi_VDEC_EX_IsAlive_SECTION 1 1842 #define U1_MApi_VDEC_EX_IsCCAvailable_SECTION 1 1843 #define U1_MApi_VDEC_EX_GetCCInfo_SECTION 1 1844 #define U1_MApi_VDEC_EX_GetTrickMode_SECTION 1 1845 #define U1_MApi_VDEC_EX_GetActiveCodecType_SECTION 1 1846 #define U1_MApi_VDEC_EX_GenPattern_SECTION 1 1847 #define U1_MApi_VDEC_EX_GetPatternLeastLength_SECTION 1 1848 #define U1_MApi_VDEC_EX_MHEG_DecodeIFrame_SECTION 1 1849 #define U1_MApi_VDEC_EX_MHEG_IsIFrameDecoding_SECTION 1 1850 #define U1_MApi_VDEC_EX_MHEG_RstIFrameDec_SECTION 1 1851 #define U1_MApi_VDEC_EX_CC_StartParsing_SECTION 1 1852 #define U1_MApi_VDEC_EX_CC_StopParsing_SECTION 1 1853 #define U1_MApi_VDEC_EX_CC_GetWritePtr_SECTION 1 1854 #define U1_MApi_VDEC_EX_CC_GetReadPtr_SECTION 1 1855 #define U1_MApi_VDEC_EX_CC_UpdateReadPtr_SECTION 1 1856 #define U1_MApi_VDEC_EX_CC_GetIsOverflow_SECTION 1 1857 #define U1_MApi_VDEC_EX_DbgCmd_SECTION 1 1858 #define U1_MApi_VDEC_EX_DbgSetData_SECTION 1 1859 #define U1_MApi_VDEC_EX_DbgGetData_SECTION 1 1860 #define U1_MApi_VDEC_EX_SetControl_SECTION 1 1861 #define U1_MApi_VDEC_EX_GetControl_SECTION 1 1862 #define U1_MApi_VDEC_EX_EnableDispOneField_SECTION 1 1863 #define U1_MApi_VDEC_EX_GetHWKey_SECTION 1 1864 #define U1_MApi_VDEC_EX_DbgDumpStatus_SECTION 1 1865 #define U1_MApi_VDEC_EX_DbgGetProgCnt_SECTION 1 1866 #define U1_MApi_VDEC_EX_SetBlockDisplay_SECTION 1 1867 #define U1_MApi_VDEC_EX_EnableESBuffMalloc_SECTION 1 1868 #define U1_MApi_VDEC_EX_GetESBuffVacancy_SECTION 1 1869 #define U1_MApi_VDEC_EX_GetESBuff_SECTION 1 1870 #define U1_MApi_VDEC_EX_GetNextDispFrame_SECTION 1 1871 #define U1_MApi_VDEC_EX_DisplayFrame_SECTION 1 1872 #define U1_MApi_VDEC_EX_ReleaseFrame_SECTION 1 1873 #define U1_MApi_VDEC_EX_CaptureFrame_SECTION 1 1874 #define U1_MApi_VDEC_EX_CC_Init_SECTION 1 1875 #define U1_MApi_VDEC_EX_CC_SetCfg_SECTION 1 1876 #define U1_MApi_VDEC_EX_CC_SetBuffStartAdd_SECTION 1 1877 #define U1_MApi_VDEC_EX_CC_UpdateWriteAdd_SECTION 1 1878 #define U1_MApi_VDEC_EX_CC_UpdateReadAdd_SECTION 1 1879 #define U1_MApi_VDEC_EX_CC_DisableParsing_SECTION 1 1880 #define U1_MApi_VDEC_EX_CC_GetInfo_SECTION 1 1881 #define U1_MApi_VDEC_EX_CC_GetIsRstDone_SECTION 1 1882 #define U1_MApi_VDEC_EX_CC_GetIsBuffOverflow_SECTION 1 1883 #define U1_MApi_VDEC_EX_CC_GetWriteAdd_SECTION 1 1884 #define U1_MApi_VDEC_EX_CC_GetReadAdd_SECTION 1 1885 #define U1_MApi_VDEC_EX_SystemPreSetControl_SECTION 1 1886 #define U1_MApi_VDEC_EX_SystemPreGetControl_SECTION 1 1887 #define U1_MApi_VDEC_EX_SystemPostSetControl_SECTION 1 1888 #define U1_MApi_VDEC_EX_PreSetControl_SECTION 1 1889 #define U1_VDEC_EX_V2_RegisterToUtopia_SECTION 1 1890 #define U1_VDEC_EX_V2_Open_SECTION 1 1891 #define U1_VDEC_EX_V2_Close_SECTION 1 1892 #define U1_VDEC_EX_V2_IOctl_SECTION 1 1893 #define U1_VDEC_EXStr_SECTION 1 1894 #define U1_VDEC_V2_RegisterToUtopia_SECTION 1 1895 #define U1_VDEC_V2_Open_SECTION 1 1896 #define U1_VDEC_V2_Close_SECTION 1 1897 #define U1_VDEC_V2_Ioctl_SECTION 1 1898 #define U1_MApi_MFE_Encode_SECTION 1 1899 #define U1_MApi_MFE_CompressOnePicture_ex_SECTION 1 1900 #define U1_MApi_MFE_GetVOL_ex_SECTION 1 1901 #define U1_MApi_MFE_DeInitialize_SECTION 1 1902 #define U1_MApi_MFE_GetState_SECTION 1 1903 #define U1_MApi_MFE_Initialize_ex_SECTION 1 1904 #define U1_MApi_MFE_SetConfig_SECTION 1 1905 #define U1_MApi_MFE_GetConfig_SECTION 1 1906 #define U1_MApi_MFE_GetHWCap_SECTION 1 1907 #define U1_MApi_XC_GenerateTestPattern_SECTION 1 1908 #define U1_MApi_XC_GetPQPathStatus_SECTION 1 1909 #define U1_MApi_XC_AutoDownload_Config_SECTION 1 1910 #define U1_MApi_XC_AutoDownload_Write_SECTION 1 1911 #define U1_MApi_XC_AutoDownload_Fire_SECTION 1 1912 #define U1_MApi_XC_HDR_Control_SECTION 1 1913 #define U1_MApi_XC_SetBwdConfig_SECTION 1 1914 #define U1_MApi_XC_GenerateBlackVideoByMode_SECTION 1 1915 #define U1_MApi_XC_VMark_SetParameters_SECTION 1 1916 #define U1_MApi_XC_GetLibVer_SECTION 1 1917 #define U1_MApi_XC_GetInfo_SECTION 1 1918 #define U1_MApi_XC_GetStatus_SECTION 1 1919 #define U1_MApi_XC_GetStatusEx_SECTION 1 1920 #define U1_MApi_XC_GetStatusNodelay_SECTION 1 1921 #define U1_MApi_XC_SetDbgLevel_SECTION 1 1922 #define U1_MApi_XC_FPLLDbgMode_SECTION 1 1923 #define U1_MApi_XC_FPLLCustomerMode_SECTION 1 1924 #define U1_MDrv_XC_SetIOMapBase_SECTION 1 1925 #define U1_MApi_XC_Init_SECTION 1 1926 #define U1_MApi_XC_GetConfig_SECTION 1 1927 #define U1_MApi_XC_Init_MISC_SECTION 1 1928 #define U1_MApi_XC_GetMISCStatus_SECTION 1 1929 #define U1_MApi_XC_GetCapability_SECTION 1 1930 #define U1_MApi_XC_GetChipCaps_SECTION 1 1931 #define U1_MApi_XC_Exit_SECTION 1 1932 #define U1_MApi_XC_SetDynamicScaling_SECTION 1 1933 #define U1_MApi_XC_Set_DynamicScalingFlag_SECTION 1 1934 #define U1_MApi_XC_GetDynamicScalingStatus_SECTION 1 1935 #define U1_MApi_XC_Get_DNRBaseOffset_SECTION 1 1936 #define U1_MApi_XC_Get_FrameNumFactor_SECTION 1 1937 #define U1_MApi_XC_Get_FRCMFrameNum_SECTION 1 1938 #define U1_MApi_XC_SetWindow_SECTION 1 1939 #define U1_MApi_XC_SetDualWindow_SECTION 1 1940 #define U1_MApi_XC_SetTravelingWindow_SECTION 1 1941 #define U1_MApi_XC_SetInputSource_SECTION 1 1942 #define U1_MApi_XC_IsYUVSpace_SECTION 1 1943 #define U1_MApi_XC_IsMemoryFormat422_SECTION 1 1944 #define U1_MApi_XC_EnableForceRGBin_SECTION 1 1945 #define U1_MApi_XC_EnableMirrorModeEx_SECTION 1 1946 #define U1_MApi_XC_GetMirrorModeTypeEx_SECTION 1 1947 #define U1_MApi_XC_Is_SupportSWDS_SECTION 1 1948 #define U1_MApi_XC_SetDSInfo_SECTION 1 1949 #define U1_MApi_XC_GetSyncStatus_SECTION 1 1950 #define U1_MApi_XC_WaitOutputVSync_SECTION 1 1951 #define U1_MApi_XC_WaitInputVSync_SECTION 1 1952 #define U1_MApi_XC_SetHdmiSyncMode_SECTION 1 1953 #define U1_MApi_XC_GetHdmiSyncMode_SECTION 1 1954 #define U1_MApi_XC_SetRepWindow_SECTION 1 1955 #define U1_MApi_XC_SetSkipDisableOPWriteOffInFPLL_SECTION 1 1956 #define U1_MApi_XC_Set_OPWriteOffEnable_SECTION 1 1957 #define U1_MApi_XC_ForceSet_OPWriteOffEnable_SECTION 1 1958 #define U1_MApi_XC_Set_OPWriteOffEnableToReg_SECTION 1 1959 #define U1_MApi_XC_Get_OPWriteOffEnable_SECTION 1 1960 #define U1_MApi_XC_SkipOPWriteOffInSetWindow_SECTION 1 1961 #define U1_MApi_XC_GetSkipOPWriteOffInSetWindow_SECTION 1 1962 #define U1_MApi_XC_SetDispWinToReg_SECTION 1 1963 #define U1_MApi_XC_GetDispWinFromReg_SECTION 1 1964 #define U1_MApi_XC_FreezeImg_SECTION 1 1965 #define U1_MApi_XC_IsFreezeImg_SECTION 1 1966 #define U1_MApi_XC_GenerateBlackVideoForBothWin_SECTION 1 1967 #define U1_MApi_XC_Set_BLSK_SECTION 1 1968 #define U1_MApi_XC_GenerateBlackVideo_SECTION 1 1969 #define U1_MApi_XC_IsBlackVideoEnable_SECTION 1 1970 #define U1_MApi_XC_EnableFrameBufferLess_SECTION 1 1971 #define U1_MApi_XC_IsCurrentFrameBufferLessMode_SECTION 1 1972 #define U1_MApi_XC_EnableRequest_FrameBufferLess_SECTION 1 1973 #define U1_MApi_XC_IsCurrentRequest_FrameBufferLessMode_SECTION 1 1974 #define U1_MApi_XC_Get_3D_HW_Version_SECTION 1 1975 #define U1_MApi_XC_Get_3D_IsSupportedHW2DTo3D_SECTION 1 1976 #define U1_MApi_XC_Set_3D_Mode_SECTION 1 1977 #define U1_MApi_XC_Set_3D_MainWin_FirstMode_SECTION 1 1978 #define U1_MApi_XC_Set_3D_LR_Frame_Exchg_SECTION 1 1979 #define U1_MApi_XC_3D_Is_LR_Frame_Exchged_SECTION 1 1980 #define U1_MApi_XC_Get_3D_Input_Mode_SECTION 1 1981 #define U1_MApi_XC_Get_3D_Output_Mode_SECTION 1 1982 #define U1_MApi_XC_Get_3D_Panel_Type_SECTION 1 1983 #define U1_MApi_XC_Get_3D_MainWin_First_SECTION 1 1984 #define U1_MApi_XC_3DMainSub_IPSync_SECTION 1 1985 #define U1_MApi_XC_Set_3D_VerVideoOffset_SECTION 1 1986 #define U1_MApi_XC_Get_3D_VerVideoOffset_SECTION 1 1987 #define U1_MApi_XC_Is3DFormatSupported_SECTION 1 1988 #define U1_MApi_XC_Set_3D_HShift_SECTION 1 1989 #define U1_MApi_XC_Enable_3D_LR_Sbs2Line_SECTION 1 1990 #define U1_MApi_XC_Get_3D_HShift_SECTION 1 1991 #define U1_MApi_XC_Set_3D_HW2DTo3D_Buffer_SECTION 1 1992 #define U1_MApi_XC_Set_3D_HW2DTo3D_Parameters_SECTION 1 1993 #define U1_MApi_XC_Get_3D_HW2DTo3D_Parameters_SECTION 1 1994 #define U1_MApi_XC_Set_3D_Detect3DFormat_Parameters_SECTION 1 1995 #define U1_MApi_XC_Get_3D_Detect3DFormat_Parameters_SECTION 1 1996 #define U1_MApi_XC_Detect3DFormatByContent_SECTION 1 1997 #define U1_MApi_XC_DetectNL_SECTION 1 1998 #define U1_MApi_XC_3D_PostPQSetting_SECTION 1 1999 #define U1_MApi_XC_Set_3D_FPInfo_SECTION 1 2000 #define U1_MApi_XC_EnableAutoDetect3D_SECTION 1 2001 #define U1_MApi_XC_GetAutoDetect3DFlag_SECTION 1 2002 #define U1_MApi_XC_Set_3D_SubWinClk_SECTION 1 2003 #define U1_MApi_XC_3D_Is_LR_Sbs2Line_SECTION 1 2004 #define U1_MApi_SC_3D_Is_Skip_Default_LR_Flag_SECTION 1 2005 #define U1_MApi_XC_3D_Enable_Skip_Default_LR_Flag_SECTION 1 2006 #define U1_MApi_XC_Mux_Init_SECTION 1 2007 #define U1_MApi_XC_Mux_SourceMonitor_SECTION 1 2008 #define U1_MApi_XC_Mux_CreatePath_SECTION 1 2009 #define U1_MApi_XC_Mux_DeletePath_SECTION 1 2010 #define U1_MApi_XC_Mux_EnablePath_SECTION 1 2011 #define U1_MApi_XC_Mux_TriggerPathSyncEvent_SECTION 1 2012 #define U1_MApi_XC_Mux_TriggerDestOnOffEvent_SECTION 1 2013 #define U1_MApi_XC_Mux_OnOffPeriodicHandler_SECTION 1 2014 #define U1_MApi_XC_Mux_GetPathInfo_SECTION 1 2015 #define U1_MApi_XC_Mux_SetSupportMhlPathInfo_SECTION 1 2016 #define U1_MApi_XC_Mux_SetMhlHotPlugInverseInfo_SECTION 1 2017 #define U1_MApi_XC_Mux_GetHDMIPort_SECTION 1 2018 #define U1_MApi_XC_Mux_GetPortMappingMatrix_SECTION 1 2019 #define U1_MApi_XC_MUX_MapInputSourceToVDYMuxPORT_SECTION 1 2020 #define U1_MApi_XC_Set_NR_SECTION 1 2021 #define U1_MApi_XC_FilmMode_P_SECTION 1 2022 #define U1_MApi_XC_GetUCEnabled_SECTION 1 2023 #define U1_MApi_XC_GenSpecificTiming_SECTION 1 2024 #define U1_MApi_XC_GetDEBypassMode_SECTION 1 2025 #define U1_MApi_XC_GetDEWindow_SECTION 1 2026 #define U1_MApi_XC_GetDEWidthHeightInDEByPassMode_SECTION 1 2027 #define U1_MApi_XC_GetCaptureWindow_SECTION 1 2028 #define U1_MApi_XC_SetCaptureWindowVstart_SECTION 1 2029 #define U1_MApi_XC_SetCaptureWindowHstart_SECTION 1 2030 #define U1_MApi_XC_SetCaptureWindowVsize_SECTION 1 2031 #define U1_MApi_XC_SetCaptureWindowHsize_SECTION 1 2032 #define U1_MApi_XC_SoftwareReset_SECTION 1 2033 #define U1_MApi_XC_CalculateHFreqx10_SECTION 1 2034 #define U1_MApi_XC_CalculateHFreqx1K_SECTION 1 2035 #define U1_MApi_XC_CalculateVFreqx10_SECTION 1 2036 #define U1_MApi_XC_CalculateVFreqx1K_SECTION 1 2037 #define U1_MApi_XC_InterruptAttach_SECTION 1 2038 #define U1_MApi_XC_InterruptDeAttach_SECTION 1 2039 #define U1_MApi_XC_DisableInputSource_SECTION 1 2040 #define U1_MApi_XC_IsInputSourceDisabled_SECTION 1 2041 #define U1_MApi_XC_ChangePanelType_SECTION 1 2042 #define U1_MApi_XC_GetCurrentReadBank_SECTION 1 2043 #define U1_MApi_XC_GetCurrentWriteBank_SECTION 1 2044 #define U1_MApi_XC_SetAutoPreScaling_SECTION 1 2045 #define U1_MApi_XC_GetVSyncWidth_SECTION 1 2046 #define U1_MApi_XC_set_GOP_Enable_SECTION 1 2047 #define U1_MApi_XC_ip_sel_for_gop_SECTION 1 2048 #define U1_MApi_XC_SetVOPNBL_SECTION 1 2049 #define U1_MApi_XC_GetDstInfo_SECTION 1 2050 #define U1_MApi_XC_set_FD_Mask_byWin_SECTION 1 2051 #define U1_MApi_XC_Get_FD_Mask_byWin_SECTION 1 2052 #define U1_MApi_XC_InitIPForInternalTiming_SECTION 1 2053 #define U1_MApi_XC_SetIPMux_SECTION 1 2054 #define U1_MApi_XC_Is_H_Sync_Active_SECTION 1 2055 #define U1_MApi_XC_Is_V_Sync_Active_SECTION 1 2056 #define U1_MApi_XC_GetAutoPositionWindow_SECTION 1 2057 #define U1_MApi_XC_SetFrameBufferAddress_SECTION 1 2058 #define U1_MApi_XC_SetFRCMFrameBufferAddress_SECTION 1 2059 #define U1_MApi_XC_IsFrameBufferEnoughForCusScaling_SECTION 1 2060 #define U1_MApi_XC_SetScalerMemoryRequest_SECTION 1 2061 #define U1_MApi_XC_Get_PixelData_SECTION 1 2062 #define U1_MApi_XC_GetAvailableSize_SECTION 1 2063 #define U1_MApi_XC_SetFrameColor_SECTION 1 2064 #define U1_MApi_XC_SetDispWindowColor_SECTION 1 2065 #define U1_MApi_XC_SupportSourceToVE_SECTION 1 2066 #define U1_MApi_XC_SetOutputCapture_SECTION 1 2067 #define U1_MApi_XC_SetGammaOnOff_SECTION 1 2068 #define U1_MApi_XC_SetPreGammaGain_SECTION 1 2069 #define U1_MApi_XC_SetPreGammaOffset_SECTION 1 2070 #define U1_MApi_XC_SetPanelTiming_SECTION 1 2071 #define U1_MApi_XC_SetOutTimingMode_SECTION 1 2072 #define U1_MApi_XC_SetFreeRunTiming_SECTION 1 2073 #define U1_MApi_XC_Set_CustomerSyncInfo_SECTION 1 2074 #define U1_MApi_XC_WaitFPLLDone_SECTION 1 2075 #define U1_MApi_XC_GetOutputVFreqX100_SECTION 1 2076 #define U1_MApi_XC_GetOP1OutputVFreqX100_SECTION 1 2077 #define U1_MApi_XC_FrameLockCheck_SECTION 1 2078 #define U1_MApi_XC_CustomizeFRCTable_SECTION 1 2079 #define U1_MApi_XC_OutputFrameCtrl_SECTION 1 2080 #define U1_MApi_SC_Enable_FPLL_FSM_SECTION 1 2081 #define U1_MApi_SC_ForceFreerun_SECTION 1 2082 #define U1_MApi_SC_IsForceFreerun_SECTION 1 2083 #define U1_MApi_SC_SetFreerunVFreq_SECTION 1 2084 #define U1_MApi_XC_SetExPanelInfo_SECTION 1 2085 #define U1_MApi_XC_Enable_FPLL_Thresh_Mode_SECTION 1 2086 #define U1_MApi_XC_Get_FPLL_Thresh_Mode_SECTION 1 2087 #define U1_MApi_XC_EnableIPAutoNoSignal_SECTION 1 2088 #define U1_MApi_XC_GetIPAutoNoSignal_SECTION 1 2089 #define U1_MApi_XC_EnableIPAutoCoast_SECTION 1 2090 #define U1_MApi_XC_EnableIPCoastDebounce_SECTION 1 2091 #define U1_MApi_XC_ClearIPCoastStatus_SECTION 1 2092 #define U1_MApi_XC_EnableFpllManualSetting_SECTION 1 2093 #define U1_MApi_XC_FpllBoundaryTest_SECTION 1 2094 #define U1_MApi_XC_SetOffLineDetection_SECTION 1 2095 #define U1_MApi_XC_GetOffLineDetection_SECTION 1 2096 #define U1_MApi_XC_SetOffLineSogThreshold_SECTION 1 2097 #define U1_MApi_XC_SetOffLineSogBW_SECTION 1 2098 #define U1_MApi_XC_OffLineInit_SECTION 1 2099 #define U1_MApi_XC_Set_Extra_fetch_adv_line_SECTION 1 2100 #define U1_MApi_XC_SetVGASogEn_SECTION 1 2101 #define U1_MApi_XC_EnableWindow_SECTION 1 2102 #define U1_MApi_XC_Is_SubWindowEanble_SECTION 1 2103 #define U1_MApi_XC_SetBorderFormat_SECTION 1 2104 #define U1_MApi_XC_EnableBorder_SECTION 1 2105 #define U1_MApi_XC_ZorderMainWindowFirst_SECTION 1 2106 #define U1_MApi_XC_PQ_LoadFunction_SECTION 1 2107 #define U1_MApi_XC_Check_HNonLinearScaling_SECTION 1 2108 #define U1_MApi_XC_EnableEuroHdtvSupport_SECTION 1 2109 #define U1_MApi_XC_EnableEuroHdtvDetection_SECTION 1 2110 #define U1_MApi_XC_ReadByte_SECTION 1 2111 #define U1_MApi_XC_WriteByte_SECTION 1 2112 #define U1_MApi_XC_WriteByteMask_SECTION 1 2113 #define U1_MApi_XC_Write2ByteMask_SECTION 1 2114 #define U1_MApi_XC_W2BYTE_SECTION 1 2115 #define U1_MApi_XC_R2BYTE_SECTION 1 2116 #define U1_MApi_XC_W4BYTE_SECTION 1 2117 #define U1_MApi_XC_R4BYTE_SECTION 1 2118 #define U1_MApi_XC_R2BYTEMSK_SECTION 1 2119 #define U1_MApi_XC_W2BYTEMSK_SECTION 1 2120 #define U1_MApi_XC_MLoad_Init_SECTION 1 2121 #define U1_MApi_XC_MLoad_Enable_SECTION 1 2122 #define U1_MApi_XC_MLoad_Cus_Init_SECTION 1 2123 #define U1_MApi_XC_MLoad_Cus_Enable_SECTION 1 2124 #define U1_MApi_XC_MLoad_GetStatus_SECTION 1 2125 #define U1_MApi_XC_MLoad_WriteCmd_And_Fire_SECTION 1 2126 #define U1_MApi_XC_MLoad_WriteCmds_And_Fire_SECTION 1 2127 #define U1_MApi_XC_MLG_Init_SECTION 1 2128 #define U1_MApi_XC_MLG_Enable_SECTION 1 2129 #define U1_MApi_XC_MLG_GetCaps_SECTION 1 2130 #define U1_MApi_XC_MLG_GetStatus_SECTION 1 2131 #define U1_MApi_XC_SetOSD2VEMode_SECTION 1 2132 #define U1_MApi_XC_IP2_PreFilter_Enable_SECTION 1 2133 #define U1_MApi_XC_Get_Pixel_RGB_SECTION 1 2134 #define U1_MApi_XC_KeepPixelPointerAppear_SECTION 1 2135 #define U1_MApi_XC_Set_MemFmtEx_SECTION 1 2136 #define U1_MApi_XC_IsRequestFrameBufferLessMode_SECTION 1 2137 #define U1_MApi_XC_SkipSWReset_SECTION 1 2138 #define U1_MApi_XC_EnableRepWindowForFrameColor_SECTION 1 2139 #define U1_MApi_XC_SetOSDLayer_SECTION 1 2140 #define U1_MApi_XC_GetOSDLayer_SECTION 1 2141 #define U1_MApi_XC_SetVideoAlpha_SECTION 1 2142 #define U1_MApi_XC_GetVideoAlpha_SECTION 1 2143 #define U1_MApi_XC_SkipWaitVsync_SECTION 1 2144 #define U1_MApi_XC_SetCMAHeapID_SECTION 1 2145 #define U1_MApi_XC_OP2VOPDESel_SECTION 1 2146 #define U1_MApi_XC_FRC_SetWindow_SECTION 1 2147 #define U1_MApi_XC_ConfigCMA_SECTION 1 2148 #define U1_MApi_XC_Enable_TwoInitFactor_SECTION 1 2149 #define U1_MApi_XC_IsFieldPackingModeSupported_SECTION 1 2150 #define U1_MApi_XC_PreInit_SECTION 1 2151 #define U1_MApi_XC_Get_BufferData_SECTION 1 2152 #define U1_MApi_XC_Set_BufferData_SECTION 1 2153 #define U1_MApi_XC_EnableMainWindow_SECTION 1 2154 #define U1_MApi_XC_EnableSubWindow_SECTION 1 2155 #define U1_MApi_XC_DisableSubWindow_SECTION 1 2156 #define U1_MApi_XC_SetPixelShift_SECTION 1 2157 #define U1_MApi_XC_SetPixelShiftFeatures_SECTION 1 2158 #define U1_MApi_XC_Combine_MLoadEn_SECTION 1 2159 #define U1_MApi_XC_SetVideoOnOSD_SECTION 1 2160 #define U1_MApi_XC_SetOSDLayerBlending_SECTION 1 2161 #define U1_MApi_XC_SetOSDLayerAlpha_SECTION 1 2162 #define U1_MApi_XC_SetOSDBlendingFormula_SECTION 1 2163 #define U1_MApi_XC_ReportPixelInfo_SECTION 1 2164 #define U1_MApi_XC_SetScaling_SECTION 1 2165 #define U1_MApi_XC_SetMCDIBufferAddress_SECTION 1 2166 #define U1_MApi_XC_EnableMCDI_SECTION 1 2167 #define U1_MApi_XC_SendCmdToFRC_SECTION 1 2168 #define U1_MApi_XC_GetMsgFromFRC_SECTION 1 2169 #define U1_MApi_XC_EnableRWBankAuto_SECTION 1 2170 #define U1_MApi_XC_Dump_SHM_SECTION 1 2171 #define U1_MApi_XC_SetWRBankMappingNum_SECTION 1 2172 #define U1_MApi_XC_GetWRBankMappingNum_SECTION 1 2173 #define U1_MApi_XC_GetWRBankMappingNumForZap_SECTION 1 2174 #define U1_MApi_XC_SetBOBMode_SECTION 1 2175 #define U1_MApi_XC_SetForceReadBank_SECTION 1 2176 #define U1_MApi_XC_SetLockPoint_SECTION 1 2177 #define U1_MApi_XC_LD_Init_SECTION 1 2178 #define U1_MApi_XC_LD_SetMemoryAddress_SECTION 1 2179 #define U1_MApi_XC_LD_Get_Value_SECTION 1 2180 #define U1_MApi_XC_LD_SetLevel_SECTION 1 2181 #define U1_MApi_Set_TurnoffLDBL_SECTION 1 2182 #define U1_MApi_Set_notUpdateSPIDataFlags_SECTION 1 2183 #define U1_MApi_Set_UsermodeLDFlags_SECTION 1 2184 #define U1_MApi_Set_BLLevel_SECTION 1 2185 #define U1_MApi_XC_Set_BWS_Mode_SECTION 1 2186 #define U1_MApi_XC_FRC_ColorPathCtrl_SECTION 1 2187 #define U1_MApi_XC_FRC_OP2_SetRGBGain_SECTION 1 2188 #define U1_MApi_XC_FRC_OP2_SetRGBOffset_SECTION 1 2189 #define U1_MApi_XC_FRC_OP2_SetDither_SECTION 1 2190 #define U1_MApi_XC_FRC_BypassMFC_SECTION 1 2191 #define U1_MApi_XC_FRC_Mute_SECTION 1 2192 #define U1_MApi_XC_ForceReadFrame_SECTION 1 2193 #define U1_MApi_XC_SetCsc_SECTION 1 2194 #define U1_MApi_XC_RegisterPQSetFPLLThreshMode_SECTION 1 2195 #define U1_MApi_XC_GetFreeRunStatus_SECTION 1 2196 #define U1_MApi_XC_Get_DSForceIndexSupported_SECTION 1 2197 #define U1_MApi_XC_Set_DSForceIndex_SECTION 1 2198 #define U1_MApi_XC_Set_DSIndexSourceSelect_SECTION 1 2199 #define U1_MApi_XC_OSDC_InitSetting_SECTION 1 2200 #define U1_MApi_XC_OSDC_Control_SECTION 1 2201 #define U1_MApi_XC_OSDC_GetDstInfo_SECTION 1 2202 #define U1_MApi_XC_OSDC_SetOutVfreqx10_SECTION 1 2203 #define U1_MApi_XC_BYPASS_SetOSDVsyncPos_SECTION 1 2204 #define U1_MApi_XC_BYPASS_SetInputSrc_SECTION 1 2205 #define U1_MApi_XC_BYPASS_SetCSC_SECTION 1 2206 #define U1_MApi_XC_SetSeamlessZapping_SECTION 1 2207 #define U1_MApi_XC_GetSeamlessZappingStatus_SECTION 1 2208 #define U1_MApi_XC_Vtrack_SetPayloadData_SECTION 1 2209 #define U1_MApi_XC_Vtrack_SetUserDefindedSetting_SECTION 1 2210 #define U1_MApi_XC_Vtrack_Enable_SECTION 1 2211 #define U1_MApi_XC_PreSetPQInfo_SECTION 1 2212 #define U1_MApi_XC_Is_OP1_TestPattern_Enabled_SECTION 1 2213 #define U1_MApi_XC_Set_OP1_TestPattern_SECTION 1 2214 #define U1_MApi_XC_CheckWhiteBalancePatternModeSupport_SECTION 1 2215 #define U1_MApi_XC_SetHLinearScaling_SECTION 1 2216 #define U1_MApi_XC_SetPowerState_SECTION 1 2217 #define U1_MApi_XC_EnableT3D_SECTION 1 2218 #define U1_MApi_XC_Set_FRC_InputTiming_SECTION 1 2219 #define U1_MApi_XC_Get_FRC_InputTiming_SECTION 1 2220 #define U1_MApi_XC_Get_VirtualBox_Info_SECTION 1 2221 #define U1_MApi_XC_Set_OSD_Detect_SECTION 1 2222 #define U1_MApi_XC_Get_OSD_Detect_SECTION 1 2223 #define U1_MApi_XC_Is2K2KToFrcMode_SECTION 1 2224 #define U1_MApi_XC_Enable_LockFreqOnly_SECTION 1 2225 #define U1_mvideo_sc_get_output_vfreq_SECTION 1 2226 #define U1_MApi_XC_Get_Current_OutputVFreqX100_SECTION 1 2227 #define U1_MApi_XC_SetMemoryWriteRequest_SECTION 1 2228 #define U1_MApi_XC_Set_MemFmt_SECTION 1 2229 #define U1_MApi_XC_SetOutputAdjustSetting_SECTION 1 2230 #define U1_msAPI_Scaler_FPLL_FSM_SECTION 1 2231 #define U1_MApi_XC_EnableMirrorMode_SECTION 1 2232 #define U1_MApi_XC_EnableMirrorMode2_SECTION 1 2233 #define U1_MApi_XC_GetMirrorModeType_SECTION 1 2234 #define U1_MApi_XC_set_FD_Mask_SECTION 1 2235 #define U1_MApi_XC_Get_FD_Mask_SECTION 1 2236 #define U1_MApi_XC_GetAccurateVFreqx1K_SECTION 1 2237 #define U1_MApi_XC_IsSupport2StepScaling_SECTION 1 2238 #define U1_MApi_XC_SetIP1TestPattern_SECTION 1 2239 #define U1_MApi_XC_Set_OP2_Pattern_SECTION 1 2240 #define U1_MApi_XC_SetForceWrite_SECTION 1 2241 #define U1_MApi_XC_GetForceWrite_SECTION 1 2242 #define U1_MApi_XC_VideoPlaybackCtrl_SECTION 1 2243 #define U1_MApi_SWDS_Fire_SECTION 1 2244 #define U1_MApi_XC_GetResourceByPipeID_SECTION 1 2245 #define U1_MApi_XC_ConfigPipe_SECTION 1 2246 #define U1_MApi_XC_CheckPipe_SECTION 1 2247 #define U1_MApi_XC_OPTEE_Control_SECTION 1 2248 #define U1_MApi_XC_OPTEE_Mux_SECTION 1 2249 #define U1_MApi_XC_EnableMiuDualMode_SECTION 1 2250 #define U1_MApi_XC_Get3DFormat_SECTION 1 2251 #define U1_MApi_XC_Set_FB_Level_SECTION 1 2252 #define U1_MApi_XC_Get_FB_Level_SECTION 1 2253 #define U1_MApi_XC_ACE_Init_SECTION 1 2254 #define U1_MApi_XC_ACE_Exit_SECTION 1 2255 #define U1_MApi_XC_ACE_DMS_SECTION 1 2256 #define U1_MApi_XC_ACE_SetPCYUV2RGB_SECTION 1 2257 #define U1_MApi_XC_ACE_SelectYUVtoRGBMatrix_SECTION 1 2258 #define U1_MApi_XC_ACE_SetColorCorrectionTable_SECTION 1 2259 #define U1_MApi_XC_ACE_SetPCsRGBTable_SECTION 1 2260 #define U1_MApi_XC_ACE_GetColorMatrix_SECTION 1 2261 #define U1_MApi_XC_ACE_SetColorMatrix_SECTION 1 2262 #define U1_MApi_XC_ACE_SetBypassColorMatrix_SECTION 1 2263 #define U1_MApi_XC_ACE_SetIHC_SECTION 1 2264 #define U1_MApi_XC_ACE_SetICC_SECTION 1 2265 #define U1_MApi_XC_ACE_SetIBC_SECTION 1 2266 #define U1_MApi_XC_ACE_PatchDTGColorChecker_SECTION 1 2267 #define U1_MApi_XC_ACE_GetACEInfo_SECTION 1 2268 #define U1_MApi_XC_ACE_GetACEInfoEx_SECTION 1 2269 #define U1_MApi_XC_ACE_PicSetContrast_SECTION 1 2270 #define U1_MApi_XC_ACE_PicSetBrightness_SECTION 1 2271 #define U1_MApi_XC_ACE_PicSetBrightnessPrecise_SECTION 1 2272 #define U1_MApi_XC_ACE_PicSetPreYOffset_SECTION 1 2273 #define U1_MApi_XC_ACE_PicGetPreYOffset_SECTION 1 2274 #define U1_MApi_XC_ACE_PicSetHue_SECTION 1 2275 #define U1_MApi_XC_ACE_SkipWaitVsync_SECTION 1 2276 #define U1_MApi_XC_ACE_PicSetSaturation_SECTION 1 2277 #define U1_MApi_XC_ACE_PicSetSharpness_SECTION 1 2278 #define U1_MApi_XC_ACE_PicSetColorTemp_SECTION 1 2279 #define U1_MApi_XC_ACE_PicSetColorTempEx_SECTION 1 2280 #define U1_MApi_XC_ACE_PicSetPostColorTemp_V02_SECTION 1 2281 #define U1_MApi_XC_ACE_SetFleshTone_SECTION 1 2282 #define U1_MApi_XC_ACE_SetBlackAdjust_SECTION 1 2283 #define U1_MApi_XC_ACE_Set_IHC_SRAM_SECTION 1 2284 #define U1_MApi_XC_ACE_Set_ICC_SRAM_SECTION 1 2285 #define U1_MApi_XC_ACE_EnableMWE_SECTION 1 2286 #define U1_MApi_XC_ACE_MWECloneVisualEffect_SECTION 1 2287 #define U1_MApi_XC_ACE_MWESetRegTable_SECTION 1 2288 #define U1_MApi_XC_ACE_SetMWELoadFromPQ_SECTION 1 2289 #define U1_MApi_XC_ACE_MWEStatus_SECTION 1 2290 #define U1_MApi_XC_ACE_MWEHandle_SECTION 1 2291 #define U1_MApi_XC_ACE_MWEFuncSel_SECTION 1 2292 #define U1_MApi_XC_ACE_MWESetDispWin_SECTION 1 2293 #define U1_MApi_XC_ACE_3DClonePQMap_SECTION 1 2294 #define U1_MApi_XC_ACE_DNR_Blending_NRTbl_SECTION 1 2295 #define U1_MApi_XC_ACE_DNR_Blending_MISC_SECTION 1 2296 #define U1_MApi_XC_ACE_DNR_Blending_SECTION 1 2297 #define U1_MApi_XC_ACE_DNR_Get_PrecisionShift_SECTION 1 2298 #define U1_MApi_XC_ACE_DNR_GetMotion_Weight_SECTION 1 2299 #define U1_MApi_XC_ACE_DNR_GetLuma_Weight_SECTION 1 2300 #define U1_MApi_XC_ACE_DNR_GetNoise_Weight_SECTION 1 2301 #define U1_MApi_XC_ACE_DNR_GetMotion_SECTION 1 2302 #define U1_MApi_XC_ACE_DNR_Init_Motion_SECTION 1 2303 #define U1_MApi_XC_ACE_DNR_Init_Luma_SECTION 1 2304 #define U1_MApi_XC_ACE_DNR_Init_Noise_SECTION 1 2305 #define U1_MApi_XC_ACE_DNR_SetParam_SECTION 1 2306 #define U1_MApi_XC_ACE_SetHDRInit_SECTION 1 2307 #define U1_MApi_XC_ACE_DNR_GetParam_SECTION 1 2308 #define U1_MApi_XC_ACE_DNR_SetNRTbl_SECTION 1 2309 #define U1_MApi_XC_ACE_GetLibVer_SECTION 1 2310 #define U1_MApi_XC_ACE_GetInfo_SECTION 1 2311 #define U1_MApi_XC_ACE_GetStatus_SECTION 1 2312 #define U1_MApi_XC_ACE_SetDbgLevel_SECTION 1 2313 #define U1_MApi_XC_ACE_ColorCorrectionTable_SECTION 1 2314 #define U1_MApi_XC_ACE_SetColorMatrixControl_SECTION 1 2315 #define U1_MApi_XC_ACE_SetRBChannelRange_SECTION 1 2316 #define U1_MApi_XC_ACE_SetPowerState_SECTION 1 2317 #define U1_MApi_XC_ACE_PicSetPostColorTemp_SECTION 1 2318 #define U1_MApi_XC_ACE_PicSetPostColorTempEx_SECTION 1 2319 #define U1_MApi_XC_ACE_PicSetPostColorTemp2_SECTION 1 2320 #define U1_MApi_XC_ACE_PicSetPostColorTemp2Ex_SECTION 1 2321 #define U1_MApi_XC_ACE_EX_Init_SECTION 1 2322 #define U1_MApi_XC_ACE_EX_Exit_SECTION 1 2323 #define U1_MApi_XC_ACE_EX_DMS_SECTION 1 2324 #define U1_MApi_XC_ACE_EX_SetPCYUV2RGB_SECTION 1 2325 #define U1_MApi_XC_ACE_EX_SelectYUVtoRGBMatrix_SECTION 1 2326 #define U1_MApi_XC_ACE_EX_SetColorCorrectionTable_SECTION 1 2327 #define U1_MApi_XC_ACE_EX_SetPCsRGBTable_SECTION 1 2328 #define U1_MApi_XC_ACE_EX_GetColorMatrix_SECTION 1 2329 #define U1_MApi_XC_ACE_EX_SetColorMatrix_SECTION 1 2330 #define U1_MApi_XC_ACE_EX_SetBypassColorMatrix_SECTION 1 2331 #define U1_MApi_XC_ACE_EX_SetIHC_SECTION 1 2332 #define U1_MApi_XC_ACE_EX_PatchDTGColorChecker_SECTION 1 2333 #define U1_MApi_XC_ACE_EX_GetACEInfo_SECTION 1 2334 #define U1_MApi_XC_ACE_EX_GetACEInfoEx_SECTION 1 2335 #define U1_MApi_XC_ACE_EX_PicSetContrast_SECTION 1 2336 #define U1_MApi_XC_ACE_EX_PicSetBrightness_SECTION 1 2337 #define U1_MApi_XC_ACE_EX_PicSetBrightnessPrecise_SECTION 1 2338 #define U1_MApi_XC_ACE_EX_PicSetPreYOffset_SECTION 1 2339 #define U1_MApi_XC_ACE_EX_PicGetPreYOffset_SECTION 1 2340 #define U1_MApi_XC_ACE_EX_PicSetHue_SECTION 1 2341 #define U1_MApi_XC_ACE_EX_SkipWaitVsync_SECTION 1 2342 #define U1_MApi_XC_ACE_EX_PicSetSaturation_SECTION 1 2343 #define U1_MApi_XC_ACE_EX_PicSetSharpness_SECTION 1 2344 #define U1_MApi_XC_ACE_EX_PicSetColorTemp_SECTION 1 2345 #define U1_MApi_XC_ACE_EX_PicSetColorTempEx_SECTION 1 2346 #define U1_MApi_XC_ACE_EX_PicSetPostColorTemp_V02_SECTION 1 2347 #define U1_MApi_XC_ACE_EX_SetFleshTone_SECTION 1 2348 #define U1_MApi_XC_ACE_EX_SetBlackAdjust_SECTION 1 2349 #define U1_MApi_XC_ACE_EX_Set_IHC_SRAM_SECTION 1 2350 #define U1_MApi_XC_ACE_EX_Set_ICC_SRAM_SECTION 1 2351 #define U1_MApi_XC_ACE_EX_EnableMWE_SECTION 1 2352 #define U1_MApi_XC_ACE_EX_MWECloneVisualEffect_SECTION 1 2353 #define U1_MApi_XC_ACE_EX_MWESetRegTable_SECTION 1 2354 #define U1_MApi_XC_ACE_EX_SetMWELoadFromPQ_SECTION 1 2355 #define U1_MApi_XC_ACE_EX_MWEStatus_SECTION 1 2356 #define U1_MApi_XC_ACE_EX_MWEHandle_SECTION 1 2357 #define U1_MApi_XC_ACE_EX_MWEFuncSel_SECTION 1 2358 #define U1_MApi_XC_ACE_EX_MWESetDispWin_SECTION 1 2359 #define U1_MApi_XC_ACE_EX_3DClonePQMap_SECTION 1 2360 #define U1_MApi_XC_ACE_EX_DNR_Blending_NRTbl_SECTION 1 2361 #define U1_MApi_XC_ACE_EX_DNR_Blending_MISC_SECTION 1 2362 #define U1_MApi_XC_ACE_EX_DNR_Blending_SECTION 1 2363 #define U1_MApi_XC_ACE_EX_DNR_Get_PrecisionShift_SECTION 1 2364 #define U1_MApi_XC_ACE_EX_DNR_GetMotion_Weight_SECTION 1 2365 #define U1_MApi_XC_ACE_EX_DNR_GetLuma_Weight_SECTION 1 2366 #define U1_MApi_XC_ACE_EX_DNR_GetNoise_Weight_SECTION 1 2367 #define U1_MApi_XC_ACE_EX_DNR_GetMotion_SECTION 1 2368 #define U1_MApi_XC_ACE_EX_DNR_Init_Motion_SECTION 1 2369 #define U1_MApi_XC_ACE_EX_DNR_Init_Luma_SECTION 1 2370 #define U1_MApi_XC_ACE_EX_DNR_Init_Noise_SECTION 1 2371 #define U1_MApi_XC_ACE_EX_DNR_SetParam_SECTION 1 2372 #define U1_MApi_XC_ACE_EX_DNR_GetParam_SECTION 1 2373 #define U1_MApi_XC_ACE_EX_DNR_SetNRTbl_SECTION 1 2374 #define U1_MApi_XC_ACE_EX_GetLibVer_SECTION 1 2375 #define U1_MApi_XC_ACE_EX_GetInfo_SECTION 1 2376 #define U1_MApi_XC_ACE_EX_GetStatus_SECTION 1 2377 #define U1_MApi_XC_ACE_EX_SetDbgLevel_SECTION 1 2378 #define U1_MApi_XC_ACE_EX_ColorCorrectionTable_SECTION 1 2379 #define U1_MApi_XC_ACE_EX_SetColorMatrixControl_SECTION 1 2380 #define U1_MApi_XC_ACE_EX_SetRBChannelRange_SECTION 1 2381 #define U1_MApi_XC_ACE_EX_PicSetPostColorTemp_SECTION 1 2382 #define U1_MApi_XC_ACE_EX_PicSetPostColorTempEx_SECTION 1 2383 #define U1_MApi_XC_ACE_EX_PicSetPostColorTemp2_SECTION 1 2384 #define U1_MApi_XC_ACE_EX_PicSetPostColorTemp2Ex_SECTION 1 2385 #define U1_MApi_XC_ADC_SetCVBSOut_SECTION 1 2386 #define U1_MApi_XC_ADC_IsCVBSOutEnabled_SECTION 1 2387 #define U1_MApi_XC_ADC_SetPcClock_SECTION 1 2388 #define U1_MApi_XC_ADC_SetPhase_SECTION 1 2389 #define U1_MApi_XC_ADC_SetPhaseEx_SECTION 1 2390 #define U1_MApi_XC_ADC_GetPhaseRange_SECTION 1 2391 #define U1_MApi_XC_ADC_GetPhase_SECTION 1 2392 #define U1_MApi_XC_ADC_GetPhaseEx_SECTION 1 2393 #define U1_MApi_XC_ADC_IsScartRGB_SECTION 1 2394 #define U1_MApi_XC_ADC_GetPcClock_SECTION 1 2395 #define U1_MApi_XC_ADC_GetSoGLevelRange_SECTION 1 2396 #define U1_MApi_XC_ADC_SetSoGLevel_SECTION 1 2397 #define U1_MApi_XC_ADC_PowerOff_SECTION 1 2398 #define U1_MApi_XC_ADC_GetDefaultGainOffset_SECTION 1 2399 #define U1_MApi_XC_ADC_GetMaximalOffsetValue_SECTION 1 2400 #define U1_MApi_XC_ADC_GetMaximalGainValue_SECTION 1 2401 #define U1_MApi_XC_ADC_GetCenterGain_SECTION 1 2402 #define U1_MApi_XC_ADC_GetCenterOffset_SECTION 1 2403 #define U1_MApi_XC_ADC_SetGain_SECTION 1 2404 #define U1_MApi_XC_ADC_SetOffset_SECTION 1 2405 #define U1_MApi_XC_ADC_AdjustGainOffset_SECTION 1 2406 #define U1_MApi_XC_ADC_Source_Calibrate_SECTION 1 2407 #define U1_MApi_XC_ADC_SetSoGCal_SECTION 1 2408 #define U1_MApi_XC_ADC_SetRGB_PIPE_Delay_SECTION 1 2409 #define U1_MApi_XC_ADC_ScartRGB_SOG_ClampDelay_SECTION 1 2410 #define U1_MApi_XC_ADC_Set_YPbPrLooseLPF_SECTION 1 2411 #define U1_MApi_XC_ADC_Set_SOGBW_SECTION 1 2412 #define U1_MApi_XC_ADC_SetClampDuration_SECTION 1 2413 #define U1_MApi_XC_ADC_EnableHWCalibration_SECTION 1 2414 #define U1_MApi_XC_ADC_SetIdacCurrentMode_SECTION 1 2415 #define U1_MApi_XC_ADC_GetIdacCurrentMode_SECTION 1 2416 #define U1_MApi_XC_EX_GetLibVer_SECTION 1 2417 #define U1_MApi_XC_EX_GetInfo_SECTION 1 2418 #define U1_MApi_XC_EX_GetStatus_SECTION 1 2419 #define U1_MApi_XC_EX_GetStatusEx_SECTION 1 2420 #define U1_MApi_XC_EX_SetDbgLevel_SECTION 1 2421 #define U1_MApi_XC_EX_FPLLDbgMode_SECTION 1 2422 #define U1_MApi_XC_EX_FPLLCustomerMode_SECTION 1 2423 #define U1_MDrv_XC_EX_SetIOMapBase_SECTION 1 2424 #define U1_MApi_XC_EX_Init_SECTION 1 2425 #define U1_MApi_XC_EX_GetConfig_SECTION 1 2426 #define U1_MApi_XC_EX_Init_MISC_SECTION 1 2427 #define U1_MApi_XC_EX_GetMISCStatus_SECTION 1 2428 #define U1_MApi_XC_EX_GetCapability_SECTION 1 2429 #define U1_MApi_XC_EX_GetChipCaps_SECTION 1 2430 #define U1_MApi_XC_EX_Exit_SECTION 1 2431 #define U1_MApi_XC_EX_SetDynamicScaling_SECTION 1 2432 #define U1_MApi_XC_EX_GetDynamicScalingStatus_SECTION 1 2433 #define U1_MApi_XC_EX_Get_DNRBaseOffset_SECTION 1 2434 #define U1_MApi_XC_EX_Get_FrameNumFactor_SECTION 1 2435 #define U1_MApi_XC_EX_SetPreScalingLimit_SECTION 1 2436 #define U1_MApi_XC_EX_SetWindow_SECTION 1 2437 #define U1_MApi_XC_EX_SetDualWindow_SECTION 1 2438 #define U1_MApi_XC_EX_SetTravelingWindow_SECTION 1 2439 #define U1_MApi_XC_EX_SetInputSource_SECTION 1 2440 #define U1_MApi_XC_EX_IsYUVSpace_SECTION 1 2441 #define U1_MApi_XC_EX_IsMemoryFormat422_SECTION 1 2442 #define U1_MApi_XC_EX_EnableForceRGBin_SECTION 1 2443 #define U1_MApi_XC_EX_EnableMirrorModeEx_SECTION 1 2444 #define U1_MApi_XC_EX_GetMirrorModeTypeEx_SECTION 1 2445 #define U1_MApi_XC_EX_GetSyncStatus_SECTION 1 2446 #define U1_MApi_XC_EX_WaitOutputVSync_SECTION 1 2447 #define U1_MApi_XC_EX_WaitInputVSync_SECTION 1 2448 #define U1_MApi_XC_EX_SetHdmiSyncMode_SECTION 1 2449 #define U1_MApi_XC_EX_GetHdmiSyncMode_SECTION 1 2450 #define U1_MApi_XC_EX_SetRepWindow_SECTION 1 2451 #define U1_MApi_XC_EX_Set_OPWriteOffEnable_SECTION 1 2452 #define U1_MApi_XC_EX_ForceSet_OPWriteOffEnable_SECTION 1 2453 #define U1_MApi_XC_EX_SetDispWinToReg_SECTION 1 2454 #define U1_MApi_XC_EX_GetDispWinFromReg_SECTION 1 2455 #define U1_MApi_XC_EX_FreezeImg_SECTION 1 2456 #define U1_MApi_XC_EX_IsFreezeImg_SECTION 1 2457 #define U1_MApi_XC_EX_GenerateBlackVideoForBothWin_SECTION 1 2458 #define U1_MApi_XC_EX_Set_BLSK_SECTION 1 2459 #define U1_MApi_XC_EX_GenerateBlackVideo_SECTION 1 2460 #define U1_MApi_XC_EX_IsBlackVideoEnable_SECTION 1 2461 #define U1_MApi_XC_EX_EnableFrameBufferLess_SECTION 1 2462 #define U1_MApi_XC_EX_IsCurrentFrameBufferLessMode_SECTION 1 2463 #define U1_MApi_XC_EX_EnableRequest_FrameBufferLess_SECTION 1 2464 #define U1_MApi_XC_EX_IsCurrentRequest_FrameBufferLessMode_SECTION 1 2465 #define U1_MApi_XC_EX_Get_3D_HW_Version_SECTION 1 2466 #define U1_MApi_XC_EX_Get_3D_IsSupportedHW2DTo3D_SECTION 1 2467 #define U1_MApi_XC_EX_Set_3D_Mode_SECTION 1 2468 #define U1_MApi_XC_EX_Set_3D_MainWin_FirstMode_SECTION 1 2469 #define U1_MApi_XC_EX_Set_3D_LR_Frame_Exchg_SECTION 1 2470 #define U1_MApi_XC_EX_3D_Is_LR_Frame_Exchged_SECTION 1 2471 #define U1_MApi_XC_EX_Get_3D_Input_Mode_SECTION 1 2472 #define U1_MApi_XC_EX_Get_3D_Output_Mode_SECTION 1 2473 #define U1_MApi_XC_EX_Get_3D_Panel_Type_SECTION 1 2474 #define U1_MApi_XC_EX_Get_3D_MainWin_First_SECTION 1 2475 #define U1_MApi_XC_EX_3DMainSub_IPSync_SECTION 1 2476 #define U1_MApi_XC_EX_Set_3D_VerVideoOffset_SECTION 1 2477 #define U1_MApi_XC_EX_Get_3D_VerVideoOffset_SECTION 1 2478 #define U1_MApi_XC_EX_Is3DFormatSupported_SECTION 1 2479 #define U1_MApi_XC_EX_Set_3D_HShift_SECTION 1 2480 #define U1_MApi_XC_EX_Enable_3D_LR_Sbs2Line_SECTION 1 2481 #define U1_MApi_XC_EX_Get_3D_HShift_SECTION 1 2482 #define U1_MApi_XC_EX_Set_3D_HW2DTo3D_Buffer_SECTION 1 2483 #define U1_MApi_XC_EX_Set_3D_HW2DTo3D_Parameters_SECTION 1 2484 #define U1_MApi_XC_EX_Get_3D_HW2DTo3D_Parameters_SECTION 1 2485 #define U1_MApi_XC_EX_Set_3D_Detect3DFormat_Parameters_SECTION 1 2486 #define U1_MApi_XC_EX_Get_3D_Detect3DFormat_Parameters_SECTION 1 2487 #define U1_MApi_XC_EX_Detect3DFormatByContent_SECTION 1 2488 #define U1_MApi_XC_EX_DetectNL_SECTION 1 2489 #define U1_MApi_XC_EX_3D_PostPQSetting_SECTION 1 2490 #define U1_MApi_XC_EX_Set_3D_FPInfo_SECTION 1 2491 #define U1_MApi_XC_EX_EnableAutoDetect3D_SECTION 1 2492 #define U1_MApi_XC_EX_GetAutoDetect3DFlag_SECTION 1 2493 #define U1_MApi_XC_EX_Set_3D_SubWinClk_SECTION 1 2494 #define U1_MApi_XC_EX_3D_Is_LR_Sbs2Line_SECTION 1 2495 #define U1_MApi_SC_EX_3D_Is_Skip_Default_LR_Flag_SECTION 1 2496 #define U1_MApi_XC_EX_3D_Enable_Skip_Default_LR_Flag_SECTION 1 2497 #define U1_MApi_XC_EX_Mux_Init_SECTION 1 2498 #define U1_MApi_XC_EX_Mux_SourceMonitor_SECTION 1 2499 #define U1_MApi_XC_EX_Mux_CreatePath_SECTION 1 2500 #define U1_MApi_XC_EX_Mux_DeletePath_SECTION 1 2501 #define U1_MApi_XC_EX_Mux_EnablePath_SECTION 1 2502 #define U1_MApi_XC_EX_Mux_TriggerPathSyncEvent_SECTION 1 2503 #define U1_MApi_XC_EX_Mux_TriggerDestOnOffEvent_SECTION 1 2504 #define U1_MApi_XC_EX_Mux_OnOffPeriodicHandler_SECTION 1 2505 #define U1_MApi_XC_EX_Mux_GetPathInfo_SECTION 1 2506 #define U1_MApi_XC_EX_Mux_SetSupportMhlPathInfo_SECTION 1 2507 #define U1_MApi_XC_EX_Mux_SetMhlHotPlugInverseInfo_SECTION 1 2508 #define U1_MApi_XC_EX_Mux_GetHDMIPort_SECTION 1 2509 #define U1_MApi_XC_EX_MUX_MapInputSourceToVDYMuxPORT_SECTION 1 2510 #define U1_MApi_XC_EX_Set_NR_SECTION 1 2511 #define U1_MApi_XC_EX_FilmMode_P_SECTION 1 2512 #define U1_MApi_XC_EX_GetUCEnabled_SECTION 1 2513 #define U1_MApi_XC_EX_GenSpecificTiming_SECTION 1 2514 #define U1_MApi_XC_EX_GetDEBypassMode_SECTION 1 2515 #define U1_MApi_XC_EX_GetDEWindow_SECTION 1 2516 #define U1_MApi_XC_EX_GetDEWidthHeightInDEByPassMode_SECTION 1 2517 #define U1_MApi_XC_EX_GetCaptureWindow_SECTION 1 2518 #define U1_MApi_XC_EX_SetCaptureWindowVstart_SECTION 1 2519 #define U1_MApi_XC_EX_SetCaptureWindowHstart_SECTION 1 2520 #define U1_MApi_XC_EX_SetCaptureWindowVsize_SECTION 1 2521 #define U1_MApi_XC_EX_SetCaptureWindowHsize_SECTION 1 2522 #define U1_MApi_XC_EX_SoftwareReset_SECTION 1 2523 #define U1_MApi_XC_EX_CalculateHFreqx10_SECTION 1 2524 #define U1_MApi_XC_EX_CalculateHFreqx1K_SECTION 1 2525 #define U1_MApi_XC_EX_CalculateVFreqx10_SECTION 1 2526 #define U1_MApi_XC_EX_CalculateVFreqx1K_SECTION 1 2527 #define U1_MApi_XC_EX_GetAccurateVFreqx1K_SECTION 1 2528 #define U1_MApi_XC_EX_InterruptAttach_SECTION 1 2529 #define U1_MApi_XC_EX_InterruptDeAttach_SECTION 1 2530 #define U1_MApi_XC_EX_DisableInputSource_SECTION 1 2531 #define U1_MApi_XC_EX_IsInputSourceDisabled_SECTION 1 2532 #define U1_MApi_XC_EX_ChangePanelType_SECTION 1 2533 #define U1_MApi_XC_EX_GetCurrentReadBank_SECTION 1 2534 #define U1_MApi_XC_EX_GetCurrentWriteBank_SECTION 1 2535 #define U1_MApi_XC_EX_SetAutoPreScaling_SECTION 1 2536 #define U1_MApi_XC_EX_GetVSyncWidth_SECTION 1 2537 #define U1_MApi_XC_EX_set_GOP_Enable_SECTION 1 2538 #define U1_MApi_XC_EX_ip_sel_for_gop_SECTION 1 2539 #define U1_MApi_XC_EX_SetVOPNBL_SECTION 1 2540 #define U1_MApi_XC_EX_GetDstInfo_SECTION 1 2541 #define U1_MApi_XC_EX_set_FD_Mask_SECTION 1 2542 #define U1_MApi_XC_EX_Get_FD_Mask_SECTION 1 2543 #define U1_MApi_XC_EX_set_FD_Mask_byWin_SECTION 1 2544 #define U1_MApi_XC_EX_Get_FD_Mask_byWin_SECTION 1 2545 #define U1_MApi_XC_EX_SetIP1TestPattern_SECTION 1 2546 #define U1_MApi_XC_EX_InitIPForInternalTiming_SECTION 1 2547 #define U1_MApi_XC_EX_SetIPMux_SECTION 1 2548 #define U1_MApi_XC_EX_Is_H_Sync_Active_SECTION 1 2549 #define U1_MApi_XC_EX_Is_V_Sync_Active_SECTION 1 2550 #define U1_MApi_XC_EX_GetAutoPositionWindow_SECTION 1 2551 #define U1_MApi_XC_EX_SetFrameBufferAddress_SECTION 1 2552 #define U1_MApi_XC_EX_IsFrameBufferEnoughForCusScaling_SECTION 1 2553 #define U1_MApi_XC_EX_SetScalerMemoryRequest_SECTION 1 2554 #define U1_MApi_XC_EX_Get_PixelData_SECTION 1 2555 #define U1_MApi_XC_EX_GetAvailableSize_SECTION 1 2556 #define U1_MApi_XC_EX_SetFrameColor_SECTION 1 2557 #define U1_MApi_XC_EX_SetDispWindowColor_SECTION 1 2558 #define U1_MApi_XC_EX_SupportSourceToVE_SECTION 1 2559 #define U1_MApi_XC_EX_SetOutputCapture_SECTION 1 2560 #define U1_MApi_XC_EX_SetGammaOnOff_SECTION 1 2561 #define U1_MApi_XC_EX_SetPreGammaGain_SECTION 1 2562 #define U1_MApi_XC_EX_SetPreGammaOffset_SECTION 1 2563 #define U1_MApi_XC_EX_SetPanelTiming_SECTION 1 2564 #define U1_MApi_XC_EX_SetOutTimingMode_SECTION 1 2565 #define U1_MApi_XC_EX_SetFreeRunTiming_SECTION 1 2566 #define U1_MApi_XC_EX_Set_CustomerSyncInfo_SECTION 1 2567 #define U1_MApi_XC_EX_WaitFPLLDone_SECTION 1 2568 #define U1_MApi_XC_EX_GetOutputVFreqX100_SECTION 1 2569 #define U1_MApi_XC_EX_FrameLockCheck_SECTION 1 2570 #define U1_MApi_XC_EX_CustomizeFRCTable_SECTION 1 2571 #define U1_MApi_XC_EX_OutputFrameCtrl_SECTION 1 2572 #define U1_MApi_SC_EX_Enable_FPLL_FSM_SECTION 1 2573 #define U1_MApi_SC_EX_ForceFreerun_SECTION 1 2574 #define U1_MApi_SC_EX_IsForceFreerun_SECTION 1 2575 #define U1_MApi_SC_EX_SetFreerunVFreq_SECTION 1 2576 #define U1_MApi_XC_EX_SetExPanelInfo_SECTION 1 2577 #define U1_MApi_XC_EX_Enable_FPLL_Thresh_Mode_SECTION 1 2578 #define U1_MApi_XC_EX_EnableIPAutoNoSignal_SECTION 1 2579 #define U1_MApi_XC_EX_GetIPAutoNoSignal_SECTION 1 2580 #define U1_MApi_XC_EX_EnableIPAutoCoast_SECTION 1 2581 #define U1_MApi_XC_EX_EnableIPCoastDebounce_SECTION 1 2582 #define U1_MApi_XC_EX_ClearIPCoastStatus_SECTION 1 2583 #define U1_MApi_XC_EX_EnableFpllManualSetting_SECTION 1 2584 #define U1_MApi_XC_EX_FpllBoundaryTest_SECTION 1 2585 #define U1_MApi_XC_EX_SetOffLineDetection_SECTION 1 2586 #define U1_MApi_XC_EX_GetOffLineDetection_SECTION 1 2587 #define U1_MApi_XC_EX_SetOffLineSogThreshold_SECTION 1 2588 #define U1_MApi_XC_EX_SetOffLineSogBW_SECTION 1 2589 #define U1_MApi_XC_EX_OffLineInit_SECTION 1 2590 #define U1_MApi_XC_EX_Set_Extra_fetch_adv_line_SECTION 1 2591 #define U1_MApi_XC_EX_SetVGASogEn_SECTION 1 2592 #define U1_MApi_XC_EX_EnableWindow_SECTION 1 2593 #define U1_MApi_XC_EX_Is_SubWindowEanble_SECTION 1 2594 #define U1_MApi_XC_EX_SetBorderFormat_SECTION 1 2595 #define U1_MApi_XC_EX_EnableBorder_SECTION 1 2596 #define U1_MApi_XC_EX_ZorderMainWindowFirst_SECTION 1 2597 #define U1_MApi_XC_EX_PQ_LoadFunction_SECTION 1 2598 #define U1_MApi_XC_EX_Check_HNonLinearScaling_SECTION 1 2599 #define U1_MApi_XC_EX_EnableEuroHdtvSupport_SECTION 1 2600 #define U1_MApi_XC_EX_EnableEuroHdtvDetection_SECTION 1 2601 #define U1_MApi_XC_EX_ReadByte_SECTION 1 2602 #define U1_MApi_XC_EX_WriteByte_SECTION 1 2603 #define U1_MApi_XC_EX_WriteByteMask_SECTION 1 2604 #define U1_MApi_XC_EX_Write2ByteMask_SECTION 1 2605 #define U1_MApi_XC_EX_W2BYTE_SECTION 1 2606 #define U1_MApi_XC_EX_R2BYTE_SECTION 1 2607 #define U1_MApi_XC_EX_W4BYTE_SECTION 1 2608 #define U1_MApi_XC_EX_R4BYTE_SECTION 1 2609 #define U1_MApi_XC_EX_R2BYTEMSK_SECTION 1 2610 #define U1_MApi_XC_EX_W2BYTEMSK_SECTION 1 2611 #define U1_MApi_XC_EX_MLoad_Init_SECTION 1 2612 #define U1_MApi_XC_EX_MLoad_Enable_SECTION 1 2613 #define U1_MApi_XC_EX_MLoad_GetStatus_SECTION 1 2614 #define U1_MApi_XC_EX_MLoad_WriteCmd_And_Fire_SECTION 1 2615 #define U1_MApi_XC_EX_MLoad_WriteCmds_And_Fire_SECTION 1 2616 #define U1_MApi_XC_EX_MLG_Init_SECTION 1 2617 #define U1_MApi_XC_EX_MLG_Enable_SECTION 1 2618 #define U1_MApi_XC_EX_MLG_GetCaps_SECTION 1 2619 #define U1_MApi_XC_EX_MLG_GetStatus_SECTION 1 2620 #define U1_MApi_XC_EX_SetOSD2VEMode_SECTION 1 2621 #define U1_MApi_XC_EX_IP2_PreFilter_Enable_SECTION 1 2622 #define U1_MApi_XC_EX_Get_Pixel_RGB_SECTION 1 2623 #define U1_MApi_XC_EX_KeepPixelPointerAppear_SECTION 1 2624 #define U1_MApi_XC_EX_Set_MemFmtEx_SECTION 1 2625 #define U1_MApi_XC_EX_IsRequestFrameBufferLessMode_SECTION 1 2626 #define U1_MApi_XC_EX_SkipSWReset_SECTION 1 2627 #define U1_MApi_XC_EX_EnableRepWindowForFrameColor_SECTION 1 2628 #define U1_MApi_XC_EX_SetOSDLayer_SECTION 1 2629 #define U1_MApi_XC_EX_GetOSDLayer_SECTION 1 2630 #define U1_MApi_XC_EX_SetVideoAlpha_SECTION 1 2631 #define U1_MApi_XC_EX_GetVideoAlpha_SECTION 1 2632 #define U1_MApi_XC_EX_SkipWaitVsync_SECTION 1 2633 #define U1_MApi_XC_EX_OP2VOPDESel_SECTION 1 2634 #define U1_MApi_XC_EX_FRC_SetWindow_SECTION 1 2635 #define U1_MApi_XC_EX_Enable_TwoInitFactor_SECTION 1 2636 #define U1_MApi_XC_EX_IsFieldPackingModeSupported_SECTION 1 2637 #define U1_MApi_XC_EX_PreInit_SECTION 1 2638 #define U1_MApi_XC_EX_Get_BufferData_SECTION 1 2639 #define U1_MApi_XC_EX_Set_BufferData_SECTION 1 2640 #define U1_MApi_XC_EX_EnableMainWindow_SECTION 1 2641 #define U1_MApi_XC_EX_EnableSubWindow_SECTION 1 2642 #define U1_MApi_XC_EX_DisableSubWindow_SECTION 1 2643 #define U1_MApi_XC_EX_SetPixelShift_SECTION 1 2644 #define U1_MApi_XC_EX_SetVideoOnOSD_SECTION 1 2645 #define U1_MApi_XC_EX_SetOSDBlendingFormula_SECTION 1 2646 #define U1_MApi_XC_EX_ReportPixelInfo_SECTION 1 2647 #define U1_MApi_XC_EX_SetScaling_SECTION 1 2648 #define U1_MApi_XC_EX_SetMCDIBufferAddress_SECTION 1 2649 #define U1_MApi_XC_EX_EnableMCDI_SECTION 1 2650 #define U1_MApi_XC_EX_SendCmdToFRC_SECTION 1 2651 #define U1_MApi_XC_EX_GetMsgFromFRC_SECTION 1 2652 #define U1_MApi_XC_EX_EnableRWBankAuto_SECTION 1 2653 #define U1_MApi_XC_EX_SetWRBankMappingNum_SECTION 1 2654 #define U1_MApi_XC_EX_GetWRBankMappingNum_SECTION 1 2655 #define U1_MApi_XC_EX_GetWRBankMappingNumForZap_SECTION 1 2656 #define U1_MApi_XC_EX_SetBOBMode_SECTION 1 2657 #define U1_MApi_XC_EX_SetForceReadBank_SECTION 1 2658 #define U1_MApi_XC_EX_LD_Init_SECTION 1 2659 #define U1_MApi_XC_EX_LD_SetMemoryAddress_SECTION 1 2660 #define U1_MApi_XC_EX_LD_SetLevel_SECTION 1 2661 #define U1_MApi_XC_EX_Set_TurnoffLDBL_SECTION 1 2662 #define U1_MApi_XC_EX_Set_notUpdateSPIDataFlags_SECTION 1 2663 #define U1_MApi_XC_EX_Set_UsermodeLDFlags_SECTION 1 2664 #define U1_MApi_XC_EX_Set_BLLevel_SECTION 1 2665 #define U1_MApi_XC_EX_Set_BWS_Mode_SECTION 1 2666 #define U1_MApi_XC_EX_FRC_ColorPathCtrl_SECTION 1 2667 #define U1_MApi_XC_EX_FRC_OP2_SetRGBGain_SECTION 1 2668 #define U1_MApi_XC_EX_FRC_OP2_SetRGBOffset_SECTION 1 2669 #define U1_MApi_XC_EX_FRC_OP2_SetDither_SECTION 1 2670 #define U1_MApi_XC_EX_FRC_BypassMFC_SECTION 1 2671 #define U1_MApi_XC_EX_ForceReadFrame_SECTION 1 2672 #define U1_MApi_XC_EX_SetCsc_SECTION 1 2673 #define U1_MApi_XC_EX_RegisterPQSetFPLLThreshMode_SECTION 1 2674 #define U1_MApi_XC_EX_GetFreeRunStatus_SECTION 1 2675 #define U1_MApi_XC_EX_Get_DSForceIndexSupported_SECTION 1 2676 #define U1_MApi_XC_EX_Set_DSForceIndex_SECTION 1 2677 #define U1_MApi_XC_EX_Set_DSIndexSourceSelect_SECTION 1 2678 #define U1_MApi_XC_EX_OSDC_InitSetting_SECTION 1 2679 #define U1_MApi_XC_EX_OSDC_Control_SECTION 1 2680 #define U1_MApi_XC_EX_OSDC_GetDstInfo_SECTION 1 2681 #define U1_MApi_XC_EX_OSDC_SetOutVfreqx10_SECTION 1 2682 #define U1_MApi_XC_EX_BYPASS_SetOSDVsyncPos_SECTION 1 2683 #define U1_MApi_XC_EX_BYPASS_SetInputSrc_SECTION 1 2684 #define U1_MApi_XC_EX_BYPASS_SetCSC_SECTION 1 2685 #define U1_MApi_XC_EX_SetSeamlessZapping_SECTION 1 2686 #define U1_MApi_XC_EX_Vtrack_SetPayloadData_SECTION 1 2687 #define U1_MApi_XC_EX_Vtrack_SetUserDefindedSetting_SECTION 1 2688 #define U1_MApi_XC_EX_Vtrack_Enable_SECTION 1 2689 #define U1_MApi_XC_EX_PreSetPQInfo_SECTION 1 2690 #define U1_MApi_XC_EX_Is_OP1_TestPattern_Enabled_SECTION 1 2691 #define U1_MApi_XC_EX_Set_OP1_TestPattern_SECTION 1 2692 #define U1_MApi_XC_EX_Set_WhiteBalance_Pattern_SECTION 1 2693 #define U1_MApi_XC_EX_Get3DFormat_SECTION 1 2694 #define U1_MApi_XC_ADC_EX_SetCVBSOut_SECTION 1 2695 #define U1_MApi_XC_ADC_EX_IsCVBSOutEnabled_SECTION 1 2696 #define U1_MApi_XC_ADC_EX_SetPcClock_SECTION 1 2697 #define U1_MApi_XC_ADC_EX_SetPhase_SECTION 1 2698 #define U1_MApi_XC_ADC_EX_SetPhaseEx_SECTION 1 2699 #define U1_MApi_XC_ADC_EX_GetPhaseRange_SECTION 1 2700 #define U1_MApi_XC_ADC_EX_GetPhase_SECTION 1 2701 #define U1_MApi_XC_ADC_EX_GetPhaseEx_SECTION 1 2702 #define U1_MApi_XC_ADC_EX_IsScartRGB_SECTION 1 2703 #define U1_MApi_XC_ADC_EX_GetPcClock_SECTION 1 2704 #define U1_MApi_XC_ADC_EX_GetSoGLevelRange_SECTION 1 2705 #define U1_MApi_XC_ADC_EX_SetSoGLevel_SECTION 1 2706 #define U1_MApi_XC_ADC_EX_PowerOff_SECTION 1 2707 #define U1_MApi_XC_ADC_EX_GetDefaultGainOffset_SECTION 1 2708 #define U1_MApi_XC_ADC_EX_GetMaximalOffsetValue_SECTION 1 2709 #define U1_MApi_XC_ADC_EX_GetMaximalGainValue_SECTION 1 2710 #define U1_MApi_XC_ADC_EX_GetCenterGain_SECTION 1 2711 #define U1_MApi_XC_ADC_EX_GetCenterOffset_SECTION 1 2712 #define U1_MApi_XC_ADC_EX_SetGain_SECTION 1 2713 #define U1_MApi_XC_ADC_EX_SetOffset_SECTION 1 2714 #define U1_MApi_XC_ADC_EX_AdjustGainOffset_SECTION 1 2715 #define U1_MApi_XC_ADC_EX_Source_Calibrate_SECTION 1 2716 #define U1_MApi_XC_ADC_EX_SetSoGCal_SECTION 1 2717 #define U1_MApi_XC_ADC_EX_SetRGB_PIPE_Delay_SECTION 1 2718 #define U1_MApi_XC_ADC_EX_ScartRGB_SOG_ClampDelay_SECTION 1 2719 #define U1_MApi_XC_ADC_EX_Set_YPbPrLooseLPF_SECTION 1 2720 #define U1_MApi_XC_ADC_EX_Set_SOGBW_SECTION 1 2721 #define U1_MApi_XC_ADC_EX_SetClampDuration_SECTION 1 2722 #define U1_MApi_XC_ADC_EX_EnableHWCalibration_SECTION 1 2723 #define U1_MApi_XC_Auto_Geometry_SECTION 1 2724 #define U1_MApi_XC_Auto_Geometry_Ex_SECTION 1 2725 #define U1_MApi_XC_Auto_StopAutoGeometry_SECTION 1 2726 #define U1_MApi_XC_Auto_GainOffset_SECTION 1 2727 #define U1_MApi_XC_Auto_GetHWFixedGainOffset_SECTION 1 2728 #define U1_MApi_XC_Auto_SetValidData_SECTION 1 2729 #define U1_MApi_XC_Auto_AutoOffset_SECTION 1 2730 #define U1_MApi_XC_Auto_DetectWidth_SECTION 1 2731 #define U1_MApi_XC_Auto_SetCalibrationMode_SECTION 1 2732 #define U1_MApi_XC_Auto_GetCalibrationMode_SECTION 1 2733 #define U1_MApi_XC_AUTO_GetSyncInfo_SECTION 1 2734 #define U1_MApi_XC_Auto_EX_Geometry_SECTION 1 2735 #define U1_MApi_XC_Auto_EX_Geometry_Ex_SECTION 1 2736 #define U1_MApi_XC_Auto_EX_StopAutoGeometry_SECTION 1 2737 #define U1_MApi_XC_Auto_EX_GainOffset_SECTION 1 2738 #define U1_MApi_XC_Auto_EX_GetHWFixedGainOffset_SECTION 1 2739 #define U1_MApi_XC_Auto_EX_SetValidData_SECTION 1 2740 #define U1_MApi_XC_Auto_EX_AutoOffset_SECTION 1 2741 #define U1_MApi_XC_Auto_EX_DetectWidth_SECTION 1 2742 #define U1_MApi_XC_Auto_EX_SetCalibrationMode_SECTION 1 2743 #define U1_MApi_XC_Auto_EX_GetCalibrationMode_SECTION 1 2744 #define U1_MApi_XC_DLC_DBC_Init_SECTION 1 2745 #define U1_MApi_XC_DBC_Init_SECTION 1 2746 #define U1_MApi_XC_DLC_DBC_Setstatus_SECTION 1 2747 #define U1_MApi_XC_DLC_DBC_Getstatus_SECTION 1 2748 #define U1_MApi_XC_DLC_DBC_SetReady_SECTION 1 2749 #define U1_MApi_XC_DLC_DBC_SetDebugMode_SECTION 1 2750 #define U1_MApi_XC_DLC_DBC_GetDebugMode_SECTION 1 2751 #define U1_MApi_XC_DLC_DBC_UpdatePWM_SECTION 1 2752 #define U1_MApi_XC_DLC_DBC_Handler_SECTION 1 2753 #define U1_MApi_XC_DLC_DBC_AdjustYCGain_SECTION 1 2754 #define U1_MApi_XC_DLC_DBC_YCGainInit_SECTION 1 2755 #define U1_MApi_XC_DLC_DBC_Reset_SECTION 1 2756 #define U1_MApi_XC_DBC_DecodeExtCmd_SECTION 1 2757 #define U1_MApi_XC_DIP_QueryResource_SECTION 1 2758 #define U1_MApi_XC_DIP_GetResource_SECTION 1 2759 #define U1_MApi_XC_DIP_ReleaseResource_SECTION 1 2760 #define U1_MApi_XC_DIP_CMDQ_SetAction_SECTION 1 2761 #define U1_MApi_XC_DIP_InitByDIP_SECTION 1 2762 #define U1_MApi_XC_DIP_SetFrameBufferAddress_SECTION 1 2763 #define U1_MApi_XC_DIP_SetInputSource_SECTION 1 2764 #define U1_MApi_XC_DIP_GetInputSource_SECTION 1 2765 #define U1_MApi_XC_DIP_DisableInputSource_SECTION 1 2766 #define U1_MApi_XC_DIP_SetWindow_SECTION 1 2767 #define U1_MApi_XC_DIP_GetDEWindow_SECTION 1 2768 #define U1_MApi_XC_DIP_SetCaptureWindowVstart_SECTION 1 2769 #define U1_MApi_XC_DIP_SetCaptureWindowHstart_SECTION 1 2770 #define U1_MApi_XC_DIP_SetCaptureWindowVsize_SECTION 1 2771 #define U1_MApi_XC_DIP_SetCaptureWindowHsize_SECTION 1 2772 #define U1_MApi_XC_DIP_GetCaptureWindow_SECTION 1 2773 #define U1_MApi_XC_DIP_EnableR2Y_SECTION 1 2774 #define U1_MApi_XC_DIP_SWReset_SECTION 1 2775 #define U1_MApi_XC_DIP_FrameRateCtrl_SECTION 1 2776 #define U1_MApi_XC_DIP_CapOneFrame_SECTION 1 2777 #define U1_MApi_XC_DIP_CapOneFrameFast_SECTION 1 2778 #define U1_MApi_XC_DIP_ClearInt_SECTION 1 2779 #define U1_MApi_XC_DIP_Ena_SECTION 1 2780 #define U1_MApi_XC_DIP_EnaInt_SECTION 1 2781 #define U1_MApi_XC_DIP_SetSourceScanType_SECTION 1 2782 #define U1_MApi_XC_DIP_EnaInterlaceWrite_SECTION 1 2783 #define U1_MApi_XC_DIP_SetOutputDataFmt_SECTION 1 2784 #define U1_MApi_XC_DIP_SetDIPWinProperty_SECTION 1 2785 #define U1_MApi_XC_DIP_EnableY2R_SECTION 1 2786 #define U1_MApi_XC_DIP_SetAlpha_SECTION 1 2787 #define U1_MApi_XC_DIP_SwapUV_SECTION 1 2788 #define U1_MApi_XC_DIP_SwapYC_SECTION 1 2789 #define U1_MApi_XC_DIP_SwapRGB_SECTION 1 2790 #define U1_MApi_XC_DIP_SetWinProperty_Ex_SECTION 1 2791 #define U1_MApi_XC_DIP_SetOutputCapture_SECTION 1 2792 #define U1_MApi_XC_DIP_SetMirror_SECTION 1 2793 #define U1_MApi_XC_DIP_SetDIPRProperty_SECTION 1 2794 #define U1_MApi_XC_DIP_SetDIPRProperty_EX_SECTION 1 2795 #define U1_MApi_XC_DIP_InterruptAttach_SECTION 1 2796 #define U1_MApi_XC_DIP_InterruptDetach_SECTION 1 2797 #define U1_MApi_XC_DIP_SetPowerState_SECTION 1 2798 #define U1_MApi_XC_DIP_Rotation_SECTION 1 2799 #define U1_MApi_XC_DIP_SetPinpon_SECTION 1 2800 #define U1_MApi_XC_DIP_SetHVSP_SECTION 1 2801 #define U1_MApi_XC_DIP_Set420TileBlock_SECTION 1 2802 #define U1_MApi_XC_DIP_SetDbgLevel_SECTION 1 2803 #define U1_MApi_XC_DIP_GetIntStatus_SECTION 1 2804 #define U1_MApi_XC_DIP_GetBufInfo_SECTION 1 2805 #define U1_MDrv_XC_DIP_GetResourceByPipeID_SECTION 1 2806 #define U1_MDrv_XC_DIP_ConfigPipe_SECTION 1 2807 #define U1_MDrv_XC_DIP_CheckPipe_SECTION 1 2808 #define U1_MApi_XC_DIP_EX_InitByDIP_SECTION 1 2809 #define U1_MApi_XC_DIP_EX_SetFrameBufferAddress_SECTION 1 2810 #define U1_MApi_XC_DIP_EX_SetInputSource_SECTION 1 2811 #define U1_MApi_XC_DIP_EX_GetInputSource_SECTION 1 2812 #define U1_MApi_XC_DIP_EX_DisableInputSource_SECTION 1 2813 #define U1_MApi_XC_DIP_EX_SetWindow_SECTION 1 2814 #define U1_MApi_XC_DIP_EX_GetDEWindow_SECTION 1 2815 #define U1_MApi_XC_DIP_EX_SetCaptureWindowVstart_SECTION 1 2816 #define U1_MApi_XC_DIP_EX_SetCaptureWindowHstart_SECTION 1 2817 #define U1_MApi_XC_DIP_EX_SetCaptureWindowVsize_SECTION 1 2818 #define U1_MApi_XC_DIP_EX_SetCaptureWindowHsize_SECTION 1 2819 #define U1_MApi_XC_DIP_EX_GetCaptureWindow_SECTION 1 2820 #define U1_MApi_XC_DIP_EX_EnableR2Y_SECTION 1 2821 #define U1_MApi_XC_DIP_EX_SWReset_SECTION 1 2822 #define U1_MApi_XC_DIP_EX_FrameRateCtrl_SECTION 1 2823 #define U1_MApi_XC_DIP_EX_CapOneFrame_SECTION 1 2824 #define U1_MApi_XC_DIP_EX_CapOneFrameFast_SECTION 1 2825 #define U1_MApi_XC_DIP_EX_SetPinpon_SECTION 1 2826 #define U1_MApi_XC_DIP_EX_ClearInt_SECTION 1 2827 #define U1_MApi_XC_DIP_EX_Ena_SECTION 1 2828 #define U1_MApi_XC_DIP_EX_EnaInt_SECTION 1 2829 #define U1_MApi_XC_DIP_EX_SetSourceScanType_SECTION 1 2830 #define U1_MApi_XC_DIP_EX_EnaInterlaceWrite_SECTION 1 2831 #define U1_MApi_XC_DIP_EX_SetOutputDataFmt_SECTION 1 2832 #define U1_MApi_XC_DIP_EX_SetDIPWinProperty_SECTION 1 2833 #define U1_MApi_XC_DIP_EX_EnableY2R_SECTION 1 2834 #define U1_MApi_XC_DIP_EX_SetAlpha_SECTION 1 2835 #define U1_MApi_XC_DIP_EX_SwapUV_SECTION 1 2836 #define U1_MApi_XC_DIP_EX_SwapYC_SECTION 1 2837 #define U1_MApi_XC_DIP_EX_SwapRGB_SECTION 1 2838 #define U1_MApi_XC_DIP_EX_SetWinProperty_Ex_SECTION 1 2839 #define U1_MApi_XC_DIP_EX_SetOutputCapture_SECTION 1 2840 #define U1_MApi_XC_DIP_EX_SetMirror_SECTION 1 2841 #define U1_MApi_XC_DIP_EX_SetDIPRProperty_SECTION 1 2842 #define U1_MApi_XC_DIP_EX_InterruptAttach_SECTION 1 2843 #define U1_MApi_XC_DIP_EX_InterruptDetach_SECTION 1 2844 #define U1_MApi_XC_DIP_EX_GetIntStatus_SECTION 1 2845 #define U1_MApi_XC_DIP_EX_GetBufInfo_SECTION 1 2846 #define U1_MApi_XC_DLC_Init_Ex_SECTION 1 2847 #define U1_MApi_XC_DLC_SetSetting_Ex_SECTION 1 2848 #define U1_MApi_XC_DLC_SetCurve_SECTION 1 2849 #define U1_MApi_XC_DLC_SetBleSlopPoint_SECTION 1 2850 #define U1_MApi_XC_DLC_SetHDRInit_SECTION 1 2851 #define U1_MApi_XC_DLC_Exit_SECTION 1 2852 #define U1_MApi_XC_DLC_SetOnOff_SECTION 1 2853 #define U1_MApi_XC_DLC_SetDlcHandlerOnOff_SECTION 1 2854 #define U1_MApi_XC_DLC_SetBleOnOff_SECTION 1 2855 #define U1_MApi_XC_DLC_EnableMainSubCurveSynchronization_SECTION 1 2856 #define U1_MApi_XC_DLC_Handler_SECTION 1 2857 #define U1_MApi_XC_DLC_GetHistogramHandler_SECTION 1 2858 #define U1_MApi_XC_DLC_GetAverageValue_SECTION 1 2859 #define U1_MApi_XC_DLC_GetAverageValue_Ex_SECTION 1 2860 #define U1_MApi_XC_DLC_InitCurve_SECTION 1 2861 #define U1_MApi_XC_DLC_SpeedupTrigger_SECTION 1 2862 #define U1_MApi_XC_DLC_GetLumaCurveStatus_SECTION 1 2863 #define U1_MApi_XC_DLC_CGC_ResetCGain_SECTION 1 2864 #define U1_MApi_XC_DLC_CGC_CheckCGainInPQCom_SECTION 1 2865 #define U1_MApi_XC_DLC_CGC_ResetYGain_SECTION 1 2866 #define U1_MApi_XC_DLC_CGC_CheckYGainInPQCom_SECTION 1 2867 #define U1_MApi_XC_DLC_CGC_Reset_SECTION 1 2868 #define U1_MApi_XC_DLC_CGC_Init_SECTION 1 2869 #define U1_MApi_XC_DLC_CGC_ReInit_SECTION 1 2870 #define U1_MApi_XC_DLC_CGC_Handler_SECTION 1 2871 #define U1_MApi_XC_DLC_GetLibVer_SECTION 1 2872 #define U1_MApi_XC_DLC_GetInfo_SECTION 1 2873 #define U1_MApi_XC_DLC_GetStatus_Ex_SECTION 1 2874 #define U1_MApi_XC_DLC_SetDbgLevel_SECTION 1 2875 #define U1_MApi_XC_DLC_WriteCurve_SECTION 1 2876 #define U1_MApi_XC_DLC_WriteCurve_Sub_SECTION 1 2877 #define U1_MApi_XC_DLC_GetHistogram_SECTION 1 2878 #define U1_MApi_XC_DLC_DecodeExtCmd_SECTION 1 2879 #define U1_MApi_XC_DLC_SetCaptureRange_SECTION 1 2880 #define U1_MApi_XC_DLC_SetPowerState_SECTION 1 2881 #define U1_MApi_XC_DLC_SetSetting_SECTION 1 2882 #define U1_MApi_XC_DLC_Init_SECTION 1 2883 #define U1_MApi_XC_DLC_GetStatus_SECTION 1 2884 #define U1_MApi_XC_ModeParse_Init_SECTION 1 2885 #define U1_MApi_XC_ModeParse_MatchMode_SECTION 1 2886 #define U1_MApi_XC_ModeParse_MatchModeEx_SECTION 1 2887 #define U1_MApi_XC_ModeParse_EX_Init_SECTION 1 2888 #define U1_MApi_XC_ModeParse_EX_MatchMode_SECTION 1 2889 #define U1_MApi_XC_ModeParse_EX_MatchModeEx_SECTION 1 2890 #define U1_MApi_XC_PCMonitor_Init_SECTION 1 2891 #define U1_MApi_XC_PCMonitor_Restart_SECTION 1 2892 #define U1_MApi_XC_PCMonitor_SetTimingCount_SECTION 1 2893 #define U1_MApi_XC_PCMonitor_SECTION 1 2894 #define U1_MApi_XC_PCMonitor_GetCurrentState_SECTION 1 2895 #define U1_MApi_XC_PCMonitor_GetSyncStatus_SECTION 1 2896 #define U1_MApi_XC_PCMonitor_Get_HFreqx10_SECTION 1 2897 #define U1_MApi_XC_PCMonitor_Get_HFreqx1K_SECTION 1 2898 #define U1_MApi_XC_PCMonitor_Get_VFreqx10_SECTION 1 2899 #define U1_MApi_XC_PCMonitor_Get_VFreqx1K_SECTION 1 2900 #define U1_MApi_XC_PCMonitor_Get_Vtotal_SECTION 1 2901 #define U1_MApi_XC_PCMonitor_Get_Dvi_Hdmi_De_Info_SECTION 1 2902 #define U1_MApi_XC_PCMonitor_SyncLoss_SECTION 1 2903 #define U1_MApi_XC_PCMonitor_InvalidTimingDetect_SECTION 1 2904 #define U1_MApi_XC_PCMonitor_SetTimingCountEx_SECTION 1 2905 #define U1_MApi_XC_PCMonitor_EX_Init_SECTION 1 2906 #define U1_MApi_XC_PCMonitor_EX_Restart_SECTION 1 2907 #define U1_MApi_XC_PCMonitor_EX_SetTimingCount_SECTION 1 2908 #define U1_MApi_XC_PCMonitor_EX_SECTION 1 2909 #define U1_MApi_XC_PCMonitor_EX_GetCurrentState_SECTION 1 2910 #define U1_MApi_XC_PCMonitor_EX_GetSyncStatus_SECTION 1 2911 #define U1_MApi_XC_PCMonitor_EX_Get_HFreqx10_SECTION 1 2912 #define U1_MApi_XC_PCMonitor_EX_Get_HFreqx1K_SECTION 1 2913 #define U1_MApi_XC_PCMonitor_EX_Get_VFreqx10_SECTION 1 2914 #define U1_MApi_XC_PCMonitor_EX_Get_VFreqx1K_SECTION 1 2915 #define U1_MApi_XC_PCMonitor_EX_Get_Vtotal_SECTION 1 2916 #define U1_MApi_XC_PCMonitor_EX_Get_Dvi_Hdmi_De_Info_SECTION 1 2917 #define U1_MApi_XC_PCMonitor_EX_SyncLoss_SECTION 1 2918 #define U1_MApi_XC_PCMonitor_EX_InvalidTimingDetect_SECTION 1 2919 #define U1_MApi_XC_PCMonitor_EX_SetTimingCountEx_SECTION 1 2920 #define U1_MAsm_CPU_Sync_SECTION 1 2921 #define U1_MAsm_CPU_Nop_SECTION 1 2922 #define U1_MAsm_CPU_SwDbgBp_SECTION 1 2923 #define U1_MAsm_CPU_PowerDown_SECTION 1 2924 #define U1_MAsm_CPU_StatusBEV_SECTION 1 2925 #define U1_MAsm_CPU_Jump_SECTION 1 2926 #define U1_MAsm_CPU_GetTrailOne_SECTION 1 2927 #define U1_MAsm_CPU_EnableTimerInterrupt_SECTION 1 2928 #define U1_MAsm_CPU_DelayMs_SECTION 1 2929 #define U1_MAsm_CPU_DelayUs_SECTION 1 2930 #define U1_MAsm_CPU_SetEBASE_SECTION 1 2931 #define U1_MAsm_GetSystemTime_SECTION 1 2932 #define U1_MAsm_CPU_TimerInit_SECTION 1 2933 #define U1_MDrv_AESDMA_SetSecurityInfo_SECTION 1 2934 #define U1_MDrv_AESDMA_Init_SECTION 1 2935 #define U1_MDrv_AESDMA_QueryCipherMode_SECTION 1 2936 #define U1_MDrv_AESDMA_SelEng_SECTION 1 2937 #define U1_MDrv_AESDMA_SetKey_Ex_SECTION 1 2938 #define U1_MDrv_AESDMA_SetIV_Ex_SECTION 1 2939 #define U1_MDrv_AESDMA_SetKey_SECTION 1 2940 #define U1_MDrv_AESDMA_SetKeySel_SECTION 1 2941 #define U1_MDrv_AESDMA_SetOddIV_SECTION 1 2942 #define U1_MDrv_AESDMA_SetSecureKey_SECTION 1 2943 #define U1_MDrv_AESDMA_SetSecuredKeyIndex_SECTION 1 2944 #define U1_MDrv_AESDMA_SetIV_SECTION 1 2945 #define U1_MDrv_AESDMA_SetPS_SECTION 1 2946 #define U1_MDrv_AESDMA_PSRelease_SECTION 1 2947 #define U1_MDrv_AESDMA_SetFileInOut_SECTION 1 2948 #define U1_MDrv_AESDMA_Start_SECTION 1 2949 #define U1_MDrv_AESDMA_Reset_SECTION 1 2950 #define U1_MDrv_AESDMA_GetStatus_SECTION 1 2951 #define U1_MDrv_AESDMA_IsFinished_SECTION 1 2952 #define U1_MDrv_AESDMA_GetPSMatchedByteCNT_SECTION 1 2953 #define U1_MDrv_AESDMA_GetPSMatchedPTN_SECTION 1 2954 #define U1_MDrv_AESDMA_Notify_SECTION 1 2955 #define U1_MDrv_AESDMA_SetDbgLevel_SECTION 1 2956 #define U1_MDrv_AESDMA_GetLibVer_SECTION 1 2957 #define U1_MDrv_AESDMA_Rand_SECTION 1 2958 #define U1_MDrv_AESDMA_Set_Clk_SECTION 1 2959 #define U1_MDrv_SHA_Calculate_SECTION 1 2960 #define U1_MDrv_SHA_CalculateManual_SECTION 1 2961 #define U1_MDrv_MOBF_DmaOnly_SECTION 1 2962 #define U1_MDrv_MOBF_Encrypt_SECTION 1 2963 #define U1_MDrv_MOBF_Decrypt_SECTION 1 2964 #define U1_MDrv_MOBF_OneWay_SECTION 1 2965 #define U1_MDrv_AESDMA_Parser_MaskScrmb_SECTION 1 2966 #define U1_MDrv_AESDMA_Parser_SetScrmbPattern_SECTION 1 2967 #define U1_MDrv_AESDMA_Parser_SetAddedScrmbPattern_SECTION 1 2968 #define U1_MDrv_AESDMA_Parser_QueryPidCount_SECTION 1 2969 #define U1_MDrv_AESDMA_Parser_SetPid_SECTION 1 2970 #define U1_MDrv_AESDMA_Parser_BypassPid_SECTION 1 2971 #define U1_MDrv_AESDMA_Parser_Encrypt_SECTION 1 2972 #define U1_MDrv_AESDMA_Parser_Decrypt_SECTION 1 2973 #define U1_MDrv_AESDMA_Lock_SECTION 1 2974 #define U1_MDrv_AESDMA_Unlock_SECTION 1 2975 #define U1_MDrv_RSA_Calculate_SECTION 1 2976 #define U1_MDrv_RSA_Calculate_Hw_Key_SECTION 1 2977 #define U1_MDrv_RSA_IsFinished_SECTION 1 2978 #define U1_MDrv_RSA_Output_SECTION 1 2979 #define U1_MDrv_AESDMA_SetPowerState_SECTION 1 2980 #define U1_MDrv_AESDMA_Exit_SECTION 1 2981 #define U1_MDrv_AESDMA_IsSecretKeyInNormalBank_SECTION 1 2982 #define U1_MDrv_AESDMA_EnableTwoKeys_SECTION 1 2983 #define U1_MDrv_AESDMA_SetOddKey_SECTION 1 2984 #define U1_MDrv_AESDMA_ParserStart_SECTION 1 2985 #define U1__MDrv_AESDMA_NormalReset_SECTION 1 2986 #define U1_MDrv_AESDMA_NormalReset_SECTION 1 2987 #define U1__MDrv_AESDMA_SelEng_SECTION 1 2988 #define U1__MDrv_AESDMA_SetKey_SECTION 1 2989 #define U1__MDrv_AESDMA_SetIV_SECTION 1 2990 #define U1__MDrv_AESDMA_SetFileInOut_SECTION 1 2991 #define U1__MDrv_AESDMA_Start_SECTION 1 2992 #define U1__MDrv_AESDMA_IsFinished_SECTION 1 2993 #define U1__MDrv_RSA_Calculate_SECTION 1 2994 #define U1__MDrv_SHA_Calculate_SECTION 1 2995 #define U1__MDrv_RSA_IsFinished_SECTION 1 2996 #define U1__MDrv_RSA_Output_SECTION 1 2997 #define U1__MDrv_AESDMA_Init_SECTION 1 2998 #define U1__MDrv_AESDMA_Reset_SECTION 1 2999 #define U1__MDrv_AESDMA_GetStatus_SECTION 1 3000 #define U1__MDrv_AESDMA_Set_Clk_SECTION 1 3001 #define U1__MDrv_AESDMA_SetPS_SECTION 1 3002 #define U1__MDrv_AESDMA_PSRelease_SECTION 1 3003 #define U1__MDrv_AESDMA_GetPSMatchedByteCNT_SECTION 1 3004 #define U1__MDrv_AESDMA_GetPSMatchedPTN_SECTION 1 3005 #define U1__MDrv_AESDMA_Notify_SECTION 1 3006 #define U1__MDrv_AESDMA_Get_Rand_Num_SECTION 1 3007 #define U1__MDrv_AESDMA_Parser_MaskScrmb_SECTION 1 3008 #define U1__MDrv_AESDMA_Parser_SetScrmbPattern_SECTION 1 3009 #define U1__MDrv_AESDMA_Parser_BypassPid_SECTION 1 3010 #define U1__MDrv_AESDMA_Parser_SetPid_SECTION 1 3011 #define U1__MDrv_AESDMA_Rand_SECTION 1 3012 #define U1_MDrv_HDCP_ProcessCipher_SECTION 1 3013 #define U1__MDrv_AESDMA_Parser_Encrypt_SECTION 1 3014 #define U1__MDrv_AESDMA_Parser_QueryPidCount_SECTION 1 3015 #define U1__MDrv_AESDMA_Parser_Decrypt_SECTION 1 3016 #define U1__MDrv_AESDMA_Parser_SetAddedScrmbPattern_SECTION 1 3017 #define U1__MDrv_AESDMA_SetKeySel_SECTION 1 3018 #define U1__MDrv_AESDMA_SetOddIV_SECTION 1 3019 #define U1__MDrv_AESDMA_IsSecretKeyInNormalBank_SECTION 1 3020 #define U1__MDrv_AESDMA_EnableTwoKeys_SECTION 1 3021 #define U1__MDrv_AESDMA_SetSecureKey_SECTION 1 3022 #define U1_MDrv_HDCP_GetHdcpCipherState_SECTION 1 3023 #define U1_MDrv_HDMI_GetM0_SECTION 1 3024 #define U1_MDrv_AESDMA_SetDefaultCAVid_SECTION 1 3025 #define U1_MDrv_AESDMA_SetKeyIndex_SECTION 1 3026 #define U1_MDrv_AESDMA_SetAesCtr64_SECTION 1 3027 #define U1_MDrv_AESDMA_AllocKeySlot_SECTION 1 3028 #define U1_MDrv_AESDMA_FreeKeySlot_SECTION 1 3029 #define U1_MDrv_AESDMA_GetConfig_SECTION 1 3030 #define U1_MDrv_AUD_GetLibVer_SECTION 1 3031 #define U1_MDrv_AUDIO_ReadReg_SECTION 1 3032 #define U1_MDrv_AUDIO_WriteReg_SECTION 1 3033 #define U1_MDrv_AUDIO_WriteMaskReg_SECTION 1 3034 #define U1_MDrv_AUDIO_ReadByte_SECTION 1 3035 #define U1_MDrv_AUDIO_DecReadByte_SECTION 1 3036 #define U1_MDrv_AUDIO_SeReadByte_SECTION 1 3037 #define U1_MDrv_AUDIO_WriteByte_SECTION 1 3038 #define U1_MDrv_AUDIO_DecWriteByte_SECTION 1 3039 #define U1_MDrv_AUDIO_SeWriteByte_SECTION 1 3040 #define U1_MDrv_AUDIO_WriteMaskByte_SECTION 1 3041 #define U1_MDrv_AUDIO_DecWriteMaskByte_SECTION 1 3042 #define U1_MDrv_AUDIO_SeWriteMaskByte_SECTION 1 3043 #define U1_MDrv_AUDIO_ReadDecMailBox_SECTION 1 3044 #define U1_MDrv_AUDIO_WriteDecMailBox_SECTION 1 3045 #define U1_MDrv_AUDIO_ReadSeMailBox_SECTION 1 3046 #define U1_MDrv_AUDIO_WriteSeMailBox_SECTION 1 3047 #define U1_MDrv_AUDIO_InitMMIO_SECTION 1 3048 #define U1_MDrv_AUDIO_AttachInterrupt_SECTION 1 3049 #define U1_MDrv_AUDIO_Mutex_Init_SECTION 1 3050 #define U1_MDrv_AUDIO_SHM_Init_SECTION 1 3051 #define U1_MDrv_AUDIO_Init_SECTION 1 3052 #define U1_MDrv_AUDIO_Close_SECTION 1 3053 #define U1_MDrv_AUDIO_Open_SECTION 1 3054 #define U1_MDrv_AUDIO_WriteInitTable_SECTION 1 3055 #define U1_MDrv_AUDIO_WritePreInitTable_SECTION 1 3056 #define U1_MDrv_AUDIO_EnaEarphone_LowPower_Stage_SECTION 1 3057 #define U1_MDrv_AUDIO_EnaEarphone_HighDriving_Stage_SECTION 1 3058 #define U1_MDrv_AUDIO_SwResetMAD_SECTION 1 3059 #define U1_MDrv_AUDIO_SetDspBaseAddr_SECTION 1 3060 #define U1_MDrv_AUDIO_GetDspBinBaseAddr_SECTION 1 3061 #define U1_MDrv_AUDIO_GetDspMadBaseAddr_SECTION 1 3062 #define U1_MDrv_AUDIO_DspBootOnDDR_SECTION 1 3063 #define U1_MDrv_AUDIO_DecoderLoadCode_SECTION 1 3064 #define U1_MDrv_AUDIO_SeSystemLoadCode_SECTION 1 3065 #define U1_MDrv_AUDIO_DspReboot_SECTION 1 3066 #define U1_MDrv_AUDIO_RebootDecDSP_SECTION 1 3067 #define U1_MDrv_AUDIO_TriggerSifPLL_SECTION 1 3068 #define U1_MDrv_AUDIO_SetPlayFileFlag_SECTION 1 3069 #define U1_MDrv_AUDIO_GetPlayFileFlag_SECTION 1 3070 #define U1_MDrv_AUDIO_InitialVars_SECTION 1 3071 #define U1_MDrv_AUDIO_SET_INIT_FLAG_SECTION 1 3072 #define U1_MDrv_AUDIO_GET_INIT_FLAG_SECTION 1 3073 #define U1_MDrv_AUDIO_ResetDspCodeType_SECTION 1 3074 #define U1_MDrv_AUDIO_GetPathGroup_SECTION 1 3075 #define U1_MDrv_AUDIO_SetNormalPath_SECTION 1 3076 #define U1_MDrv_AUDIO_SetInputPath_SECTION 1 3077 #define U1_MDrv_AUDIO_SetOutputPath_SECTION 1 3078 #define U1_MDrv_AUDIO_SetInternalPath_SECTION 1 3079 #define U1_MDrv_AUDIO_BT_SetUploadRate_SECTION 1 3080 #define U1_MDrv_AUDIO_BT_SetBufferCounter_SECTION 1 3081 #define U1_MDrv_AUDIO_ReadDspCounter_SECTION 1 3082 #define U1_MDrv_AUDIO_SetPowerDownWait_SECTION 1 3083 #define U1_MDrv_AUDIO_IsDTV_SECTION 1 3084 #define U1_MDrv_AUDIO_SetFading_SECTION 1 3085 #define U1_MDrv_AUDIO_SPDIF_SetMute_SECTION 1 3086 #define U1_MDrv_AUDIO_SPDIF_SetMode_SECTION 1 3087 #define U1_MDrv_AUDIO_SPDIF_ByPassChannel_SECTION 1 3088 #define U1_MDrv_AUDIO_SPDIF_SetChannelStatus_SECTION 1 3089 #define U1_MDrv_AUDIO_SPDIF_Monitor_SamplingRate_SECTION 1 3090 #define U1_MDrv_AUDIO_HDMI_Tx_GetStatus_SECTION 1 3091 #define U1_MDrv_AUDIO_HDMI_DolbyMonitor_SECTION 1 3092 #define U1_MDrv_AUDIO_HDMI_AC3_PathCFG_SECTION 1 3093 #define U1_MDrv_AUDIO_HDMI_TX_SetMode_SECTION 1 3094 #define U1_MDrv_AUDIO_AdcInit_SECTION 1 3095 #define U1_MDrv_AUDIO_GetDecoderStatus_SECTION 1 3096 #define U1_MDrv_AUDIO_GetUniDecodeDoneTag_SECTION 1 3097 #define U1_MDrv_AUDIO_update_DspUsage_SECTION 1 3098 #define U1_MDrv_AUDIO_ALSA_Enable_SECTION 1 3099 #define U1_MDrv_AUDIO_DumpDspInfo_SECTION 1 3100 #define U1_MDrv_AUDIO_GetCaps_SECTION 1 3101 #define U1_MDrv_AVD_MCUFreeze_SECTION 1 3102 #define U1_MDrv_AVD_Exit_SECTION 1 3103 #define U1_MDrv_AVD_Init_SECTION 1 3104 #define U1_MDrv_AVD_McuReset_SECTION 1 3105 #define U1_MDrv_AVD_GetStatus_SECTION 1 3106 #define U1_MDrv_AVD_GetLibVer_SECTION 1 3107 #define U1_MDrv_AVD_SetDbgLevel_SECTION 1 3108 #define U1_MDrv_AVD_GetInfo_SECTION 1 3109 #define U1_MDrv_AVD_IsSyncLocked_SECTION 1 3110 #define U1_MDrv_AVD_Scan_HsyncCheck_SECTION 1 3111 #define U1_MDrv_AVD_IsSignalInterlaced_SECTION 1 3112 #define U1_MDrv_AVD_IsColorOn_SECTION 1 3113 #define U1_MDrv_AVD_GetVerticalFreq_SECTION 1 3114 #define U1_MDrv_AVD_GetVTotal_SECTION 1 3115 #define U1_MDrv_AVD_GetNoiseMag_SECTION 1 3116 #define U1_MDrv_AVD_SetInput_SECTION 1 3117 #define U1_MDrv_AVD_SetVideoStandard_SECTION 1 3118 #define U1_MDrv_AVD_StartAutoStandardDetection_SECTION 1 3119 #define U1_MDrv_AVD_ForceVideoStandard_SECTION 1 3120 #define U1_MDrv_AVD_GetStandardDetection_SECTION 1 3121 #define U1_MDrv_AVD_GetLastDetectedStandard_SECTION 1 3122 #define U1_MDrv_AVD_Set3dComb_SECTION 1 3123 #define U1_MDrv_AVD_3DCombSpeedup_SECTION 1 3124 #define U1_MDrv_AVD_SetFreerunPLL_SECTION 1 3125 #define U1_MDrv_AVD_SetFreerunFreq_SECTION 1 3126 #define U1_MDrv_AVD_SetRegFromDSP_SECTION 1 3127 #define U1_MDrv_AVD_SetFlag_SECTION 1 3128 #define U1_MDrv_AVD_GetFlag_SECTION 1 3129 #define U1_MDrv_AVD_Set_Htt_UserMD_SECTION 1 3130 #define U1_MDrv_AVD_SetChannelChange_SECTION 1 3131 #define U1_MDrv_AVD_SetHsyncDetectionForTuning_SECTION 1 3132 #define U1_MDrv_AVD_SetRegValue_SECTION 1 3133 #define U1_MDrv_AVD_GetRegValue_SECTION 1 3134 #define U1_MDrv_AVD_LoadDSP_SECTION 1 3135 #define U1_MDrv_AVD_SetPQFineTune_SECTION 1 3136 #define U1_MDrv_AVD_Set3dCombSpeed_SECTION 1 3137 #define U1_MDrv_AVD_GetCaptureWindow_SECTION 1 3138 #define U1_MDrv_AVD_MBX_ReadByteByVDMbox_SECTION 1 3139 #define U1_MDrv_AVD_GetHsyncEdge_SECTION 1 3140 #define U1_MDrv_AVD_SetStillImageParam_SECTION 1 3141 #define U1_MDrv_AVD_SetAFECD4Factory_SECTION 1 3142 #define U1_MDrv_AVD_Set2D3DPatchOnOff_SECTION 1 3143 #define U1_MDrv_AVD_BackPorchWindowPositon_SECTION 1 3144 #define U1_MDrv_AVD_SetFactoryPara_SECTION 1 3145 #define U1_MDrv_AVD_SetAutoFineGainToFixed_SECTION 1 3146 #define U1_MDrv_AVD_GetDSPFineGain_SECTION 1 3147 #define U1_MDrv_AVD_GetDSPVersion_SECTION 1 3148 #define U1_MDrv_AVD_ShiftClk_SECTION 1 3149 #define U1_MDrv_AVD_SetShiftClk_SECTION 1 3150 #define U1_MDrv_AVD_ShifClk_Monitor_SECTION 1 3151 #define U1_MDrv_AVD_SCART_Monitor_SECTION 1 3152 #define U1_MDrv_AVD_SetPowerState_SECTION 1 3153 #define U1_MDrv_AVD_GetMacroVisionDetect_SECTION 1 3154 #define U1_MDrv_AVD_GetCGMSDetect_SECTION 1 3155 #define U1_MDrv_AVD_SetBurstWinStart_SECTION 1 3156 #define U1_MDrv_AVD_AliveCheck_SECTION 1 3157 #define U1_MDrv_BDMA_GetLibVer_SECTION 1 3158 #define U1_MDrv_BDMA_GetStatus_SECTION 1 3159 #define U1_MDrv_BDMA_GetInfo_SECTION 1 3160 #define U1_MDrv_BDMA_GetMinSize_SECTION 1 3161 #define U1_MDrv_BDMA_SetDbgLevel_SECTION 1 3162 #define U1_MDrv_BDMA_Init_SECTION 1 3163 #define U1_MDrv_BDMA_Search_SECTION 1 3164 #define U1_MDrv_BDMA_CRC32_SECTION 1 3165 #define U1_MDrv_BDMA_PatternFill_SECTION 1 3166 #define U1_MDrv_BDMA_MemCopy_SECTION 1 3167 #define U1_MDrv_BDMA_FlashCopy2Dram_SECTION 1 3168 #define U1_MDrv_BDMA_CopyHnd_SECTION 1 3169 #define U1_MDrv_BDMA_SetPowerState_SECTION 1 3170 #define U1_MDrv_BDMA_WaitFlashDone_SECTION 1 3171 #define U1_MDrv_BDMA_SetSPIOffsetForMCU_SECTION 1 3172 #define U1_MDrv_BDMA_DumpCB_SECTION 1 3173 #define U1_MDrv_BDMA_Stop_All_SECTION 1 3174 #define U1_MDrv_BDMA_Stop_SECTION 1 3175 #define U1_MDrv_BDMA_Exit_SECTION 1 3176 #define U1_MDrv_CA_Init_SECTION 1 3177 #define U1_MDrv_CA_MaxDeviceIdSize_SECTION 1 3178 #define U1_MDrv_CA_MaxReservedSize_SECTION 1 3179 #define U1_MDrv_CA_OTP_EnableSecureBoot_SECTION 1 3180 #define U1_MDrv_CA_OTP_IsSecureBootEnabled_SECTION 1 3181 #define U1_MDrv_CA_OTP_SetBlockLock_SECTION 1 3182 #define U1_MDrv_CA_OTP_GetBlockLock_SECTION 1 3183 #define U1_MDrv_CA_OTP_SetRSAextID_SECTION 1 3184 #define U1_MDrv_CA_OTP_GetRSAextID_SECTION 1 3185 #define U1_MDrv_CA_OTP_SetTEERSAextID_SECTION 1 3186 #define U1_MDrv_CA_OTP_GetTEERSAextID_SECTION 1 3187 #define U1_MDrv_CA_OTP_SetHASH_REF_VER_SECTION 1 3188 #define U1_MDrv_CA_OTP_GetHASH_REF_VER_SECTION 1 3189 #define U1_MDrv_CA_OTP_SetHASH1_REF_VER_SECTION 1 3190 #define U1_MDrv_CA_OTP_GetHASH1_REF_VER_SECTION 1 3191 #define U1_MDrv_CA_OTP_SetHASH_TEE_REF_VER_SECTION 1 3192 #define U1_MDrv_CA_OTP_GetHASH_TEE_REF_VER_SECTION 1 3193 #define U1_MDrv_CA_OTP_SetDebugPortMode_SECTION 1 3194 #define U1_MDrv_CA_OTP_GetDebugPortMode_SECTION 1 3195 #define U1_MDrv_CA_OTP_SetDeviceId_SECTION 1 3196 #define U1_MDrv_CA_OTP_GetDeviceId_SECTION 1 3197 #define U1_MDrv_CA_OTP_WriteReserved_SECTION 1 3198 #define U1_MDrv_CA_OTP_ReadReserved_SECTION 1 3199 #define U1_MDrv_CA_OTP_EnableSecureCWMode_SECTION 1 3200 #define U1_MDrv_CA_OTP_IsSecureCWMode_SECTION 1 3201 #define U1_MDrv_CA_OTP_DumpKeyProperty_SECTION 1 3202 #define U1_MDrv_CA_OTP_SetSecretKey_SECTION 1 3203 #define U1_MDrv_CA_OTP_GetSecretKey_SECTION 1 3204 #define U1_MDrv_CA_OTP_SetRSAKey_SECTION 1 3205 #define U1_MDrv_CA_OTP_GetRSAKey_SECTION 1 3206 #define U1_MDrv_CA_OTP_SetDebugPortPassword_SECTION 1 3207 #define U1_MDrv_CA_OTP_GetDebugPortPassword_SECTION 1 3208 #define U1_MDrv_CA_OTP_IsBlank_SECTION 1 3209 #define U1_MDrv_CA_OTP_Read_SECTION 1 3210 #define U1_MDrv_CA_OTP_Write_SECTION 1 3211 #define U1_MDrv_CA_Locked_SECTION 1 3212 #define U1_MDrv_CA_OTP_Lock_SECTION 1 3213 #define U1_MDrv_CA_Random_SECTION 1 3214 #define U1_MDrv_CA_OTP_ReadCAVendor_SECTION 1 3215 #define U1_MDrv_CA_MBX_Init_SECTION 1 3216 #define U1_MDrv_CA_MBX_Write_SECTION 1 3217 #define U1_MDrv_CA_MBX_Read_SECTION 1 3218 #define U1_MDrv_CA_STR_Init_SECTION 1 3219 #define U1_MDrv_CA_STR_SetParamAddr_SECTION 1 3220 #define U1_MDrv_CA_STR_SetMAC_SECTION 1 3221 #define U1_MDrv_CA_BGC_Init_SECTION 1 3222 #define U1_MDrv_CA_BGC_SetSection_SECTION 1 3223 #define U1_MDrv_CA_BGC_ResetSection_SECTION 1 3224 #define U1_CAOpen_SECTION 1 3225 #define U1_CAClose_SECTION 1 3226 #define U1_CAIoctl_SECTION 1 3227 #define U1_MDrv_Ch34_Init_SECTION 1 3228 #define U1_MDrv_Ch34_TurnOnOff_SECTION 1 3229 #define U1_MDrv_Ch34_SetMode_SECTION 1 3230 #define U1_MDrv_Ch34_WriteCH34Table_SECTION 1 3231 #define U1_MDrv_CIPHER_Init_SECTION 1 3232 #define U1_MDrv_CIPHER_Reset_SECTION 1 3233 #define U1_MDrv_CIPHER_ResetKey_SECTION 1 3234 #define U1_MDrv_CIPHER_DMACalc_SECTION 1 3235 #define U1_MDrv_CIPHER_OTPHASHCalc_SECTION 1 3236 #define U1_MDrv_CIPHER_HASH_SECTION 1 3237 #define U1_MDrv_CIPHER_HASHManual_SECTION 1 3238 #define U1_MDrv_CIPHER_HMAC_SECTION 1 3239 #define U1_MDrv_CIPHER_IsDMADone_SECTION 1 3240 #define U1_MDrv_CIPHER_IsHASHDone_SECTION 1 3241 #define U1_MDrv_CIPHER_SetDbgLevel_SECTION 1 3242 #define U1_MDrv_CIPHER_GetLibVer_SECTION 1 3243 #define U1_MDrv_CIPHER_KeyCtrl_SECTION 1 3244 #define U1_MDrv_CIPHER_Alloc_SECTION 1 3245 #define U1_MDrv_CIPHER_Free_SECTION 1 3246 #define U1_MDrv_CIPHER_DMAConfigure_SECTION 1 3247 #define U1_MDrv_CIPHER_DMAStart_SECTION 1 3248 #define U1_CIPHEROpen_SECTION 1 3249 #define U1_CIPHERClose_SECTION 1 3250 #define U1_CIPHERIoctl_SECTION 1 3251 #define U1_Drv_CLKM_Init_SECTION 1 3252 #define U1_Drv_Clkm_Clk_Gate_Disable_SECTION 1 3253 #define U1_Drv_Clkm_Set_Clk_Source_SECTION 1 3254 #define U1_Drv_Clkm_Get_Handle_SECTION 1 3255 #define U1_Drv_Get_Sram_Sd_Info_SECTION 1 3256 #define U1_MApi_CMA_Pool_Init_SECTION 1 3257 #define U1_MApi_CMA_Pool_Release_SECTION 1 3258 #define U1_MApi_CMA_Pool_GetMem_SECTION 1 3259 #define U1_MApi_CMA_Pool_PutMem_SECTION 1 3260 #define U1_MDrv_CMDQ_Init_SECTION 1 3261 #define U1_MDrv_CMDQ_GetLibVer_SECTION 1 3262 #define U1_MDrv_CMDQ_Start_SECTION 1 3263 #define U1_MDrv_CMDQ_Get_Memory_Size_SECTION 1 3264 #define U1_MDrv_CMDQ_Set_Buffer_SECTION 1 3265 #define U1_MDrv_CMDQ_Reset_SECTION 1 3266 #define U1_MDrv_CMDQ_Exit_SECTION 1 3267 #define U1_MDrv_CMDQ_Stop_SECTION 1 3268 #define U1_MDrv_CMDQ_SetDbgLevel_SECTION 1 3269 #define U1_MDrv_CMDQ_Receive_SECTION 1 3270 #define U1_Insert_Redundant_Null_SECTION 1 3271 #define U1_MDrv_CMDQ_Transfer_SECTION 1 3272 #define U1_MDrv_CMDQ_Set_dummy_Address_SECTION 1 3273 #define U1_MDrv_CMDQ_Set_MIU_SELECT_SECTION 1 3274 #define U1_MDrv_CMDQ_Set_timer_ratio_SECTION 1 3275 #define U1_MDrv_CMDQ_Printf_Crash_Command_SECTION 1 3276 #define U1_MDrv_CMDQ_Gen_WaitTrigger_Bus_Command_SECTION 1 3277 #define U1_MDrv_CMDQ_GetWritePoint_SECTION 1 3278 #define U1_MDrv_CMDQ_SetPowerState_SECTION 1 3279 #define U1_MDrv_CMDQ_GetConfig_SECTION 1 3280 #define U1_MDrv_COPRO_Disable_SECTION 1 3281 #define U1_MDrv_COPRO_Enable_SECTION 1 3282 #define U1_MDrv_SetBEON_Host_SECTION 1 3283 #define U1_MDrv_COPRO_Init_Front_SECTION 1 3284 #define U1_MDrv_COPRO_Init_End_SECTION 1 3285 #define U1_MDrv_COPRO_GetInfo_SECTION 1 3286 #define U1_MDrv_COPRO_GetLibVer_SECTION 1 3287 #define U1_MDrv_COPRO_GetStatus_SECTION 1 3288 #define U1_MDrv_COPRO_SetDbgLevel_SECTION 1 3289 #define U1_MDrv_COPRO_GetBase_SECTION 1 3290 #define U1_MDrv_CPU_QueryClock_SECTION 1 3291 #define U1_MDrv_CPU_SetPowerState_SECTION 1 3292 #define U1_MDrv_CPU_GetDqmemInfo_SECTION 1 3293 #define U1_MDrv_FRCR2_Init_Front_SECTION 1 3294 #define U1_MDrv_FRCR2_Init_End_SECTION 1 3295 #define U1_MDrv_DDC2BI_GetLibVer_SECTION 1 3296 #define U1_MDrv_DDC2BI_GetInfo_SECTION 1 3297 #define U1_MDrv_DDC2BI_GetStatus_SECTION 1 3298 #define U1_MDrv_DDC2BI_SetDbgLevel_SECTION 1 3299 #define U1_MDrv_DDC2BI_Init_SECTION 1 3300 #define U1_MDrv_DDC2BI_Exit_SECTION 1 3301 #define U1_MDrv_DDC2BI_Set_StandardCallBack_SECTION 1 3302 #define U1_MDrv_DDC2BI_Set_CustomerCallBack_SECTION 1 3303 #define U1_MDrv_DIP_GetChipCaps_SECTION 1 3304 #define U1_MDrv_DIP_Init_SECTION 1 3305 #define U1_MDrv_DIP_SetFrameInfo_SECTION 1 3306 #define U1_MDrv_DIP_InputMode_SECTION 1 3307 #define U1_MDrv_DIP_SetNRBuf_SECTION 1 3308 #define U1_MDrv_DIP_SetDIBuf_SECTION 1 3309 #define U1_MDrv_DIP_GetDIInfo_SECTION 1 3310 #define U1_MDrv_DIP_GetNRInfo_SECTION 1 3311 #define U1_MDrv_DIP_EnableNRDI_SECTION 1 3312 #define U1_MDrv_DIP_GetDIBufCount_SECTION 1 3313 #define U1_MDrv_DIP_ClearDIBufStatus_SECTION 1 3314 #define U1_MDrv_DIP_GetDIFrameCount_SECTION 1 3315 #define U1_MDrv_DIP_GetDIBufStatus_SECTION 1 3316 #define U1_MDrv_DIP_GetDIShow_SECTION 1 3317 #define U1_MDrv_DIP_SetMMIOMapBase_SECTION 1 3318 #define U1_MDrv_DIP_SetWebCamBuff_SECTION 1 3319 #define U1_MDrv_DIP_Trigger_SECTION 1 3320 #define U1_MDrv_DIP_SetYUVOrder_SECTION 1 3321 #define U1_MDrv_DIP_OneShot_SECTION 1 3322 #define U1_MDrv_DIP_RegisterXCSetDIPInfo_SECTION 1 3323 #define U1_MDrv_DMD_ATSC_SetDbgLevel_SECTION 1 3324 #define U1_MDrv_DMD_ATSC_GetInfo_SECTION 1 3325 #define U1_MDrv_DMD_ATSC_GetLibVer_SECTION 1 3326 #define U1_MDrv_DMD_ATSC_Initial_Hal_Interface_SECTION 1 3327 #define U1_MDrv_DMD_ATSC_Init_SECTION 1 3328 #define U1_MDrv_DMD_ATSC_Exit_SECTION 1 3329 #define U1_MDrv_DMD_ATSC_GetConfig_SECTION 1 3330 #define U1_MDrv_DMD_ATSC_SetConfig_SECTION 1 3331 #define U1_MDrv_DMD_ATSC_SetReset_SECTION 1 3332 #define U1_MDrv_DMD_ATSC_Set_QAM_SR_SECTION 1 3333 #define U1_MDrv_DMD_ATSC_SetActive_SECTION 1 3334 #define U1_MDrv_DMD_ATSC_SetPowerState_SECTION 1 3335 #define U1_MDrv_DMD_ATSC_GetLock_SECTION 1 3336 #define U1_MDrv_DMD_ATSC_GetModulationMode_SECTION 1 3337 #define U1_MDrv_DMD_ATSC_GetSignalStrength_SECTION 1 3338 #define U1_MDrv_DMD_ATSC_GetSignalQuality_SECTION 1 3339 #define U1_MDrv_DMD_ATSC_GetSNRPercentage_SECTION 1 3340 #define U1_MDrv_DMD_ATSC_GET_QAM_SNR_SECTION 1 3341 #define U1_MDrv_DMD_ATSC_Read_uCPKT_ERR_SECTION 1 3342 #define U1_MDrv_DMD_ATSC_GetPreViterbiBer_SECTION 1 3343 #define U1_MDrv_DMD_ATSC_GetPostViterbiBer_SECTION 1 3344 #define U1_MDrv_DMD_ATSC_ReadFrequencyOffset_SECTION 1 3345 #define U1_MDrv_DMD_ATSC_SetSerialControl_SECTION 1 3346 #define U1_MDrv_DMD_ATSC_IIC_BYPASS_MODE_SECTION 1 3347 #define U1_MDrv_DMD_ATSC_SWITCH_SSPI_GPIO_SECTION 1 3348 #define U1_MDrv_DMD_ATSC_GPIO_GET_LEVEL_SECTION 1 3349 #define U1_MDrv_DMD_ATSC_GPIO_SET_LEVEL_SECTION 1 3350 #define U1_MDrv_DMD_ATSC_GPIO_OUT_ENABLE_SECTION 1 3351 #define U1_MDrv_DMD_ATSC_DoIQSwap_SECTION 1 3352 #define U1_MDrv_DMD_ATSC_GetReg_SECTION 1 3353 #define U1_MDrv_DMD_ATSC_SetReg_SECTION 1 3354 #define U1_MDrv_DMD_ATSC_SEL_DMD_SECTION 1 3355 #define U1_MDrv_DMD_ATSC_LoadFW_SECTION 1 3356 #define U1_MDrv_DMD_ATSC_SetVsbMode_SECTION 1 3357 #define U1_MDrv_DMD_ATSC_Set256QamMode_SECTION 1 3358 #define U1_MDrv_DMD_ATSC_Set64QamMode_SECTION 1 3359 #define U1_MDrv_DMD_ATSC_MD_Init_SECTION 1 3360 #define U1_MDrv_DMD_ATSC_MD_Exit_SECTION 1 3361 #define U1_MDrv_DMD_ATSC_MD_GetConfig_SECTION 1 3362 #define U1_MDrv_DMD_ATSC_MD_SetConfig_SECTION 1 3363 #define U1_MDrv_DMD_ATSC_MD_SetReset_SECTION 1 3364 #define U1_MDrv_DMD_ATSC_MD_Set_QAM_SR_SECTION 1 3365 #define U1_MDrv_DMD_ATSC_MD_SetActive_SECTION 1 3366 #define U1_MDrv_DMD_ATSC_MD_SetPowerState_SECTION 1 3367 #define U1_MDrv_DMD_ATSC_MD_GetLock_SECTION 1 3368 #define U1_MDrv_DMD_ATSC_MD_GetModulationMode_SECTION 1 3369 #define U1_MDrv_DMD_ATSC_MD_GetSignalStrength_SECTION 1 3370 #define U1_MDrv_DMD_ATSC_MD_GetSignalQuality_SECTION 1 3371 #define U1_MDrv_DMD_ATSC_MD_GetSNRPercentage_SECTION 1 3372 #define U1_MDrv_DMD_ATSC_MD_GET_QAM_SNR_SECTION 1 3373 #define U1_MDrv_DMD_ATSC_MD_Read_uCPKT_ERR_SECTION 1 3374 #define U1_MDrv_DMD_ATSC_MD_GetPreViterbiBer_SECTION 1 3375 #define U1_MDrv_DMD_ATSC_MD_GetPostViterbiBer_SECTION 1 3376 #define U1_MDrv_DMD_ATSC_MD_ReadFrequencyOffset_SECTION 1 3377 #define U1_MDrv_DMD_ATSC_MD_SetSerialControl_SECTION 1 3378 #define U1_MDrv_DMD_ATSC_MD_IIC_BYPASS_MODE_SECTION 1 3379 #define U1_MDrv_DMD_ATSC_MD_SWITCH_SSPI_GPIO_SECTION 1 3380 #define U1_MDrv_DMD_ATSC_MD_GPIO_GET_LEVEL_SECTION 1 3381 #define U1_MDrv_DMD_ATSC_MD_GPIO_SET_LEVEL_SECTION 1 3382 #define U1_MDrv_DMD_ATSC_MD_GPIO_OUT_ENABLE_SECTION 1 3383 #define U1_MDrv_DMD_ATSC_MD_DoIQSwap_SECTION 1 3384 #define U1_MDrv_DMD_ATSC_MD_GetReg_SECTION 1 3385 #define U1_MDrv_DMD_ATSC_MD_SetReg_SECTION 1 3386 #define U1_ATSCRegisterToUtopia_SECTION 1 3387 #define U1_ATSCOpen_SECTION 1 3388 #define U1_ATSCClose_SECTION 1 3389 #define U1_ATSCIoctl_SECTION 1 3390 #define U1_MDrv_DMD_DTMB_SetDbgLevel_SECTION 1 3391 #define U1_MDrv_DMD_DTMB_GetInfo_SECTION 1 3392 #define U1_MDrv_DMD_DTMB_GetLibVer_SECTION 1 3393 #define U1_MDrv_DMD_DTMB_Initial_Hal_Interface_SECTION 1 3394 #define U1_MDrv_DMD_DTMB_Init_SECTION 1 3395 #define U1_MDrv_DMD_DTMB_Exit_SECTION 1 3396 #define U1_MDrv_DMD_DTMB_GetConfig_SECTION 1 3397 #define U1_MDrv_DMD_DTMB_SetConfig_SECTION 1 3398 #define U1_MDrv_DMD_DTMB_SetReset_SECTION 1 3399 #define U1_MDrv_DMD_DTMB_Set_QAM_SR_SECTION 1 3400 #define U1_MDrv_DMD_DTMB_SetActive_SECTION 1 3401 #define U1_MDrv_DMD_DTMB_SetPowerState_SECTION 1 3402 #define U1_MDrv_DMD_DTMB_GetLock_SECTION 1 3403 #define U1_MDrv_DMD_DTMB_GetModulationMode_SECTION 1 3404 #define U1_MDrv_DMD_DTMB_GetSignalStrength_SECTION 1 3405 #define U1_MDrv_DMD_DTMB_ReadFrequencyOffset_SECTION 1 3406 #define U1_MDrv_DMD_DTMB_GetSignalQuality_SECTION 1 3407 #define U1_MDrv_DMD_DTMB_GetPreLdpcBer_SECTION 1 3408 #define U1_MDrv_DMD_DTMB_GetPreViterbiBer_SECTION 1 3409 #define U1_MDrv_DMD_DTMB_GetPostViterbiBer_SECTION 1 3410 #define U1_MDrv_DMD_DTMB_GetSNR_SECTION 1 3411 #define U1_MDrv_DMD_DTMB_SetSerialControl_SECTION 1 3412 #define U1_MDrv_DMD_DTMB_IIC_BYPASS_MODE_SECTION 1 3413 #define U1_MDrv_DMD_DTMB_SWITCH_SSPI_GPIO_SECTION 1 3414 #define U1_MDrv_DMD_DTMB_GPIO_GET_LEVEL_SECTION 1 3415 #define U1_MDrv_DMD_DTMB_GPIO_SET_LEVEL_SECTION 1 3416 #define U1_MDrv_DMD_DTMB_GPIO_OUT_ENABLE_SECTION 1 3417 #define U1_MDrv_DMD_DTMB_DoIQSwap_SECTION 1 3418 #define U1_MDrv_DMD_DTMB_GetReg_SECTION 1 3419 #define U1_MDrv_DMD_DTMB_SetReg_SECTION 1 3420 #define U1_MDrv_DMD_DTMB_MD_Init_SECTION 1 3421 #define U1_MDrv_DMD_DTMB_MD_Exit_SECTION 1 3422 #define U1_MDrv_DMD_DTMB_MD_GetConfig_SECTION 1 3423 #define U1_MDrv_DMD_DTMB_MD_SetConfig_SECTION 1 3424 #define U1_MDrv_DMD_DTMB_MD_SetReset_SECTION 1 3425 #define U1_MDrv_DMD_DTMB_MD_Set_QAM_SR_SECTION 1 3426 #define U1_MDrv_DMD_DTMB_MD_SetActive_SECTION 1 3427 #define U1_MDrv_DMD_DTMB_MD_SetPowerState_SECTION 1 3428 #define U1_MDrv_DMD_DTMB_MD_GetLock_SECTION 1 3429 #define U1_MDrv_DMD_DTMB_MD_GetModulationMode_SECTION 1 3430 #define U1_MDrv_DMD_DTMB_MD_GetSignalStrength_SECTION 1 3431 #define U1_MDrv_DMD_DTMB_MD_ReadFrequencyOffset_SECTION 1 3432 #define U1_MDrv_DMD_DTMB_MD_GetSignalQuality_SECTION 1 3433 #define U1_MDrv_DMD_DTMB_MD_GetPreLdpcBer_SECTION 1 3434 #define U1_MDrv_DMD_DTMB_MD_GetPreViterbiBer_SECTION 1 3435 #define U1_MDrv_DMD_DTMB_MD_GetPostViterbiBer_SECTION 1 3436 #define U1_MDrv_DMD_DTMB_MD_GetSNR_SECTION 1 3437 #define U1_MDrv_DMD_DTMB_MD_SetSerialControl_SECTION 1 3438 #define U1_MDrv_DMD_DTMB_MD_IIC_BYPASS_MODE_SECTION 1 3439 #define U1_MDrv_DMD_DTMB_MD_SWITCH_SSPI_GPIO_SECTION 1 3440 #define U1_MDrv_DMD_DTMB_MD_GPIO_GET_LEVEL_SECTION 1 3441 #define U1_MDrv_DMD_DTMB_MD_GPIO_SET_LEVEL_SECTION 1 3442 #define U1_MDrv_DMD_DTMB_MD_GPIO_OUT_ENABLE_SECTION 1 3443 #define U1_MDrv_DMD_DTMB_MD_DoIQSwap_SECTION 1 3444 #define U1_MDrv_DMD_DTMB_MD_GetReg_SECTION 1 3445 #define U1_MDrv_DMD_DTMB_MD_SetReg_SECTION 1 3446 #define U1_DTMBRegisterToUtopia_SECTION 1 3447 #define U1_DTMBOpen_SECTION 1 3448 #define U1_DTMBClose_SECTION 1 3449 #define U1_DTMBIoctl_SECTION 1 3450 #define U1_MDrv_DMD_PreInit_SECTION 1 3451 #define U1_MDrv_DMD_RFAGC_Tristate_SECTION 1 3452 #define U1_MDrv_DMD_IFAGC_Tristate_SECTION 1 3453 #define U1_MDrv_DMD_TSO_Clk_Control_SECTION 1 3454 #define U1_MDrv_DMD_ReadReg_SECTION 1 3455 #define U1_MDrv_DMD_WriteReg_SECTION 1 3456 #define U1_MDrv_DMD_WriteRegs_SECTION 1 3457 #define U1_MDrv_DMD_I2C_Channel_Change_SECTION 1 3458 #define U1_MDrv_DMD_I2C_Channel_Set_SECTION 1 3459 #define U1_MDrv_DMD_SSPI_Init_SECTION 1 3460 #define U1_MDrv_DMD_SSPI_MIU_Writes_SECTION 1 3461 #define U1_MDrv_DMD_SSPI_MIU_Reads_SECTION 1 3462 #define U1_MDrv_DMD_SSPI_RIU_Write8_SECTION 1 3463 #define U1_MDrv_DMD_SSPI_RIU_Read8_SECTION 1 3464 #define U1_MDrv_DMD_DVBC_Init_SECTION 1 3465 #define U1_MDrv_DMD_DVBC_Exit_SECTION 1 3466 #define U1_MDrv_DMD_DVBC_GetConfig_SECTION 1 3467 #define U1_MDrv_DMD_DVBC_SetDbgLevel_SECTION 1 3468 #define U1_MDrv_DMD_DVBC_GetInfo_SECTION 1 3469 #define U1_MDrv_DMD_DVBC_GetDSPReg_SECTION 1 3470 #define U1_MDrv_DMD_DVBC_SetDSPReg_SECTION 1 3471 #define U1_MDrv_DMD_DVBC_GetLibVer_SECTION 1 3472 #define U1_MDrv_DMD_DVBC_GetReg_SECTION 1 3473 #define U1_MDrv_DMD_DVBC_GetFWVer_SECTION 1 3474 #define U1_MDrv_DMD_DVBC_SetReg_SECTION 1 3475 #define U1_MDrv_DMD_DVBC_SetSerialControl_SECTION 1 3476 #define U1_MDrv_DMD_DVBC_SetConfig_SECTION 1 3477 #define U1_MDrv_DMD_DVBC_SetConfig_symbol_rate_list_SECTION 1 3478 #define U1_MDrv_DMD_DVBC_SetActive_SECTION 1 3479 #define U1_MDrv_DMD_DVBC_GetLock_SECTION 1 3480 #define U1_MDrv_DMD_DVBC_GetLockWithRFPower_SECTION 1 3481 #define U1_MDrv_DMD_DVBC_GetSignalStrength_SECTION 1 3482 #define U1_MDrv_DMD_DVBC_GetSignalStrengthWithRFPower_SECTION 1 3483 #define U1_MDrv_DMD_DVBC_GetSignalQuality_SECTION 1 3484 #define U1_MDrv_DMD_DVBC_GetSignalQualityWithRFPower_SECTION 1 3485 #define U1_MDrv_DMD_DVBC_GetSNR_SECTION 1 3486 #define U1_MDrv_DMD_DVBC_GetPostViterbiBer_SECTION 1 3487 #define U1_MDrv_DMD_DVBC_GetPacketErr_SECTION 1 3488 #define U1_MDrv_DMD_DVBC_GetCellID_SECTION 1 3489 #define U1_MDrv_DMD_DVBC_GetStatus_SECTION 1 3490 #define U1_MDrv_DMD_DVBC_ActiveDmdSwitch_SECTION 1 3491 #define U1_MDrv_DMD_DVBC_Dual_Individual_Init_SECTION 1 3492 #define U1_MDrv_DMD_DVBC_Dual_Public_Init_SECTION 1 3493 #define U1_MDrv_DMD_DVBC_SetPowerState_SECTION 1 3494 #define U1_DVBCRegisterToUtopia_SECTION 1 3495 #define U1_DVBCOpen_SECTION 1 3496 #define U1_DVBCClose_SECTION 1 3497 #define U1_DVBCIoctl_SECTION 1 3498 #define U1_MDrv_DMD_DVBS_Init_SECTION 1 3499 #define U1_MDrv_DMD_DVBS_Exit_SECTION 1 3500 #define U1_MDrv_DMD_DVBS_SetDbgLevel_SECTION 1 3501 #define U1_MDrv_DMD_DVBS_GetInfo_SECTION 1 3502 #define U1_MDrv_DMD_DVBS_GetDSPReg_SECTION 1 3503 #define U1_MDrv_DMD_DVBS_SetDSPReg_SECTION 1 3504 #define U1_MDrv_DMD_DVBS_GetLibVer_SECTION 1 3505 #define U1_MDrv_DMD_DVBS_GetReg_SECTION 1 3506 #define U1_MDrv_DMD_DVBS_GetFWVer_SECTION 1 3507 #define U1_MDrv_DMD_DVBS_SetReg_SECTION 1 3508 #define U1_MDrv_DMD_DVBS_SetSerialControl_SECTION 1 3509 #define U1_MDrv_DMD_DVBS_SetConfig_SECTION 1 3510 #define U1_MDrv_DMD_DVBS_SetConfig_symbol_rate_list_SECTION 1 3511 #define U1_MDrv_DMD_DVBS_SetActive_SECTION 1 3512 #define U1_MDrv_DMD_DVBS_GetLock_SECTION 1 3513 #define U1_MDrv_DMD_DVBS_GetLockWithRFPower_SECTION 1 3514 #define U1_MDrv_DMD_DVBS_GetTunrSignalLevel_PWR_SECTION 1 3515 #define U1_MDrv_DMD_DVBS_GetSignalStrength_SECTION 1 3516 #define U1_MDrv_DMD_DVBS_GetSignalStrengthWithRFPower_SECTION 1 3517 #define U1_MDrv_DMD_DVBS_GetSignalQuality_SECTION 1 3518 #define U1_MDrv_DMD_DVBS_GetSignalQualityWithRFPower_SECTION 1 3519 #define U1_MDrv_DMD_DVBS_GetSNR_SECTION 1 3520 #define U1_MDrv_DMD_DVBS_GetPostViterbiBer_SECTION 1 3521 #define U1_MDrv_DMD_DVBS_GetPacketErr_SECTION 1 3522 #define U1_MDrv_DMD_DVBS_GetCellID_SECTION 1 3523 #define U1_MDrv_DMD_DVBS_GetParam_SECTION 1 3524 #define U1_MDrv_DMD_DVBS_GetAGCInfo_SECTION 1 3525 #define U1_MDrv_DMD_DVBS_GetStatus_SECTION 1 3526 #define U1_MDrv_DMD_DVBS_ActiveDmdSwitch_SECTION 1 3527 #define U1_MDrv_DMD_DVBS_SetPowerState_SECTION 1 3528 #define U1_MDrv_DMD_DVBS_Demod_Restart_SECTION 1 3529 #define U1_MDrv_DMD_DVBS_Get_FreqOffset_SECTION 1 3530 #define U1_MDrv_DMD_DVBS_BlindScan_Start_SECTION 1 3531 #define U1_MDrv_DMD_DVBS_BlindScan_NextFreq_SECTION 1 3532 #define U1_MDrv_DMD_DVBS_BlindScan_Cancel_SECTION 1 3533 #define U1_MDrv_DMD_DVBS_BlindScan_End_SECTION 1 3534 #define U1_MDrv_DMD_DVBS_BlindScan_GetChannel_SECTION 1 3535 #define U1_MDrv_DMD_DVBS_BlindScan_GetCurrentFreq_SECTION 1 3536 #define U1_MDrv_DMD_DVBS_BlindScan_WaitCurFreqFinished_SECTION 1 3537 #define U1_MDrv_DMD_DVBS_BlindScan_GetTunerFreq_EX_SECTION 1 3538 #define U1_MDrv_DMD_DVBS_DiSEqC_Init_SECTION 1 3539 #define U1_MDrv_DMD_DVBS_DiSEqC_SetLNBOut_SECTION 1 3540 #define U1_MDrv_DMD_DVBS_DiSEqC_GetLNBOut_SECTION 1 3541 #define U1_MDrv_DMD_DVBS_DiSEqC_Set22kOnOff_SECTION 1 3542 #define U1_MDrv_DMD_DVBS_DiSEqC_Get22kOnOff_SECTION 1 3543 #define U1_MDrv_DMD_DVBS_DiSEqC_SendCmd_SECTION 1 3544 #define U1_MDrv_DMD_DVBS_DiSEqC_ReceiveCmd_SECTION 1 3545 #define U1_MDrv_DMD_DVBS_DiSEqC_SetTxToneMode_SECTION 1 3546 #define U1_MDrv_DMD_DVBS_DiSEqC_SetTone_SECTION 1 3547 #define U1_MDrv_DMD_DVBS_UnicableAGCCheckPower_SECTION 1 3548 #define U1_MDrv_DMD_DVBS_Reg_INT_CB_SECTION 1 3549 #define U1_MDrv_DMD_DVBS2_TS_DivNum_Calculation_SECTION 1 3550 #define U1_DVBSRegisterToUtopia_SECTION 1 3551 #define U1_DVBSOpen_SECTION 1 3552 #define U1_DVBSClose_SECTION 1 3553 #define U1_DVBSIoctl_SECTION 1 3554 #define U1_MDrv_DMD_DVBT_Init_SECTION 1 3555 #define U1_MDrv_DMD_DVBT_Exit_SECTION 1 3556 #define U1_MDrv_DMD_DVBT_GetConfig_SECTION 1 3557 #define U1_MDrv_DMD_DVBT_SetDbgLevel_SECTION 1 3558 #define U1_MDrv_DMD_DVBT_GetInfo_SECTION 1 3559 #define U1_MDrv_DMD_DVBT_GetLibVer_SECTION 1 3560 #define U1_MDrv_DMD_DVBT_GetReg_SECTION 1 3561 #define U1_MDrv_DMD_DVBTGetFWVer_SECTION 1 3562 #define U1_MDrv_DMD_DVBT_SetReg_SECTION 1 3563 #define U1_MDrv_DMD_DVBT_SetSerialControl_SECTION 1 3564 #define U1_MDrv_DMD_DVBT_SetConfig_SECTION 1 3565 #define U1_MDrv_DMD_DVBT_SetConfigHPLP_SECTION 1 3566 #define U1_MDrv_DMD_DVBT_SetConfigHPLPSetIF_SECTION 1 3567 #define U1_MDrv_DMD_DVBT_SetActive_SECTION 1 3568 #define U1_MDrv_DMD_DVBT_GetLock_SECTION 1 3569 #define U1_MDrv_DMD_DVBT_GetSignalStrength_SECTION 1 3570 #define U1_MDrv_DMD_DVBT_GetSignalStrengthWithRFPower_SECTION 1 3571 #define U1_MDrv_DMD_DVBT_GetSignalQuality_SECTION 1 3572 #define U1_MDrv_DMD_DVBT_GetSignalQualityWithRFPower_SECTION 1 3573 #define U1_MDrv_DMD_DVBT_GetSNR_SECTION 1 3574 #define U1_MDrv_DMD_DVBT_GetPostViterbiBer_SECTION 1 3575 #define U1_MDrv_DMD_DVBT_GetPreViterbiBer_SECTION 1 3576 #define U1_MDrv_DMD_DVBT_GetPacketErr_SECTION 1 3577 #define U1_MDrv_DMD_DVBT_GetTPSInfo_SECTION 1 3578 #define U1_MDrv_DMD_DVBT_GetCellID_SECTION 1 3579 #define U1_MDrv_DMD_DVBT_GetFreqOffset_SECTION 1 3580 #define U1_MDrv_DMD_DVBT_NORDIG_SSI_Table_Write_SECTION 1 3581 #define U1_MDrv_DMD_DVBT_NORDIG_SSI_Table_Read_SECTION 1 3582 #define U1_MDrv_DMD_DVBT_SetPowerState_SECTION 1 3583 #define U1_MDrv_DMD_DVBT2_Init_SECTION 1 3584 #define U1_MDrv_DMD_DVBT2_Exit_SECTION 1 3585 #define U1_MDrv_DMD_DVBT2_SetDbgLevel_SECTION 1 3586 #define U1_MDrv_DMD_DVBT2_GetInfo_SECTION 1 3587 #define U1_MDrv_DMD_DVBT2_GetLibVer_SECTION 1 3588 #define U1_MDrv_DMD_DVBT2_GetReg_SECTION 1 3589 #define U1_MDrv_DMD_DVBT2_SetReg_SECTION 1 3590 #define U1_MDrv_DMD_DVBT2_GetFWVer_SECTION 1 3591 #define U1_MDrv_DMD_DVBT2_SetSerialControl_SECTION 1 3592 #define U1_MDrv_DMD_DVBT2_SetReset_SECTION 1 3593 #define U1_MDrv_DMD_DVBT2_SetConfig_SECTION 1 3594 #define U1_MDrv_DMD_DVBT2_SetActive_SECTION 1 3595 #define U1_MDrv_DMD_DVBT2_GetLock_SECTION 1 3596 #define U1_MDrv_DMD_DVBT2_GetSignalStrength_SECTION 1 3597 #define U1_MDrv_DMD_DVBT2_GetSignalStrengthWithRFPower_SECTION 1 3598 #define U1_MDrv_DMD_DVBT2_GetSignalQuality_SECTION 1 3599 #define U1_MDrv_DMD_DVBT2_GetSignalQualityWithRFPower_SECTION 1 3600 #define U1_MDrv_DMD_DVBT2_GetSNR_SECTION 1 3601 #define U1_MDrv_DMD_DVBT2_GetPostLdpcBer_SECTION 1 3602 #define U1_MDrv_DMD_DVBT2_GetPreLdpcBer_SECTION 1 3603 #define U1_MDrv_DMD_DVBT2_GetPacketErr_SECTION 1 3604 #define U1_MDrv_DMD_DVBT2_GetL1Info_SECTION 1 3605 #define U1_MDrv_DMD_DVBT2_GetFreqOffset_SECTION 1 3606 #define U1_MDrv_DMD_DVBT2_NORDIG_SSI_Table_Write_SECTION 1 3607 #define U1_MDrv_DMD_DVBT2_NORDIG_SSI_Table_Read_SECTION 1 3608 #define U1_MDrv_DMD_DVBT2_SetPowerState_SECTION 1 3609 #define U1_MDrv_DMD_DVBT2_GetPlpBitMap_SECTION 1 3610 #define U1_MDrv_DMD_DVBT2_GetPlpGroupID_SECTION 1 3611 #define U1_MDrv_DMD_DVBT2_SetPlpID_SECTION 1 3612 #define U1_DVBT2Open_SECTION 1 3613 #define U1_DVBT2Close_SECTION 1 3614 #define U1_DVBT2Ioctl_SECTION 1 3615 #define U1_DVBTOpen_SECTION 1 3616 #define U1_DVBTClose_SECTION 1 3617 #define U1_DVBTIoctl_SECTION 1 3618 #define U1_MDrv_DMD_ISDBT_SetDbgLevel_SECTION 1 3619 #define U1_MDrv_DMD_ISDBT_GetInfo_SECTION 1 3620 #define U1_MDrv_DMD_ISDBT_GetLibVer_SECTION 1 3621 #define U1_MDrv_DMD_ISDBT_Initial_Hal_Interface_SECTION 1 3622 #define U1_MDrv_DMD_ISDBT_Init_SECTION 1 3623 #define U1_MDrv_DMD_ISDBT_Exit_SECTION 1 3624 #define U1_MDrv_DMD_ISDBT_GetConfig_SECTION 1 3625 #define U1_MDrv_DMD_ISDBT_GetFwVer_SECTION 1 3626 #define U1_MDrv_DMD_ISDBT_SetReset_SECTION 1 3627 #define U1_MDrv_DMD_ISDBT_AdvSetConfig_SECTION 1 3628 #define U1_MDrv_DMD_ISDBT_SetConfig_SECTION 1 3629 #define U1_MDrv_DMD_ISDBT_SetActive_SECTION 1 3630 #define U1_MDrv_DMD_ISDBT_SetPowerState_SECTION 1 3631 #define U1_MDrv_DMD_ISDBT_GetLock_SECTION 1 3632 #define U1_MDrv_DMD_ISDBT_GetModulationMode_SECTION 1 3633 #define U1_MDrv_DMD_ISDBT_GetSignalStrength_SECTION 1 3634 #define U1_MDrv_DMD_ISDBT_GetFreqOffset_SECTION 1 3635 #define U1_MDrv_DMD_ISDBT_GetSignalQuality_SECTION 1 3636 #define U1_MDrv_DMD_ISDBT_GetSignalQualityOfLayerA_SECTION 1 3637 #define U1_MDrv_DMD_ISDBT_GetSignalQualityOfLayerB_SECTION 1 3638 #define U1_MDrv_DMD_ISDBT_GetSignalQualityOfLayerC_SECTION 1 3639 #define U1_MDrv_DMD_ISDBT_GetSignalQualityCombine_SECTION 1 3640 #define U1_MDrv_DMD_ISDBT_GetSNR_SECTION 1 3641 #define U1_MDrv_DMD_ISDBT_GetPreViterbiBer_SECTION 1 3642 #define U1_MDrv_DMD_ISDBT_GetPostViterbiBer_SECTION 1 3643 #define U1_MDrv_DMD_ISDBT_Read_PKT_ERR_SECTION 1 3644 #define U1_MDrv_DMD_ISDBT_SetSerialControl_SECTION 1 3645 #define U1_MDrv_DMD_ISDBT_IIC_BYPASS_MODE_SECTION 1 3646 #define U1_MDrv_DMD_ISDBT_SWITCH_SSPI_GPIO_SECTION 1 3647 #define U1_MDrv_DMD_ISDBT_GPIO_GET_LEVEL_SECTION 1 3648 #define U1_MDrv_DMD_ISDBT_GPIO_SET_LEVEL_SECTION 1 3649 #define U1_MDrv_DMD_ISDBT_GPIO_OUT_ENABLE_SECTION 1 3650 #define U1_MDrv_DMD_ISDBT_DoIQSwap_SECTION 1 3651 #define U1_MDrv_DMD_ISDBT_GetReg_SECTION 1 3652 #define U1_MDrv_DMD_ISDBT_SetReg_SECTION 1 3653 #define U1_MDrv_DMD_ISDBT_MD_Init_SECTION 1 3654 #define U1_MDrv_DMD_ISDBT_MD_Exit_SECTION 1 3655 #define U1_MDrv_DMD_ISDBT_MD_GetConfig_SECTION 1 3656 #define U1_MDrv_DMD_ISDBT_MD_GetFwVer_SECTION 1 3657 #define U1_MDrv_DMD_ISDBT_MD_SetReset_SECTION 1 3658 #define U1_MDrv_DMD_ISDBT_MD_AdvSetConfig_SECTION 1 3659 #define U1_MDrv_DMD_ISDBT_MD_SetConfig_SECTION 1 3660 #define U1_MDrv_DMD_ISDBT_MD_SetActive_SECTION 1 3661 #define U1_MDrv_DMD_ISDBT_MD_SetPowerState_SECTION 1 3662 #define U1_MDrv_DMD_ISDBT_MD_GetLock_SECTION 1 3663 #define U1_MDrv_DMD_ISDBT_MD_GetModulationMode_SECTION 1 3664 #define U1_MDrv_DMD_ISDBT_MD_GetSignalStrength_SECTION 1 3665 #define U1_MDrv_DMD_ISDBT_MD_GetFreqOffset_SECTION 1 3666 #define U1_MDrv_DMD_ISDBT_MD_GetSignalQuality_SECTION 1 3667 #define U1_MDrv_DMD_ISDBT_MD_GetSignalQualityOfLayerA_SECTION 1 3668 #define U1_MDrv_DMD_ISDBT_MD_GetSignalQualityOfLayerB_SECTION 1 3669 #define U1_MDrv_DMD_ISDBT_MD_GetSignalQualityOfLayerC_SECTION 1 3670 #define U1_MDrv_DMD_ISDBT_MD_GetSignalQualityCombine_SECTION 1 3671 #define U1_MDrv_DMD_ISDBT_MD_GetSNR_SECTION 1 3672 #define U1_MDrv_DMD_ISDBT_MD_GetPreViterbiBer_SECTION 1 3673 #define U1_MDrv_DMD_ISDBT_MD_GetPostViterbiBer_SECTION 1 3674 #define U1_MDrv_DMD_ISDBT_MD_Read_PKT_ERR_SECTION 1 3675 #define U1_MDrv_DMD_ISDBT_MD_SetSerialControl_SECTION 1 3676 #define U1_MDrv_DMD_ISDBT_MD_IIC_BYPASS_MODE_SECTION 1 3677 #define U1_MDrv_DMD_ISDBT_MD_SWITCH_SSPI_GPIO_SECTION 1 3678 #define U1_MDrv_DMD_ISDBT_MD_GPIO_GET_LEVEL_SECTION 1 3679 #define U1_MDrv_DMD_ISDBT_MD_GPIO_SET_LEVEL_SECTION 1 3680 #define U1_MDrv_DMD_ISDBT_MD_GPIO_OUT_ENABLE_SECTION 1 3681 #define U1_MDrv_DMD_ISDBT_MD_DoIQSwap_SECTION 1 3682 #define U1_MDrv_DMD_ISDBT_MD_GetReg_SECTION 1 3683 #define U1_MDrv_DMD_ISDBT_MD_SetReg_SECTION 1 3684 #define U1_ISDBTRegisterToUtopia_SECTION 1 3685 #define U1_ISDBTOpen_SECTION 1 3686 #define U1_ISDBTClose_SECTION 1 3687 #define U1_ISDBTIoctl_SECTION 1 3688 #define U1_MDrv_SYS_DMD_VD_MBX_Init_SECTION 1 3689 #define U1_MDrv_SYS_DMD_VD_MBX_SetType_SECTION 1 3690 #define U1_MDrv_SYS_DMD_VD_MBX_ReadReg_SECTION 1 3691 #define U1_MDrv_SYS_DMD_VD_MBX_ReadDSPReg_SECTION 1 3692 #define U1_MDrv_SYS_DMD_VD_MBX_DBG_ReadReg_SECTION 1 3693 #define U1_MDrv_SYS_DMD_VD_MBX_WriteReg_SECTION 1 3694 #define U1_MDrv_SYS_DMD_VD_MBX_WriteDSPReg_SECTION 1 3695 #define U1_MDrv_SYS_DMD_VD_MBX_DBG_WriteReg_SECTION 1 3696 #define U1_MDrv_DSCMB2_Init_SECTION 1 3697 #define U1_MDrv_DSCMB2_Exit_SECTION 1 3698 #define U1_MDrv_DSCMB2_SetDefaultCAVid_SECTION 1 3699 #define U1_MDrv_DSCMB2_FltAlloc_SECTION 1 3700 #define U1_MDrv_DSCMB2_FltAlloc_Ex_SECTION 1 3701 #define U1_MDrv_DSCMB2_FltFree_SECTION 1 3702 #define U1_MDrv_DSCMB2_FltSwitchType_SECTION 1 3703 #define U1_MDrv_DSCMB2_FltConnectFltId_SECTION 1 3704 #define U1_MDrv_DSCMB2_FltDisconnectFltId_SECTION 1 3705 #define U1_MDrv_DSCMB2_FltConnectPid_SECTION 1 3706 #define U1_MDrv_DSCMB2_FltDisconnectPid_SECTION 1 3707 #define U1_MDrv_DSCMB2_FltDisconnectPid_Ex_SECTION 1 3708 #define U1_MDrv_DSCMB2_EngSetAlgo_SECTION 1 3709 #define U1_MDrv_DSCMB2_EngSetKeyFSCB_SECTION 1 3710 #define U1_MDrv_DSCMB2_EngSetKey_SECTION 1 3711 #define U1_MDrv_DSCMB2_EngResetKey_SECTION 1 3712 #define U1_MDrv_DSCMB2_EngSetIV_SECTION 1 3713 #define U1_MDrv_DSCMB2_EngSetIV_Ex_SECTION 1 3714 #define U1_MDrv_DSCMB2_EngSetRIV_SECTION 1 3715 #define U1_MDrv_DSCMB2_EngSetSwitch_SECTION 1 3716 #define U1_MDrv_DSCMB2_EngSetFSCB_SECTION 1 3717 #define U1_MDrv_DSCMB2_EngEnableKey_SECTION 1 3718 #define U1_MDrv_DSCMB2_CAPVR_FlowSet_SECTION 1 3719 #define U1_MDrv_DSCMB2_DualPath_Enable_SECTION 1 3720 #define U1_MDrv_DSCMB2_DualPath_Disable_SECTION 1 3721 #define U1_MDrv_DSCMB2_FltDscmb_SECTION 1 3722 #define U1_MDrv_DSCMB2_FltTypeSet_SECTION 1 3723 #define U1_MDrv_DSCMB2_FltKeySet_SECTION 1 3724 #define U1_MDrv_DSCMB2_FltKeyReset_SECTION 1 3725 #define U1_MDrv_DSCMB2_FltIVSet_SECTION 1 3726 #define U1_MDrv_DSCMB2_OptConfig_SECTION 1 3727 #define U1_MDrv_DSCMB2_GetCap_SECTION 1 3728 #define U1_MDrv_DSCMB2_GetLibVer_SECTION 1 3729 #define U1_MDrv_DSCMB2_SetDBGLevel_SECTION 1 3730 #define U1_MDrv_DSCMB2_GetConnectStatus_SECTION 1 3731 #define U1_MDrv_DSCMB2_GetPidSlotMapIndex_SECTION 1 3732 #define U1_MDrv_DSCMB2_Multi2_SetRound_SECTION 1 3733 #define U1_MDrv_DSCMB2_Multi2_SetSystemKey_SECTION 1 3734 #define U1_MDrv_DSCMB2_HDCP2_SetRIV_SECTION 1 3735 #define U1_MDrv_DSCMB2_HDCP2_SetRIV_Ex_SECTION 1 3736 #define U1_MDrv_DSCMB2_PVR_RecCtrl_SECTION 1 3737 #define U1_MDrv_DSCMB2_SetPowerState_SECTION 1 3738 #define U1_MDrv_DSCMB2_PidFlt_ScmbStatus_SECTION 1 3739 #define U1_MDrv_DSCMB_GetStatus_SECTION 1 3740 #define U1_MDrv_DSCMB_GetInfo_SECTION 1 3741 #define U1_MDrv_DSCMB2_KLadder_ETSI_SECTION 1 3742 #define U1_MDrv_DSCMB2_KLadder_AtomicExec_SECTION 1 3743 #define U1_MDrv_DSCMB_Init_SECTION 1 3744 #define U1_MDrv_DSCMB_Exit_SECTION 1 3745 #define U1_MDrv_DSCMB_GetLibVer_SECTION 1 3746 #define U1_MDrv_DSCMB_SetDBGLevel_SECTION 1 3747 #define U1_MDrv_DSCMB_GetConnectStatus_SECTION 1 3748 #define U1_MDrv_DSCMB_KLadder_AtomicExec_SECTION 1 3749 #define U1_MDrv_DSCMB_KLadder_Reset_SECTION 1 3750 #define U1_MDrv_DSCMB_KLadder_SetInput_SECTION 1 3751 #define U1_MDrv_DSCMB_KLadder_SetKey_SECTION 1 3752 #define U1_MDrv_DSCMB_KLadder_SetDst_SECTION 1 3753 #define U1_MDrv_DSCMB_KLadder_SetConfig_SECTION 1 3754 #define U1_MDrv_DSCMB_KLadder_Start_SECTION 1 3755 #define U1_MDrv_DSCMB_KLadder_IsComplete_SECTION 1 3756 #define U1_MDrv_DSCMB_KLadder_Output_Start_SECTION 1 3757 #define U1_MDrv_DSCMB_KLadder_Output_IsComplete_SECTION 1 3758 #define U1_MDrv_DSCMB_KLadder_Output_Stop_SECTION 1 3759 #define U1_MDrv_DSCMB_KLadder_ResetAcpuAck_SECTION 1 3760 #define U1_MDrv_DSCMB_KLadder_ReadDataFromAcpu_SECTION 1 3761 #define U1_MDrv_DSCMB_KLadder_Stop_SECTION 1 3762 #define U1_MDrv_DSCMB_KLadder_Lock_SECTION 1 3763 #define U1_MDrv_DSCMB_KLadder_Unlock_SECTION 1 3764 #define U1_MDrv_DSCMB_2ndarySet_SECTION 1 3765 #define U1_MDrv_DSCMB_2ndaryReset_SECTION 1 3766 #define U1_MDrv_DSCMB_SlotSwitchWrite_SECTION 1 3767 #define U1_MDrv_DSCMB2_SetRecBuf_SECTION 1 3768 #define U1_MDrv_DSCMB2_RecCtrl_SECTION 1 3769 #define U1_MDrv_DSCMB2_GetRecWptr_SECTION 1 3770 #define U1_MApi_DSCMB_SetPowerState_SECTION 1 3771 #define U1_DSCMBOpen_SECTION 1 3772 #define U1_DSCMBClose_SECTION 1 3773 #define U1_DSCMBIoctl_SECTION 1 3774 #define U1_MDrv_EMMFLT_Init_SECTION 1 3775 #define U1_MDrv_EMMFLT_GetHwBufCnt_SECTION 1 3776 #define U1_MDrv_EMMFLT_SetDbgLevel_SECTION 1 3777 #define U1_MDrv_EMMFLT_SetNotify_SECTION 1 3778 #define U1_MDrv_EMMFLT_SetEmmPID_SECTION 1 3779 #define U1_MDrv_EMMFLT_SetTidMode_SECTION 1 3780 #define U1_MDrv_EMMFLT_EnableEmmTID_SECTION 1 3781 #define U1_MDrv_EMMFLT_SetFilterCfg_SECTION 1 3782 #define U1_MDrv_EMMFLT_Fire_SECTION 1 3783 #define U1_MDrv_EMMFLT_SetDstBufInfo_SECTION 1 3784 #define U1_MDrv_EMMFLT_EmmProcessingFinished_SECTION 1 3785 #define U1_MDrv_EMMFLT_Deinit_SECTION 1 3786 #define U1_MDrv_EMMFLT_SrcSelect_SECTION 1 3787 #define U1_MDrv_EMMFLT_StopEmm_SECTION 1 3788 #define U1_MDrv_EMMFLT_SetOutputType_SECTION 1 3789 #define U1_MDrv_EMMFLT_ConnectCheck_SECTION 1 3790 #define U1_MDrv_EMMFLT_SetExtendConfig_SECTION 1 3791 #define U1_MDrv_EMMFLT_InputMode_SECTION 1 3792 #define U1_EMMRASP_IntAttach_SECTION 1 3793 #define U1_MDrv_GPIO_SetIOMapBase_SECTION 1 3794 #define U1_MDrv_GPIO_GetLibVer_SECTION 1 3795 #define U1_MDrv_GPIO_SetDbgLevel_SECTION 1 3796 #define U1_MDrv_GPIO_GetInfo_SECTION 1 3797 #define U1_MDrv_GPIO_GetStatus_SECTION 1 3798 #define U1_mdrv_gpio_init_SECTION 1 3799 #define U1_mdrv_gpio_set_high_SECTION 1 3800 #define U1_mdrv_gpio_set_low_SECTION 1 3801 #define U1_mdrv_gpio_set_input_SECTION 1 3802 #define U1_mdrv_gpio_get_inout_SECTION 1 3803 #define U1_mdrv_gpio_get_level_SECTION 1 3804 #define U1_mdrv_gpio_attach_interrupt_SECTION 1 3805 #define U1_mdrv_gpio_detach_interrupt_SECTION 1 3806 #define U1_mdrv_gpio_interrupt_action_SECTION 1 3807 #define U1_mdrv_gpio_enable_interrupt_all_SECTION 1 3808 #define U1_mdrv_gpio_disable_interrupt_all_SECTION 1 3809 #define U1_mdrv_gpio_enable_interrupt_SECTION 1 3810 #define U1_mdrv_gpio_disable_interrupt_SECTION 1 3811 #define U1_MDrv_GPIO_SetPowerState_SECTION 1 3812 #define U1_MDrv_HDCP_HDCP14TxInitHdcp_SECTION 1 3813 #define U1_MDrv_HDCP_HDCP14TxLoadKey_SECTION 1 3814 #define U1_MDrv_HDCP_HDCP14TxSetAuthPass_SECTION 1 3815 #define U1_MDrv_HDCP_HDCP14TxEnableENC_EN_SECTION 1 3816 #define U1_MDrv_HDCP_HDCP14TxProcessAn_SECTION 1 3817 #define U1_MDrv_HDCP_HDCP14TxGetAKSV_SECTION 1 3818 #define U1_MDrv_HDCP_HDCP14TxCompareRi_SECTION 1 3819 #define U1_MDrv_HDCP_HDCP14TxConfigMode_SECTION 1 3820 #define U1_MDrv_HDCP_HDCP14TxGenerateCipher_SECTION 1 3821 #define U1_MDrv_HDCP_HDCP14TxProcessR0_SECTION 1 3822 #define U1_MDrv_HDCP_HDCP14TxGetM0_SECTION 1 3823 #define U1_MDrv_HDCP_HDCP14GetM0_SECTION 1 3824 #define U1_MDrv_HDCP_HDCP14FillKey_SECTION 1 3825 #define U1_MDrv_HDCP_HDCP2Init_SECTION 1 3826 #define U1_MDrv_HDCP_HDCP2TxModuleInit_SECTION 1 3827 #define U1_MDrv_HDCP_HDCP2TxEnableEncrypt_SECTION 1 3828 #define U1_MDrv_HDCP_HDCP2TxFillCipherKey_SECTION 1 3829 #define U1_MDrv_HDCP_HDCP2TxGetCipherState_SECTION 1 3830 #define U1_MDrv_HDCP_HDCP2TxSetAuthPass_SECTION 1 3831 #define U1_MDrv_HDCP_HDCP2RxProcessCipher_SECTION 1 3832 #define U1_MDrv_HDCP_HDCP2RxSetSKEPass_SECTION 1 3833 #define U1_MDrv_HDCP_HDCP2RxFillCipherKey_SECTION 1 3834 #define U1_MDrv_HDCP_HDCP2RxGetCipherState_SECTION 1 3835 #define U1_MDrv_HDCP_GetHDCP2Status_SECTION 1 3836 #define U1_MDrv_HDCP_SetHDCP2Status_SECTION 1 3837 #define U1_MDrv_HDCP_GetHDCP1Status_SECTION 1 3838 #define U1_MDrv_HDCP_SetHDCP1Status_SECTION 1 3839 #define U1_MDrv_HDCP_GetHDMIStatus_SECTION 1 3840 #define U1_MDrv_HDCP_SetHDMIStatus_SECTION 1 3841 #define U1_MDrv_HVD_PowerCtrl_SECTION 1 3842 #define U1_MDrv_HVD_SetOSRegBase_SECTION 1 3843 #define U1_MDrv_HVD_Init_SECTION 1 3844 #define U1_MDrv_HVD_Rst_SECTION 1 3845 #define U1_MDrv_HVD_Play_SECTION 1 3846 #define U1_MDrv_HVD_Exit_SECTION 1 3847 #define U1_MDrv_HVD_Pause_SECTION 1 3848 #define U1_MDrv_HVD_Flush_SECTION 1 3849 #define U1_MDrv_HVD_StepDisp_SECTION 1 3850 #define U1_MDrv_HVD_StepDecode_SECTION 1 3851 #define U1_MDrv_HVD_PushQueue_SECTION 1 3852 #define U1_MDrv_HVD_PushQueue_Fire_SECTION 1 3853 #define U1_MDrv_HVD_DecodeIFrame_SECTION 1 3854 #define U1_MDrv_HVD_SetDataEnd_SECTION 1 3855 #define U1_MDrv_HVD_SetDispErrFrm_SECTION 1 3856 #define U1_MDrv_HVD_SetDispRepeatField_SECTION 1 3857 #define U1_MDrv_HVD_SetSkipDecMode_SECTION 1 3858 #define U1_MDrv_HVD_SetDispSpeed_SECTION 1 3859 #define U1_MDrv_HVD_SetSyncActive_SECTION 1 3860 #define U1_MDrv_HVD_SetDropMode_SECTION 1 3861 #define U1_MDrv_HVD_RstPTS_SECTION 1 3862 #define U1_MDrv_HVD_SetFrcMode_SECTION 1 3863 #define U1_MDrv_HVD_SetSyncTolerance_SECTION 1 3864 #define U1_MDrv_HVD_SetSyncVideoDelay_SECTION 1 3865 #define U1_MDrv_HVD_SetSyncFreeRunTH_SECTION 1 3866 #define U1_MDrv_HVD_SetSyncRepeatTH_SECTION 1 3867 #define U1_MDrv_HVD_SetErrConceal_SECTION 1 3868 #define U1_MDrv_HVD_SetDbgLevel_SECTION 1 3869 #define U1_MDrv_HVD_SeekToPTS_SECTION 1 3870 #define U1_MDrv_HVD_SkipToPTS_SECTION 1 3871 #define U1_MDrv_HVD_SetFreezeImg_SECTION 1 3872 #define U1_MDrv_HVD_SetBlueScreen_SECTION 1 3873 #define U1_MDrv_HVD_SetDispOneField_SECTION 1 3874 #define U1_MDrv_HVD_SetISREvent_SECTION 1 3875 #define U1_MDrv_HVD_SetEnableISR_SECTION 1 3876 #define U1_MDrv_HVD_SetForceISR_SECTION 1 3877 #define U1_MDrv_HVD_SetMVOPDone_SECTION 1 3878 #define U1_MDrv_HVD_SetVirtualBox_SECTION 1 3879 #define U1_MDrv_HVD_SetDynScalingParam_SECTION 1 3880 #define U1_MDrv_HVD_SetAutoRmLstZeroByte_SECTION 1 3881 #define U1_MDrv_HVD_SetDispInfoTH_SECTION 1 3882 #define U1_MDrv_HVD_SetFastDisplay_SECTION 1 3883 #define U1_MDrv_HVD_SetIgnoreErrRef_SECTION 1 3884 #define U1_MDrv_HVD_ForceFollowDTVSpec_SECTION 1 3885 #define U1_MDrv_HVD_IsISROccured_SECTION 1 3886 #define U1_MDrv_HVD_IsDispFinish_SECTION 1 3887 #define U1_MDrv_HVD_IsFrameShowed_SECTION 1 3888 #define U1_MDrv_HVD_IsStepDecodeDone_SECTION 1 3889 #define U1_MDrv_HVD_CheckDispInfoRdy_SECTION 1 3890 #define U1_MDrv_HVD_IsDispInfoChg_SECTION 1 3891 #define U1_MDrv_HVD_IsIdle_SECTION 1 3892 #define U1_MDrv_HVD_IsSyncStart_SECTION 1 3893 #define U1_MDrv_HVD_IsSyncReach_SECTION 1 3894 #define U1_MDrv_HVD_IsLowDelay_SECTION 1 3895 #define U1_MDrv_HVD_IsIFrmFound_SECTION 1 3896 #define U1_MDrv_HVD_Is1stFrmRdy_SECTION 1 3897 #define U1_MDrv_HVD_IsAllBufferEmpty_SECTION 1 3898 #define U1_MDrv_HVD_IsAlive_SECTION 1 3899 #define U1_MDrv_HVD_GetBBUVacancy_SECTION 1 3900 #define U1_MDrv_HVD_GetDispInfo_SECTION 1 3901 #define U1_MDrv_HVD_GetPTS_SECTION 1 3902 #define U1_MDrv_HVD_GetNextPTS_SECTION 1 3903 #define U1_MDrv_HVD_GetNextDispQPtr_SECTION 1 3904 #define U1_MDrv_HVD_GetDataErrCnt_SECTION 1 3905 #define U1_MDrv_HVD_GetDecErrCnt_SECTION 1 3906 #define U1_MDrv_HVD_GetESWritePtr_SECTION 1 3907 #define U1_MDrv_HVD_GetESReadPtr_SECTION 1 3908 #define U1_MDrv_HVD_GetCaps_SECTION 1 3909 #define U1_MDrv_HVD_GetErrCode_SECTION 1 3910 #define U1_MDrv_HVD_GetPlayMode_SECTION 1 3911 #define U1_MDrv_HVD_GetPlayState_SECTION 1 3912 #define U1_MDrv_HVD_GetDecodeCnt_SECTION 1 3913 #define U1_MDrv_HVD_GetActiveFormat_SECTION 1 3914 #define U1_MDrv_HVD_GetInfo_SECTION 1 3915 #define U1_MDrv_HVD_GetLibVer_SECTION 1 3916 #define U1_MDrv_HVD_GetStatus_SECTION 1 3917 #define U1_MDrv_HVD_GetFrmInfo_SECTION 1 3918 #define U1_MDrv_HVD_GetISRInfo_SECTION 1 3919 #define U1_MDrv_HVD_CalLumaSum_SECTION 1 3920 #define U1_MDrv_HVD_GetUserData_Wptr_SECTION 1 3921 #define U1_MDrv_HVD_GetUserData_Packet_SECTION 1 3922 #define U1_MDrv_HVD_GenPattern_SECTION 1 3923 #define U1_MDrv_HVD_GetPatternInfo_SECTION 1 3924 #define U1_MDrv_HVD_GetDynamicScalingInfo_SECTION 1 3925 #define U1_MDrv_HVD_GetData_SECTION 1 3926 #define U1_MDrv_HVD_GetMem_Dbg_SECTION 1 3927 #define U1_MDrv_HVD_DbgDumpStatus_SECTION 1 3928 #define U1_MDrv_HVD_SetMem_Dbg_SECTION 1 3929 #define U1_MDrv_HVD_SetCmd_Dbg_SECTION 1 3930 #define U1_MDrv_HVD_SetSettings_Pro_SECTION 1 3931 #define U1_MDrv_HVD_SetBalanceBW_SECTION 1 3932 #define U1_MDrv_HVD_GetPtsStcDiff_SECTION 1 3933 #define U1_MDrv_HVD_GetDrvFwVer_SECTION 1 3934 #define U1_MDrv_HVD_GetFwVer_SECTION 1 3935 #define U1_MDrv_HVD_SetFdMaskDelayCnt_SECTION 1 3936 #define U1_MDrv_HVD_SetOutputFRCMode_SECTION 1 3937 #define U1_MDrv_HVD_DispFrame_SECTION 1 3938 #define U1_MDrv_HVD_FreeFrame_SECTION 1 3939 #define U1_MDrv_HVD_EnableDispQue_SECTION 1 3940 #define U1_MDrv_HVD_EnableVSizeAlign_SECTION 1 3941 #define U1_MDrv_HVD_Disp_Ignore_Crop_SECTION 1 3942 #define U1_MDrv_HVD_SetFRCDropType_SECTION 1 3943 #define U1_MDrv_HVD_GetUserDataInfo_SECTION 1 3944 #define U1_MDrv_HVD_GetUsrDataIsAvailable_SECTION 1 3945 #define U1_MDrv_HVD_SetDTVUserDataMode_SECTION 1 3946 #define U1_MDrv_HVD_ForceInterlaceMode_SECTION 1 3947 #define U1_MDrv_HVD_ShowDecodeOrder_SECTION 1 3948 #define U1_MDrv_HVD_GetFrmRateIsSupported_SECTION 1 3949 #define U1_MDrv_HVD_GetFrmPackingArrSEI_SECTION 1 3950 #define U1_MDrv_HVD_CC_Init_SECTION 1 3951 #define U1_MDrv_HVD_CC_SetCfg_SECTION 1 3952 #define U1_MDrv_HVD_CC_Set_RB_StartAddr_SECTION 1 3953 #define U1_MDrv_HVD_CC_SyncRB_RdAddr2WrAddr_SECTION 1 3954 #define U1_MDrv_HVD_CC_Adv_RB_ReadAddr_SECTION 1 3955 #define U1_MDrv_HVD_CC_DisableParsing_SECTION 1 3956 #define U1_MDrv_HVD_CC_GetInfo_SECTION 1 3957 #define U1_MDrv_HVD_CC_IsHvdRstDone_SECTION 1 3958 #define U1_MDrv_HVD_CC_GetOverflowStatus_SECTION 1 3959 #define U1_MDrv_HVD_CC_Get_RB_WriteAddr_SECTION 1 3960 #define U1_MDrv_HVD_CC_Get_RB_ReadAddr_SECTION 1 3961 #define U1_MDrv_HVD_CC_InfoEnhanceMode_SECTION 1 3962 #define U1_MDrv_HVD_SetHVDClockSpeed_SECTION 1 3963 #define U1_MDrv_HVD_SetVPUClockSpeed_SECTION 1 3964 #define U1_MDrv_HVD_PushDispQWithRefNum_SECTION 1 3965 #define U1_MDrv_HVD_ShowFirstFrameDirect_SECTION 1 3966 #define U1_MDrv_HVD_OnePendingBufferMode_SECTION 1 3967 #define U1_MDrv_HVD_FrameRateHandling_SECTION 1 3968 #define U1_MDrv_HVD_AutoExhaustESMode_SECTION 1 3969 #define U1_MDrv_HVD_SetMinTspDataSize_SECTION 1 3970 #define U1_MDrv_HVD_AVCSupportRefNumOverMaxDBPSize_SECTION 1 3971 #define U1_MDrv_HWI2C_Init_SECTION 1 3972 #define U1_MDrv_HWI2C_Start_SECTION 1 3973 #define U1_MDrv_HWI2C_Stop_SECTION 1 3974 #define U1_MDrv_HWI2C_GetPortIndex_SECTION 1 3975 #define U1_MDrv_HWI2C_SelectPort_SECTION 1 3976 #define U1_MDrv_HWI2C_SetClk_SECTION 1 3977 #define U1_MDrv_HWI2C_SetReadMode_SECTION 1 3978 #define U1_MDrv_HWI2C_WriteByte_SECTION 1 3979 #define U1_MDrv_HWI2C_WriteBytes_SECTION 1 3980 #define U1_MDrv_HWI2C_ReadByte_SECTION 1 3981 #define U1_MDrv_HWI2C_ReadBytes_SECTION 1 3982 #define U1_MDrv_HWI2C_SelectPort1_SECTION 1 3983 #define U1_MDrv_HWI2C_SetClkP1_SECTION 1 3984 #define U1_MDrv_HWI2C_SetReadModeP1_SECTION 1 3985 #define U1_MDrv_HWI2C_WriteByteP1_SECTION 1 3986 #define U1_MDrv_HWI2C_WriteBytesP1_SECTION 1 3987 #define U1_MDrv_HWI2C_ReadByteP1_SECTION 1 3988 #define U1_MDrv_HWI2C_ReadBytesP1_SECTION 1 3989 #define U1_MDrv_HWI2C_SetDbgLevel_SECTION 1 3990 #define U1_MDrv_HWI2C_GetLibVer_SECTION 1 3991 #define U1_MDrv_HWI2C_GetStatus_SECTION 1 3992 #define U1_MDrv_HWI2C_GetInfo_SECTION 1 3993 #define U1_MDrv_HWI2C_ConfigDelay_SECTION 1 3994 #define U1_MDrv_HWI2C_SetPowerState_SECTION 1 3995 #define U1_MDrv_HWI2C_ConfigDelay_EX_SECTION 1 3996 #define U1_MDrv_HWI2C_GetStatus_EX_SECTION 1 3997 #define U1_MDrv_HWI2C_Init_U2K_SECTION 1 3998 #define U1_MDrv_HWI2C_Start_U2K_SECTION 1 3999 #define U1_MDrv_HWI2C_Stop_U2K_SECTION 1 4000 #define U1_MDrv_HWI2C_WriteBytes_U2K_SECTION 1 4001 #define U1_MDrv_HWI2C_ReadBytes_U2K_SECTION 1 4002 #define U1_MDrv_HWI2C_SelectPort_U2K_SECTION 1 4003 #define U1_MDrv_HWI2C_SetClk_U2K_SECTION 1 4004 #define U1_MDrv_HWI2C_GetConfig_SECTION 1 4005 #define U1_MApp_IPAUTH_GetLibVer_SECTION 1 4006 #define U1_MApi_AUTH_Process_SECTION 1 4007 #define U1_MApi_AUTH_State_SECTION 1 4008 #define U1_MDrv_AUTH_IPCheck_SECTION 1 4009 #define U1_MDrv_AUTH_InitialVars_SECTION 1 4010 #define U1_MDrv_AUTH_AllocateVars_SECTION 1 4011 #define U1_MDrv_AUTH_ResetDefaultVars_SECTION 1 4012 #define U1_MDrv_AUTH_GetHashInfo_SECTION 1 4013 #define U1_MDrv_AUTH_AES_Set_Key_SECTION 1 4014 #define U1_MDrv_AUTH_AES_Encrypt_SECTION 1 4015 #define U1_MDrv_AUTH_AES_Decrypt_SECTION 1 4016 #define U1_MDrv_IR_Init_SECTION 1 4017 #define U1_MDrv_IR_Config_SECTION 1 4018 #define U1_MDrv_IR_GetKeyCode_SECTION 1 4019 #define U1_MDrv_IR_SetCallback_SECTION 1 4020 #define U1_MDrv_IR_GetCallback_SECTION 1 4021 #define U1_MDrv_IR_GetLibVer_SECTION 1 4022 #define U1_MDrv_IR_GetStatus_SECTION 1 4023 #define U1_MDrv_IR_Enable_SECTION 1 4024 #define U1_MDrv_IR_GetInfo_SECTION 1 4025 #define U1_MDrv_IR_SetDbgLevel_SECTION 1 4026 #define U1_MDrv_IR_OpenDevice_SECTION 1 4027 #define U1_MDrv_IR_InitCfg_SECTION 1 4028 #define U1_MDrv_IR_TimeCfg_SECTION 1 4029 #define U1_MDrv_IR_GetPulseShot_SECTION 1 4030 #define U1_MDrv_IR_SetMultiHeaderCode_SECTION 1 4031 #define U1_IRRegisterToUtopia_SECTION 1 4032 #define U1_IROpen_SECTION 1 4033 #define U1_IRClose_SECTION 1 4034 #define U1_IRIoctl_SECTION 1 4035 #define U1_MDrv_IR_SetPowerState_SECTION 1 4036 #define U1_MDrv_IRQ_Detech_SECTION 1 4037 #define U1_MDrv_IRQ_Attach_SECTION 1 4038 #define U1_MDrv_IRQ_Restore_SECTION 1 4039 #define U1_MDrv_IRQ_MaskAll_SECTION 1 4040 #define U1_MDrv_IRQ_UnMaskAll_SECTION 1 4041 #define U1_MDrv_IRQ_Mask_SECTION 1 4042 #define U1_MDrv_IRQ_UnMask_SECTION 1 4043 #define U1_MDrv_IRQ_NotifyCpu_SECTION 1 4044 #define U1_MDrv_IRQ_Init_SECTION 1 4045 #define U1_MDrv_IRQ_InISR_SECTION 1 4046 #define U1_MDrv_IRQ_SetPowerState_SECTION 1 4047 #define U1_MDrv_LDM_SetDbgLevel_SECTION 1 4048 #define U1_MDrv_LDM_SetIOMapBase_SECTION 1 4049 #define U1_MDrv_LDM_Config_MmapAddr_SECTION 1 4050 #define U1_MDrv_LDM_SetMIUPackFormat_SECTION 1 4051 #define U1_MDrv_LDM_SetYoffEnd_SECTION 1 4052 #define U1_MDrv_LDM_SetBlLdmaSize_SECTION 1 4053 #define U1_MDrv_LDM_SetDmaEnable_SECTION 1 4054 #define U1_MDrv_LDMA_SetDbgLevel_SECTION 1 4055 #define U1_MDrv_LDMA_SetMenuloadNumber_SECTION 1 4056 #define U1_MDrv_LDMA_SetSPICommandFormat_SECTION 1 4057 #define U1_MDrv_LDMA_SetCheckSumMode_SECTION 1 4058 #define U1_MDrv_LDMA_SetSpiTriggerMode_SECTION 1 4059 #define U1_MDrv_LDMA_SetTrigDelay_SECTION 1 4060 #define U1_MDrv_LDMA_EnableCS_SECTION 1 4061 #define U1_MDrv_LDMA_Init_SECTION 1 4062 #define U1_MDrv_LDMA_LD_SetLDFAddr_SECTION 1 4063 #define U1_MDrv_LDMA_LD_SetLDBAddr_SECTION 1 4064 #define U1_MDrv_LDMA_LD_SetEdge2DAddr_SECTION 1 4065 #define U1_MDrv_LDMA_LD_SetLEDBufBaseOffset_SECTION 1 4066 #define U1_MDrv_LDMA_LD_SetMIUPackOffset_SECTION 1 4067 #define U1_MDrv_LDMA_LD_SetMIUPackLength_SECTION 1 4068 #define U1_MDrv_LDMA_LD_SetYoffEnd_SECTION 1 4069 #define U1_MDrv_LDMA_LD_SetBlHeightDMA_SECTION 1 4070 #define U1_MDrv_LDMA_LD_SetBlWidthDMA_SECTION 1 4071 #define U1_MDrv_LDMA_LD_SetDmaEnable_SECTION 1 4072 #define U1_MDrv_LDMA_LD_Enable_SECTION 1 4073 #define U1_MDrv_MBX_Init_SECTION 1 4074 #define U1_MDrv_MBX_DeInit_SECTION 1 4075 #define U1_MDrv_MBX_RegisterMSG_SECTION 1 4076 #define U1_MDrv_MBX_RegisterMSGWithCallBack_SECTION 1 4077 #define U1_MDrv_MBX_UnRegisterMSG_SECTION 1 4078 #define U1_MDrv_MBX_ClearMSG_SECTION 1 4079 #define U1_MDrv_MBX_SendMsg_SECTION 1 4080 #define U1_MDrv_MBX_GetMsgQueueStatus_SECTION 1 4081 #define U1_MDrv_MBX_RecvMsg_SECTION 1 4082 #define U1_MDrv_MBX_CheckMsg_SECTION 1 4083 #define U1_MDrv_MBX_SendMsgLoopback_SECTION 1 4084 #define U1_MDrv_MBX_Enable_SECTION 1 4085 #define U1_MDrv_MBX_RemoveLatestMsg_SECTION 1 4086 #define U1_MDrv_MBX_SetPowerState_SECTION 1 4087 #define U1_MDrv_MBX_SetInformation_SECTION 1 4088 #define U1_MDrv_MBX_GetInformation_SECTION 1 4089 #define U1_MDrv_MBX_SetDbgLevel_SECTION 1 4090 #define U1_MDrv_MBX_GetLibVer_SECTION 1 4091 #define U1_MDrv_MBX_GetInfo_SECTION 1 4092 #define U1_MDrv_MBX_GetStatus_SECTION 1 4093 #define U1_MDrv_MBX_SetCallDrvFlag_SECTION 1 4094 #define U1_MDrv_MBX_GetCallDrvFlag_SECTION 1 4095 #define U1_MDrv_URSA_Init_SECTION 1 4096 #define U1_MDrv_URSA_ControlFrameLockMode_SECTION 1 4097 #define U1_MDrv_URSA_SetSpreadSpectrum_SECTION 1 4098 #define U1_MDrv_URSA_SetVFreq_SECTION 1 4099 #define U1_MDrv_MIU_Mask_Req_OPM_R_SECTION 1 4100 #define U1_MDrv_MIU_Mask_Req_DNRB_R_SECTION 1 4101 #define U1_MDrv_MIU_Mask_Req_DNRB_W_SECTION 1 4102 #define U1_MDrv_MIU_Mask_Req_DNRB_RW_SECTION 1 4103 #define U1_MDrv_MIU_Mask_Req_SC_RW_SECTION 1 4104 #define U1_MDrv_MIU_Mask_Req_MVOP_R_SECTION 1 4105 #define U1_MDrv_MIU_Mask_Req_MVD_R_SECTION 1 4106 #define U1_MDrv_MIU_Mask_Req_MVD_W_SECTION 1 4107 #define U1_MDrv_MIU_Mask_Req_MVD_RW_SECTION 1 4108 #define U1_MDrv_MIU_Mask_Req_AUDIO_RW_SECTION 1 4109 #define U1_MDrv_MIU_MaskReq_SECTION 1 4110 #define U1_MDrv_MIU_UnMaskReq_SECTION 1 4111 #define U1_MDrv_MIU_InitCounter_SECTION 1 4112 #define U1_MDrv_MIU_VOP_SwitchMIU_SECTION 1 4113 #define U1_MDrv_MIU_PrintMIUProtectInfo_SECTION 1 4114 #define U1_MDrv_MIU_GetDefaultClientID_KernelProtect_SECTION 1 4115 #define U1_MDrv_MIU_GetBusWidth_SECTION 1 4116 #define U1_MDrv_MIU_SetSsc_SECTION 1 4117 #define U1_MDrv_MIU_SetSscValue_SECTION 1 4118 #define U1_MDrv_MIU_GetClientID_SECTION 1 4119 #define U1_MDrv_MIU_Mask_SECTION 1 4120 #define U1_MDrv_MIU_Unmask_SECTION 1 4121 #define U1_MDrv_MIU_MaskByPort_SECTION 1 4122 #define U1_MDrv_MIU_UnmaskByPort_SECTION 1 4123 #define U1_MDrv_MIU_SetIOMapBase_SECTION 1 4124 #define U1_MDrv_MIU_ProtectAlign_SECTION 1 4125 #define U1_MDrv_MIU_Dram_Size_SECTION 1 4126 #define U1_MDrv_MIU_Dram_ReadSize_SECTION 1 4127 #define U1_MDrv_MIU_ClinetNumber_SECTION 1 4128 #define U1_MDrv_MIU_Protect_SECTION 1 4129 #define U1_MDrv_MIU_ProtectEx_SECTION 1 4130 #define U1_MDrv_MIU_IsSupportMIU1_SECTION 1 4131 #define U1_MDrv_MIU_SelMIU_SECTION 1 4132 #define U1_MDrv_MIU_GetClientInfo_SECTION 1 4133 #define U1_MDrv_MIU_GetProtectInfo_SECTION 1 4134 #define U1_MDrv_MIU_SetGroupPriority_SECTION 1 4135 #define U1_MDrv_MIU_SetHPriorityMask_SECTION 1 4136 #define U1_MDrv_MIU_GetLibVer_SECTION 1 4137 #define U1_MDrv_MIU_EnableScramble_SECTION 1 4138 #define U1_MDrv_MIU_IsScrambleEnabled_SECTION 1 4139 #define U1_MDrv_MIU_GetLoading_SECTION 1 4140 #define U1_MDrv_MIU_Init_SECTION 1 4141 #define U1_MDrv_MIU_SetPowerState_SECTION 1 4142 #define U1_MDrv_MIU_GetClientWidth_SECTION 1 4143 #define U1_MDrv_MIU_GetDramType_SECTION 1 4144 #define U1_MDrv_MMIO_Init_SECTION 1 4145 #define U1_MDrv_MMIO_GetBASE_SECTION 1 4146 #define U1_MDrv_MMIO_Close_SECTION 1 4147 #define U1_MDrv_MPIF_GetLibVer_SECTION 1 4148 #define U1_MDrv_MPIF_GetInfo_SECTION 1 4149 #define U1_MDrv_MPIF_GetStatus_SECTION 1 4150 #define U1_MDrv_MPIF_SetDbgLevel_SECTION 1 4151 #define U1_MDrv_MPIF_Init_SECTION 1 4152 #define U1_MDrv_MPIF_Uninit_SECTION 1 4153 #define U1_MDrv_MPIF_LC1A_RW_SECTION 1 4154 #define U1_MDrv_MPIF_Set_LC2XPath_SECTION 1 4155 #define U1_MDrv_MPIF_LC2A_RW_SECTION 1 4156 #define U1_MDrv_MPIF_LC2B_RW_SECTION 1 4157 #define U1_MDrv_MPIF_LC3A_RIURW_SECTION 1 4158 #define U1_MDrv_MPIF_LC3B_RIURW_SECTION 1 4159 #define U1_MDrv_MPIF_LC3A_MIURW_SECTION 1 4160 #define U1_MDrv_MPIF_LC3B_MIURW_SECTION 1 4161 #define U1_MDrv_MPIF_LC4A_MIURW_SECTION 1 4162 #define U1_MDrv_MPIF_Print_SPIFCfgInfo_SECTION 1 4163 #define U1_MDrv_MPIF_SetCmdDataMode_SECTION 1 4164 #define U1_MDrv_MPIF_Set_Clock_SECTION 1 4165 #define U1_MDrv_MPIF_Clock_Disable_SECTION 1 4166 #define U1_MDrv_MPIF_SetSlave_ClkInv_Delay_SECTION 1 4167 #define U1_MDrv_MPIF_SetSlave_Trc_Wt_SECTION 1 4168 #define U1_MDrv_MPIF_SetSlave_Clk_Delay_SECTION 1 4169 #define U1_MDrv_MSPI_Init_Ext_SECTION 1 4170 #define U1_MDrv_MSPI_Init_SECTION 1 4171 #define U1_MDrv_MSPI_Read_SECTION 1 4172 #define U1_MDrv_MSPI_Write_SECTION 1 4173 #define U1_MDrv_MSPI_DCConfig_SECTION 1 4174 #define U1_MDrv_MSPI_CLKConfig_SECTION 1 4175 #define U1_MDrv_MSPI_FRAMEConfig_SECTION 1 4176 #define U1_MDrv_MSPI_SlaveEnable_SECTION 1 4177 #define U1_MDrv_MSPI_HW_Support_SECTION 1 4178 #define U1_MDrv_MSPI_SetPowerState_SECTION 1 4179 #define U1_MDrv_MSPI_SetDbgLevel_SECTION 1 4180 #define U1_MDrv_MasterSPI_Init_SECTION 1 4181 #define U1_MDrv_MasterSPI_Read_SECTION 1 4182 #define U1_MDrv_MasterSPI_Write_SECTION 1 4183 #define U1_MDrv_MasterSPI_DCConfig_SECTION 1 4184 #define U1_MDrv_MasterSPI_CLKConfig_SECTION 1 4185 #define U1_MDrv_MasterSPI_FRAMEConfig_SECTION 1 4186 #define U1_MDrv_MasterSPI_SlaveEnable_SECTION 1 4187 #define U1_MDrv_MasterSPI_CsPadConfig_SECTION 1 4188 #define U1_MDrv_MasterSPI_MaxClkConfig_SECTION 1 4189 #define U1_MDrv_MSPI_Info_Config_SECTION 1 4190 #define U1_MDrv_MSPI_RWBytes_SECTION 1 4191 #define U1_MDrv_MVD_SetCfg_SECTION 1 4192 #define U1_MDrv_MVD_GetFWVer_SECTION 1 4193 #define U1_MDrv_MVD_SetDbgLevel_SECTION 1 4194 #define U1_MDrv_MVD_GetInfo_SECTION 1 4195 #define U1_MDrv_MVD_GetLibVer_SECTION 1 4196 #define U1_MDrv_MVD_GetStatus_SECTION 1 4197 #define U1_MDrv_MVD_GetInternalMemCfg_SECTION 1 4198 #define U1_MDrv_MVD_SetCodecInfo_SECTION 1 4199 #define U1_MDrv_MVD_SetDivXCfg_SECTION 1 4200 #define U1_MDrv_MVD_SetBitStreamAddr_SECTION 1 4201 #define U1_MDrv_MVD_SetFrameBuffAddr_SECTION 1 4202 #define U1_MDrv_MVD_GetFrameInfo_SECTION 1 4203 #define U1_MDrv_MVD_SetOverflowTH_SECTION 1 4204 #define U1_MDrv_MVD_SetUnderflowTH_SECTION 1 4205 #define U1_MDrv_MVD_RstIFrameDec_SECTION 1 4206 #define U1_MDrv_MVD_GetIsIFrameDecoding_SECTION 1 4207 #define U1_MDrv_MVD_GetSyncStatus_SECTION 1 4208 #define U1_MDrv_MVD_GetIsFreerun_SECTION 1 4209 #define U1_MDrv_MVD_GetIsIPicFound_SECTION 1 4210 #define U1_MDrv_MVD_GetResidualStreamSize_SECTION 1 4211 #define U1_MDrv_MVD_DecodeIFrame_SECTION 1 4212 #define U1_MDrv_MVD_GetValidStreamFlag_SECTION 1 4213 #define U1_MDrv_MVD_GetChromaFormat_SECTION 1 4214 #define U1_MDrv_MVD_SetFrameInfo_SECTION 1 4215 #define U1_MDrv_MVD_SetSLQStartEnd_SECTION 1 4216 #define U1_MDrv_MVD_GetErrInfo_SECTION 1 4217 #define U1_MDrv_MVD_GetSkipPicCounter_SECTION 1 4218 #define U1_MDrv_MVD_GetSLQAvailableLevel_SECTION 1 4219 #define U1_MDrv_MVD_SetSLQWritePtr_SECTION 1 4220 #define U1_MDrv_MVD_GetSLQReadPtr_SECTION 1 4221 #define U1_MDrv_MVD_SetSLQTblBufStartEnd_SECTION 1 4222 #define U1_MDrv_MVD_GetPicType_SECTION 1 4223 #define U1_MDrv_MVD_GetBitsRate_SECTION 1 4224 #define U1_MDrv_MVD_GetVideoRange_SECTION 1 4225 #define U1_MDrv_MVD_GetLowDelayFlag_SECTION 1 4226 #define U1_MDrv_MVD_GetIs32PullDown_SECTION 1 4227 #define U1_MDrv_MVD_GetIsDynScalingEnabled_SECTION 1 4228 #define U1_MDrv_MVD_GetPtsStcDiff_SECTION 1 4229 #define U1_MDrv_MVD_Pause_SECTION 1 4230 #define U1_MDrv_MVD_Resume_SECTION 1 4231 #define U1_MDrv_MVD_StepDisp_SECTION 1 4232 #define U1_MDrv_MVD_IsStepDispDone_SECTION 1 4233 #define U1_MDrv_MVD_StepDecode_SECTION 1 4234 #define U1_MDrv_MVD_IsStepDecodeDone_SECTION 1 4235 #define U1_MDrv_MVD_SeekToPTS_SECTION 1 4236 #define U1_MDrv_MVD_IsStep2PtsDone_SECTION 1 4237 #define U1_MDrv_MVD_SkipToPTS_SECTION 1 4238 #define U1_MDrv_MVD_TrickPlay_SECTION 1 4239 #define U1_MDrv_MVD_EnableForcePlay_SECTION 1 4240 #define U1_MDrv_MVD_RegSetBase_SECTION 1 4241 #define U1_MDrv_MVD_Init_SECTION 1 4242 #define U1_MDrv_MVD_Exit_SECTION 1 4243 #define U1_MDrv_MVD_Rst_SECTION 1 4244 #define U1_MDrv_MVD_Play_SECTION 1 4245 #define U1_MDrv_MVD_SetAVSync_SECTION 1 4246 #define U1_MDrv_MVD_SetAVSyncThreshold_SECTION 1 4247 #define U1_MDrv_MVD_SetAVSyncFreerunThreshold_SECTION 1 4248 #define U1_MDrv_MVD_GetAVSyncDelay_SECTION 1 4249 #define U1_MDrv_MVD_GetIsAVSyncOn_SECTION 1 4250 #define U1_MDrv_MVD_GetIsSyncRep_SECTION 1 4251 #define U1_MDrv_MVD_GetIsSyncSkip_SECTION 1 4252 #define U1_MDrv_MVD_ChangeAVsync_SECTION 1 4253 #define U1_MDrv_MVD_DispCtrl_SECTION 1 4254 #define U1_MDrv_MVD_DispRepeatField_SECTION 1 4255 #define U1_MDrv_MVD_GetTop1stField_SECTION 1 4256 #define U1_MDrv_MVD_GetRepeat1stField_SECTION 1 4257 #define U1_MDrv_MVD_GetTmpRefField_SECTION 1 4258 #define U1_MDrv_MVD_GetColorFormat_SECTION 1 4259 #define U1_MDrv_MVD_GetMatrixCoef_SECTION 1 4260 #define U1_MDrv_MVD_GetActiveFormat_SECTION 1 4261 #define U1_MDrv_MVD_GetDispRdy_SECTION 1 4262 #define U1_MDrv_MVD_Is1stFrmRdy_SECTION 1 4263 #define U1_MDrv_MVD_GetGOPCount_SECTION 1 4264 #define U1_MDrv_MVD_GetPicCounter_SECTION 1 4265 #define U1_MDrv_MVD_GetParserByteCnt_SECTION 1 4266 #define U1_MDrv_MVD_GetDecodeStatus_SECTION 1 4267 #define U1_MDrv_MVD_GetLastCmd_SECTION 1 4268 #define U1_MDrv_MVD_GetVldErrCount_SECTION 1 4269 #define U1_MDrv_MVD_DropErrorFrame_SECTION 1 4270 #define U1_MDrv_MVD_MVDCommand_SECTION 1 4271 #define U1_MDrv_MVD_SkipData_SECTION 1 4272 #define U1_MDrv_MVD_SkipToIFrame_SECTION 1 4273 #define U1_MDrv_MVD_GetCaps_SECTION 1 4274 #define U1_MDrv_MVD_DisableErrConceal_SECTION 1 4275 #define U1_MDrv_MVD_PushQueue_SECTION 1 4276 #define U1_MDrv_MVD_FlushQueue_SECTION 1 4277 #define U1_MDrv_MVD_FlushDisplayBuf_SECTION 1 4278 #define U1_MDrv_MVD_GetQueueVacancy_SECTION 1 4279 #define U1_MDrv_MVD_GetESReadPtr_SECTION 1 4280 #define U1_MDrv_MVD_GetESWritePtr_SECTION 1 4281 #define U1_MDrv_MVD_EnableLastFrameShow_SECTION 1 4282 #define U1_MDrv_MVD_IsDispFinish_SECTION 1 4283 #define U1_MDrv_MVD_SetSpeed_SECTION 1 4284 #define U1_MDrv_MVD_ResetPTS_SECTION 1 4285 #define U1_MDrv_MVD_GetPTS_SECTION 1 4286 #define U1_MDrv_MVD_GetNextPTS_SECTION 1 4287 #define U1_MDrv_MVD_GetTrickMode_SECTION 1 4288 #define U1_MDrv_MVD_IsPlaying_SECTION 1 4289 #define U1_MDrv_MVD_IsIdle_SECTION 1 4290 #define U1_MDrv_MVD_IsSeqChg_SECTION 1 4291 #define U1_MDrv_MVD_DbgSetData_SECTION 1 4292 #define U1_MDrv_MVD_DbgGetData_SECTION 1 4293 #define U1_MDrv_MVD_GetDecodedFrameIdx_SECTION 1 4294 #define U1_MDrv_MVD_SetFileModeAVSync_SECTION 1 4295 #define U1_MDrv_MVD_IsAllBufferEmpty_SECTION 1 4296 #define U1_MDrv_MVD_GenPattern_SECTION 1 4297 #define U1_MDrv_MVD_GetPatternInfo_SECTION 1 4298 #define U1_MDrv_MVD_SetDynScalingParam_SECTION 1 4299 #define U1_MDrv_MVD_SetDynamicScaleAddr_SECTION 1 4300 #define U1_MDrv_MVD_SetVirtualBox_SECTION 1 4301 #define U1_MDrv_MVD_SetBlueScreen_SECTION 1 4302 #define U1_MDrv_MVD_EnableInt_SECTION 1 4303 #define U1_MDrv_MVD_EnableDispOneField_SECTION 1 4304 #define U1_MDrv_MVD_GetExtDispInfo_SECTION 1 4305 #define U1_MDrv_MVD_GetFrmInfo_SECTION 1 4306 #define U1_MDrv_MVD_GetTimeCode_SECTION 1 4307 #define U1_MDrv_MVD_GetUsrDataIsAvailable_SECTION 1 4308 #define U1_MDrv_MVD_GetUsrDataInfo_SECTION 1 4309 #define U1_MDrv_MVD_SetFreezeDisp_SECTION 1 4310 #define U1_MDrv_MVD_GetDispCount_SECTION 1 4311 #define U1_MDrv_MVD_SetFdMaskDelayCount_SECTION 1 4312 #define U1_MDrv_MVD_SetOutputFRCMode_SECTION 1 4313 #define U1_MDrv_MVD_SetFRCDropType_SECTION 1 4314 #define U1_MDrv_MVD_SetDisableSeqChange_SECTION 1 4315 #define U1_MDrv_MVD_SetMStreamerMode_SECTION 1 4316 #define U1_MDrv_MVD_FrameFlip_SECTION 1 4317 #define U1_MDrv_MVD_FrameRelease_SECTION 1 4318 #define U1_MDrv_MVD_FrameCapture_SECTION 1 4319 #define U1_MDrv_MVD_PVRFlushDispQueue_SECTION 1 4320 #define U1_MDrv_MVD_CCRst_SECTION 1 4321 #define U1_MDrv_MVD_CCStartParsing_SECTION 1 4322 #define U1_MDrv_MVD_CCStopParsing_SECTION 1 4323 #define U1_MDrv_MVD_CCGetWritePtr_SECTION 1 4324 #define U1_MDrv_MVD_CCGetReadPtr_SECTION 1 4325 #define U1_MDrv_MVD_CCUpdateReadPtr_SECTION 1 4326 #define U1_MDrv_MVD_CCGetIsOverflow_SECTION 1 4327 #define U1_MDrv_MVD_SetSkipRepeatMode_SECTION 1 4328 #define U1_MDrv_MVD_FlushPTSBuf_SECTION 1 4329 #define U1_MDrv_MVD_ParserRstDone_SECTION 1 4330 #define U1_MDrv_MVD_DbgDump_SECTION 1 4331 #define U1_MDrv_MVD_IsCmdFinished_SECTION 1 4332 #define U1_MDrv_MVD_GetFrmRateIsSupported_SECTION 1 4333 #define U1_MDrv_MVD_SetAutoMute_SECTION 1 4334 #define U1_MDrv_MVD_SetVSizeAlign_SECTION 1 4335 #define U1_MDrv_MVD_SetDispFinishMode_SECTION 1 4336 #define U1_MDrv_MVD_SetAVSyncMode_SECTION 1 4337 #define U1_MDrv_MVD_SetIdctMode_SECTION 1 4338 #define U1_MDrv_MVD_GetDivxVer_SECTION 1 4339 #define U1_MDrv_MVD_SetIsrEvent_SECTION 1 4340 #define U1_MDrv_MVD_GetIsrEvent_SECTION 1 4341 #define U1_MDrv_MVD_SetMVDClockSpeed_SECTION 1 4342 #define U1_MDrv_MVD_ShowFirstFrameDirect_SECTION 1 4343 #define U1_MDrv_MVOP_GetConfig_SECTION 1 4344 #define U1_MDrv_MVOP_Init_SECTION 1 4345 #define U1_MDrv_MVOP_Exit_SECTION 1 4346 #define U1_MDrv_MVOP_Enable_SECTION 1 4347 #define U1_MDrv_MVOP_SetInputCfg_SECTION 1 4348 #define U1_MDrv_MVOP_SetOutputCfg_SECTION 1 4349 #define U1_MDrv_MVOP_EnableBlackBG_SECTION 1 4350 #define U1_MDrv_MVOP_EnableUVShift_SECTION 1 4351 #define U1_MDrv_MVOP_SetMonoMode_SECTION 1 4352 #define U1_MDrv_MVOP_GetHSize_SECTION 1 4353 #define U1_MDrv_MVOP_GetVSize_SECTION 1 4354 #define U1_MDrv_MVOP_GetHStart_SECTION 1 4355 #define U1_MDrv_MVOP_GetVStart_SECTION 1 4356 #define U1_MDrv_MVOP_GetIsInterlace_SECTION 1 4357 #define U1_MDrv_MVOP_GetIsHDuplicate_SECTION 1 4358 #define U1_MDrv_MVOP_GetIsEnable_SECTION 1 4359 #define U1_MDrv_MVOP_GetOutputTiming_SECTION 1 4360 #define U1_MDrv_MVOP_GetLibVer_SECTION 1 4361 #define U1_MDrv_MVOP_CheckCapability_SECTION 1 4362 #define U1_MDrv_MVOP_GetMaxHOffset_SECTION 1 4363 #define U1_MDrv_MVOP_GetMaxVOffset_SECTION 1 4364 #define U1_MDrv_MVOP_SetDbgLevel_SECTION 1 4365 #define U1_MDrv_MVOP_GetInfo_SECTION 1 4366 #define U1_MDrv_MVOP_GetStatus_SECTION 1 4367 #define U1_MDrv_MVOP_SetPattern_SECTION 1 4368 #define U1_MDrv_MVOP_SetTileFormat_SECTION 1 4369 #define U1_MDrv_MVOP_GetDstInfo_SECTION 1 4370 #define U1_MDrv_MVOP_SetFixVtt_SECTION 1 4371 #define U1_MDrv_MVOP_SetMMIOMapBase_SECTION 1 4372 #define U1_MDrv_MVOP_MiuSwitch_SECTION 1 4373 #define U1_MDrv_MVOP_SetBaseAdd_SECTION 1 4374 #define U1_MDrv_MVOP_SEL_OP_FIELD_SECTION 1 4375 #define U1_MDrv_MVOP_SetRegSizeFromMVD_SECTION 1 4376 #define U1_MDrv_MVOP_SetStartPos_SECTION 1 4377 #define U1_MDrv_MVOP_SetImageWidthHight_SECTION 1 4378 #define U1_MDrv_MVOP_SetVOPMirrorMode_SECTION 1 4379 #define U1_MDrv_MVOP_INV_OP_VS_SECTION 1 4380 #define U1_MDrv_MVOP_FORCE_TOP_SECTION 1 4381 #define U1_MDrv_MVOP_EnableFreerunMode_SECTION 1 4382 #define U1_MDrv_MVOP_GetBaseAdd_SECTION 1 4383 #define U1_MDrv_MVOP_SubGetStatus_SECTION 1 4384 #define U1_MDrv_MVOP_SubGetHStart_SECTION 1 4385 #define U1_MDrv_MVOP_SubGetVStart_SECTION 1 4386 #define U1_MDrv_MVOP_SubSetPattern_SECTION 1 4387 #define U1_MDrv_MVOP_SubSetTileFormat_SECTION 1 4388 #define U1_MDrv_MVOP_SubSetMMIOMapBase_SECTION 1 4389 #define U1_MDrv_MVOP_SubInit_SECTION 1 4390 #define U1_MDrv_MVOP_SubExit_SECTION 1 4391 #define U1_MDrv_MVOP_SubEnable_SECTION 1 4392 #define U1_MDrv_MVOP_SubGetIsEnable_SECTION 1 4393 #define U1_MDrv_MVOP_SubEnableUVShift_SECTION 1 4394 #define U1_MDrv_MVOP_SubEnableBlackBG_SECTION 1 4395 #define U1_MDrv_MVOP_SubSetMonoMode_SECTION 1 4396 #define U1_MDrv_MVOP_SubSetInputCfg_SECTION 1 4397 #define U1_MDrv_MVOP_SubSetOutputCfg_SECTION 1 4398 #define U1_MDrv_MVOP_SubGetOutputTiming_SECTION 1 4399 #define U1_MDrv_MVOP_SubGetHSize_SECTION 1 4400 #define U1_MDrv_MVOP_SubGetVSize_SECTION 1 4401 #define U1_MDrv_MVOP_SubGetIsInterlace_SECTION 1 4402 #define U1_MDrv_MVOP_SubGetIsHDuplicate_SECTION 1 4403 #define U1_MDrv_MVOP_SubCheckCapability_SECTION 1 4404 #define U1_MDrv_MVOP_SubGetMaxHOffset_SECTION 1 4405 #define U1_MDrv_MVOP_SubGetMaxVOffset_SECTION 1 4406 #define U1_MDrv_MVOP_SubGetDstInfo_SECTION 1 4407 #define U1_MDrv_MVOP_SubSetFixVtt_SECTION 1 4408 #define U1_MDrv_MVOP_SubMiuSwitch_SECTION 1 4409 #define U1_MDrv_MVOP_SubSetVOPMirrorMode_SECTION 1 4410 #define U1_MDrv_MVOP_SubEnableFreerunMode_SECTION 1 4411 #define U1_MDrv_MVOP_SubSetBaseAdd_SECTION 1 4412 #define U1_MDrv_MVOP_SubGetBaseAdd_SECTION 1 4413 #define U1_MDrv_MVOP_EX_Init_SECTION 1 4414 #define U1_MDrv_MVOP_EX_Exit_SECTION 1 4415 #define U1_MDrv_MVOP_EX_Enable_SECTION 1 4416 #define U1_MDrv_MVOP_EX_SetInputCfg_SECTION 1 4417 #define U1_MDrv_MVOP_EX_SetOutputCfg_SECTION 1 4418 #define U1_MDrv_MVOP_EX_SetPattern_SECTION 1 4419 #define U1_MDrv_MVOP_EX_SetTileFormat_SECTION 1 4420 #define U1_MDrv_MVOP_EX_EnableUVShift_SECTION 1 4421 #define U1_MDrv_MVOP_EX_EnableBlackBG_SECTION 1 4422 #define U1_MDrv_MVOP_EX_SetMonoMode_SECTION 1 4423 #define U1_MDrv_MVOP_EX_SetFixVtt_SECTION 1 4424 #define U1_MDrv_MVOP_EX_MiuSwitch_SECTION 1 4425 #define U1_MDrv_MVOP_EX_SetVOPMirrorMode_SECTION 1 4426 #define U1_MDrv_MVOP_EX_EnableFreerunMode_SECTION 1 4427 #define U1_MDrv_MVOP_EX_GetOutputTiming_SECTION 1 4428 #define U1_MDrv_MVOP_EX_GetIsEnable_SECTION 1 4429 #define U1_MDrv_MVOP_EX_GetHStart_SECTION 1 4430 #define U1_MDrv_MVOP_EX_GetVStart_SECTION 1 4431 #define U1_MDrv_MVOP_EX_GetHSize_SECTION 1 4432 #define U1_MDrv_MVOP_EX_GetVSize_SECTION 1 4433 #define U1_MDrv_MVOP_EX_GetIsInterlace_SECTION 1 4434 #define U1_MDrv_MVOP_EX_GetIsHDuplicate_SECTION 1 4435 #define U1_MDrv_MVOP_EX_GetStatus_SECTION 1 4436 #define U1_MDrv_MVOP_EX_CheckCapability_SECTION 1 4437 #define U1_MDrv_MVOP_EX_GetDstInfo_SECTION 1 4438 #define U1_MDrv_MVOP_SendBlueScreen_SECTION 1 4439 #define U1_MDrv_MVOP_SetCommand_SECTION 1 4440 #define U1_MDrv_MVOP_GetCommand_SECTION 1 4441 #define U1_MDrv_MVOP_SetFrequency_SECTION 1 4442 #define U1_MDrv_MVOP_SetPowerState_SECTION 1 4443 #define U1_MVOPRegisterToUtopia_SECTION 1 4444 #define U1_MVOPOpen_SECTION 1 4445 #define U1_MVOPClose_SECTION 1 4446 #define U1_MVOPIoctl_SECTION 1 4447 #define U1_MVOPStr_SECTION 1 4448 #define U1_MDrv_NDS_Init_SECTION 1 4449 #define U1_MDrv_NDS_Exit_SECTION 1 4450 #define U1_MDrv_NDS_PowerOff_SECTION 1 4451 #define U1_MDrv_NDS_SetMagicValue_SECTION 1 4452 #define U1_MDrv_NDS_GetCaps_SECTION 1 4453 #define U1_MDrv_NDS_NSK_Open_SECTION 1 4454 #define U1_MDrv_NDS_NSK_Close_SECTION 1 4455 #define U1_NDS_RASP_InitLibResource_SECTION 1 4456 #define U1_NDS_RASP_Init_SECTION 1 4457 #define U1_NDS_RASP_Exit_SECTION 1 4458 #define U1_NDS_RASP_Reset_SECTION 1 4459 #define U1_NDS_RASP_GetTSIFStatus_SECTION 1 4460 #define U1_NDS_RASP_FileinEnable_SECTION 1 4461 #define U1_NDS_RASP_GetFileinEnable_SECTION 1 4462 #define U1_NDS_RASP_GetCap_SECTION 1 4463 #define U1_NDS_RASP_GetLibVer_SECTION 1 4464 #define U1_NDS_RASP_GetTimerAndPacketNum_SECTION 1 4465 #define U1_NDS_RASP_GetTsPayload_SECTION 1 4466 #define U1_NDS_RASP_GetEventMask_SECTION 1 4467 #define U1_NDS_RASP_CtrlConfig_SECTION 1 4468 #define U1_NDS_RASP_PvrEngStart_SECTION 1 4469 #define U1_NDS_RASP_Pause_SECTION 1 4470 #define U1_NDS_RASP_GetWriteAddr_SECTION 1 4471 #define U1_NDS_RASP_SetNotify_SECTION 1 4472 #define U1_NDS_RASP_SetPacketMode_SECTION 1 4473 #define U1_NDS_RASP_SetRecordTimeStamp_SECTION 1 4474 #define U1_NDS_RASP_GetRecordTimeStamp_SECTION 1 4475 #define U1_NDS_RASP_GetCurrentPktStatus_SECTION 1 4476 #define U1_NDS_RASP_TimeStampSelRecordStampSrc_SECTION 1 4477 #define U1_NDS_RASP_AllocFlt_SECTION 1 4478 #define U1_NDS_RASP_FreeFlt_SECTION 1 4479 #define U1_NDS_RASP_AllocECMFlt_SECTION 1 4480 #define U1_NDS_RASP_FreeECMFlt_SECTION 1 4481 #define U1_NDS_RASP_SetPid_SECTION 1 4482 #define U1_NDS_RASP_GetPid_SECTION 1 4483 #define U1_NDS_RASP_AttachInterrupt_SECTION 1 4484 #define U1_NDS_RASP_EnableInterrupt_SECTION 1 4485 #define U1_NDS_RASP_CallbackSize_SECTION 1 4486 #define U1_NDS_RASP_SetEventMask_SECTION 1 4487 #define U1_NDS_RASP_SetWatermark_SECTION 1 4488 #define U1_NDS_RASP_AdvEnable_SECTION 1 4489 #define U1_NDS_RASP_SetPayloadMask_SECTION 1 4490 #define U1_NDS_RASP_SetDataSwap_SECTION 1 4491 #define U1_NDS_PROC_RASP_PVR_SizeMet_SECTION 1 4492 #define U1_NDS_RASP_CallbackIntCheck_SECTION 1 4493 #define U1_NDS_RASP_CallbackIntClr_SECTION 1 4494 #define U1_NDS_RASP_Init2_SECTION 1 4495 #define U1_NDS_RASP_Exit2_SECTION 1 4496 #define U1_NDS_RASP_SetFileIn_Config_SECTION 1 4497 #define U1_NDS_RASP_FileIn_Start_SECTION 1 4498 #define U1_NDS_RASP_SetFileIn_Timer_SECTION 1 4499 #define U1_NDS_RASP_SetFileIn_PktSize_SECTION 1 4500 #define U1_NDS_RASP_IsFileIn_Done_SECTION 1 4501 #define U1_NDS_RASP_FileIn_Flush_SECTION 1 4502 #define U1_NDS_RASP_SetBufInfo_SECTION 1 4503 #define U1_NDS_RASP_FileinInit_SECTION 1 4504 #define U1_NDS_RASP_FileIn_BypassTimeStamp_SECTION 1 4505 #define U1_NDS_RASP_FileIn_SetPlaybackTimeStamp_SECTION 1 4506 #define U1_NDS_RASP_FileIn_GetPlaybackTimeStamp_SECTION 1 4507 #define U1_NDS_RASP_FileIn_IsCMDQ_Full_SECTION 1 4508 #define U1_NDS_RASP_FileIn_IsCMDQ_Empty_SECTION 1 4509 #define U1_NDS_RASP_FileIn_GetCmdQueueLevel_SECTION 1 4510 #define U1_NDS_RASP_FileIn_GetEmptyNum_SECTION 1 4511 #define U1_NDS_RASP_FileIn_Timer_SECTION 1 4512 #define U1_NDS_RASP_FileIn_Init_TimeStamp_SECTION 1 4513 #define U1_NDS_RASP_Reset_EventPktCounter_SECTION 1 4514 #define U1_NDS_RASP_Reset_EventPktTimer_SECTION 1 4515 #define U1_NDS_RASP_GetEventDescriptor_SECTION 1 4516 #define U1_NDS_RASP_GetEventNumber_SECTION 1 4517 #define U1_NDS_RASP_FlowSet_SECTION 1 4518 #define U1_NDS_RASP_RaspEngStart_SECTION 1 4519 #define U1_NDS_RASP_Livein_Config_SECTION 1 4520 #define U1_NDS_RASP_SetDbgLevel_SECTION 1 4521 #define U1_NDS_RASP_SetPayloadTimeStamp_SECTION 1 4522 #define U1_NDS_RASP_GetPayloadTimeStamp_SECTION 1 4523 #define U1_NDS_RASP_GetPayloadWriteAddr_SECTION 1 4524 #define U1_NDS_RASP_SetECMPid_SECTION 1 4525 #define U1_NDS_RASP_SetCallBack_SECTION 1 4526 #define U1_NDS_RASP_Set_EventNotify_SECTION 1 4527 #define U1_NDS_RASP_SetEvent_Threshold_SECTION 1 4528 #define U1_NDS_RASP_SetTime_Timeout_SECTION 1 4529 #define U1_NDS_RASP_SetECMTimeStamp_SECTION 1 4530 #define U1_NDS_RASP_GetECMTimeStamp_SECTION 1 4531 #define U1_MDrv_NSK2_Init_SECTION 1 4532 #define U1_MDrv_NSK2_Exit_SECTION 1 4533 #define U1_MDrv_NSK2_CtrlInt_SECTION 1 4534 #define U1_MDrv_NSK2_ColdReset_SECTION 1 4535 #define U1_MDrv_NSK2_EndSubtest_SECTION 1 4536 #define U1_MDrv_NSK2_Compare_SECTION 1 4537 #define U1_MDrv_NSK2_CompareMem_SECTION 1 4538 #define U1_MDrv_NSK2_CompareKTE_SECTION 1 4539 #define U1_MDrv_NSK2_CompareOut_SECTION 1 4540 #define U1_MDrv_NSK2_WriteMem_SECTION 1 4541 #define U1_MDrv_NSK2_WriteSFR_SECTION 1 4542 #define U1_MDrv_NSK2_WriteESA_SECTION 1 4543 #define U1_MDrv_NSK2_WriteTransportKey_SECTION 1 4544 #define U1_MDrv_NSK2_WriteM2MKey_SECTION 1 4545 #define U1_MDrv_NSK2_WriteSCPUKey_SECTION 1 4546 #define U1_MDrv_NSK2_WriteReservedKey_SECTION 1 4547 #define U1_MDrv_NSK2_GetReserveKeyNum_SECTION 1 4548 #define U1_MDrv_NSK2_SetRNG_SECTION 1 4549 #define U1_MDrv_NSK2_BasicInitializationComplete_SECTION 1 4550 #define U1_MDrv_NSK2_DriveKteAck_SECTION 1 4551 #define U1_MDrv_NSK2_FillJTagPswd_SECTION 1 4552 #define U1_MDrv_NSK2_CheckPubOTPConfig_SECTION 1 4553 #define U1_MDrv_NSK2_UnlockOTPCtrl_SECTION 1 4554 #define U1_MDrv_NSK2_ReadData_SECTION 1 4555 #define U1_MDrv_NSK2_WriteData_SECTION 1 4556 #define U1_MDrv_NSK2_ReadData8_SECTION 1 4557 #define U1_MDrv_NSK2_WriteData8_SECTION 1 4558 #define U1_MDrv_NSK2_ReadData32_SECTION 1 4559 #define U1_MDrv_NSK2_WriteData32_SECTION 1 4560 #define U1_MDrv_NSK2_SetIntNotify_SECTION 1 4561 #define U1_MDrv_NSK2_ExcuteCmd_SECTION 1 4562 #define U1_MDrv_NSK2_GetOTPProperties_SECTION 1 4563 #define U1_MDrv_NSK2_GetCMProperties_SECTION 1 4564 #define U1_MDrv_NSK2_GetM2MProperties_SECTION 1 4565 #define U1_MDrv_NSK2_GetDMAProperties_SECTION 1 4566 #define U1_MDrv_NSK2_GetMaxXConn_SECTION 1 4567 #define U1_MDrv_NSK2_GetOTPValue_SECTION 1 4568 #define U1_MDrv_NSK2_CMChannelNum_SECTION 1 4569 #define U1_MDrv_NSK2_GetOTPFieldValue_SECTION 1 4570 #define U1_MDrv_NSK2_SetDbgLevel_SECTION 1 4571 #define U1_MDrv_NSK2_SetPollingCnt_SECTION 1 4572 #define U1_MDrv_NSK2_GetRNGThroughPut_SECTION 1 4573 #define U1_MDrv_NSK2_RunFree_SECTION 1 4574 #define U1_MDrv_NSK2_PushSlowClock_SECTION 1 4575 #define U1_MDrv_NSK21_InvalidCmChannel_SECTION 1 4576 #define U1_MDrv_NSK21_CfgCmChannel_SECTION 1 4577 #define U1_MDrv_NSK21_WriteTransportKey_SECTION 1 4578 #define U1_MDrv_NSK21_WriteM2MKey_SECTION 1 4579 #define U1_MDrv_NSK21_ModifyGenIn_SECTION 1 4580 #define U1_MDrv_NSK21_WriteJTagKey_SECTION 1 4581 #define U1_MDrv_NSK2_CompareIRQ_SECTION 1 4582 #define U1_MDrv_NSK21_IncrementNvCounter_SECTION 1 4583 #define U1_MDrv_NSK2_WriteOtpKey_SECTION 1 4584 #define U1_MDrv_NSK2_GetFullChipConfig_SECTION 1 4585 #define U1_MDrv_NSK2_GetNVCounterConfig_SECTION 1 4586 #define U1_MDrv_NSK2_GetSRAlignBit_SECTION 1 4587 #define U1_MDrv_NSK2_RSA_SetSecureRange_SECTION 1 4588 #define U1_MDrv_PARFLASH_GetInfo_SECTION 1 4589 #define U1_MDrv_PARFLASH_GetLibVer_SECTION 1 4590 #define U1_MDrv_PARFLASH_GetStatus_SECTION 1 4591 #define U1_MDrv_PARFLASH_SetDbgLevel_SECTION 1 4592 #define U1_MDrv_PARFLASH_Init_SECTION 1 4593 #define U1_MDrv_PARFLASH_ChipSelect_SECTION 1 4594 #define U1_MDrv_PARFLASH_Reset_SECTION 1 4595 #define U1_MDrv_PARFLASH_ReadID_SECTION 1 4596 #define U1_MDrv_PARFLASH_SectorProtectVerify_SECTION 1 4597 #define U1_MDrv_PARFLASH_CFI_Read_SECTION 1 4598 #define U1_MDrv_PARFLASH_Read_SECTION 1 4599 #define U1_MDrv_PARFLASH_EraseChip_SECTION 1 4600 #define U1_MDrv_PARFLASH_EraseSec_SECTION 1 4601 #define U1_MDrv_PARFLASH_Write_SECTION 1 4602 #define U1_MDrv_PARFLASH_WriteCmdCycle_SECTION 1 4603 #define U1_MDrv_PARFLASH_GetSectorOffset_SECTION 1 4604 #define U1_MDrv_PARFLASH_GetSectorSize_SECTION 1 4605 #define U1_MDrv_PCMCIA_Init_SECTION 1 4606 #define U1_MDrv_PCMCIA_GetConfig_SECTION 1 4607 #define U1_MDrv_PCMCIA_SetPowerState_SECTION 1 4608 #define U1_MDrv_PCMCIA_PollingV2_SECTION 1 4609 #define U1_MDrv_PCMCIA_DetectV2_SECTION 1 4610 #define U1_MDrv_PCMCIA_Set_HW_ResetDuration_SECTION 1 4611 #define U1_MDrv_PCMCIA_ResetHW_V2_SECTION 1 4612 #define U1_MDrv_PCMCIA_ReadAttribMemV2_SECTION 1 4613 #define U1_MDrv_PCMCIA_ParseAttribMem_SECTION 1 4614 #define U1_MDrv_PCMCIA_WriteAttribMemV2_SECTION 1 4615 #define U1_MDrv_PCMCIA_WriteIOMemV2_SECTION 1 4616 #define U1_MDrv_PCMCIA_WriteIOMemLongV2_SECTION 1 4617 #define U1_MDrv_PCMCIA_ReadIOMemV2_SECTION 1 4618 #define U1_MDrv_PCMCIA_IsModuleStillPluggedV2_SECTION 1 4619 #define U1_MDrv_PCMCIA_Set_Detect_Trigger_SECTION 1 4620 #define U1_MDrv_PCMCIA_Set_Detect_Enable_SECTION 1 4621 #define U1_MDrv_PCMCIA_Get_CD_IntervalV2_SECTION 1 4622 #define U1_MDrv_PCMCIA_GetLibVer_SECTION 1 4623 #define U1_MDrv_PCMCIA_SetCommandBitV2_SECTION 1 4624 #define U1_MDrv_PCMCIA_ResetInterfaceV2_SECTION 1 4625 #define U1_MDrv_PCMCIA_IsDataAvailableV2_SECTION 1 4626 #define U1_MDrv_PCMCIA_ReadDataV2_SECTION 1 4627 #define U1_MDrv_PCMCIA_WriteDataV2_SECTION 1 4628 #define U1_MDrv_PCMCIA_SwitchToIOmodeV2_SECTION 1 4629 #define U1_MDrv_PCMCIA_NegotiateBufferSizeV2_SECTION 1 4630 #define U1_MDrv_PCMCIA_WriteBufferSizeV2_SECTION 1 4631 #define U1_MDrv_PCMCIA_WaitForStatusBitV2_SECTION 1 4632 #define U1_MDrv_PCMCIA_ReadyStatus_SECTION 1 4633 #define U1_MDrv_PCMCIA_Exit_SECTION 1 4634 #define U1_MDrv_PCMCIA_Enable_InterruptV2_SECTION 1 4635 #define U1_MDrv_PCMCIA_Set_InterruptStatusV2_SECTION 1 4636 #define U1_MDrv_PCMCIA_Get_InterruptStatusV2_SECTION 1 4637 #define U1_MDrv_PCMCIA_InstarllIsrCallbackV2_SECTION 1 4638 #define U1_MDrv_PCMCIA_Polling_SECTION 1 4639 #define U1_MDrv_PCMCIA_IsModuleStillPlugged_SECTION 1 4640 #define U1_MDrv_PCMCIA_SetCommandBit_SECTION 1 4641 #define U1_MDrv_PCMCIA_ResetInterface_SECTION 1 4642 #define U1_MDrv_PCMCIA_IsDataAvailable_SECTION 1 4643 #define U1_MDrv_PCMCIA_ReadData_SECTION 1 4644 #define U1_MDrv_PCMCIA_WriteData_SECTION 1 4645 #define U1_MDrv_PCMCIA_SwitchToIOmode_SECTION 1 4646 #define U1_MDrv_PCMCIA_NegotiateBufferSize_SECTION 1 4647 #define U1_MDrv_PCMCIA_WriteBufferSize_SECTION 1 4648 #define U1_MDrv_PCMCIA_WaitForStatusBit_SECTION 1 4649 #define U1_MDrv_PCMCIA_ResetHW_SECTION 1 4650 #define U1_MDrv_PCMCIA_WriteAttribMem_SECTION 1 4651 #define U1_MDrv_PCMCIA_ReadAttribMem_SECTION 1 4652 #define U1_MDrv_PCMCIA_WriteIOMem_SECTION 1 4653 #define U1_MDrv_PCMCIA_WriteIOMemLong_SECTION 1 4654 #define U1_MDrv_PCMCIA_ReadIOMem_SECTION 1 4655 #define U1_MDrv_PCMCIA_Get_CD_Interval_SECTION 1 4656 #define U1_MDrv_PCMCIA_Enable_Interrupt_SECTION 1 4657 #define U1_MDrv_PCMCIA_Set_InterruptStatus_SECTION 1 4658 #define U1_MDrv_PCMCIA_Get_InterruptStatus_SECTION 1 4659 #define U1_MDrv_PCMCIA_InstarllIsrCallback_SECTION 1 4660 #define U1_MDrv_PM_isRunning_SECTION 1 4661 #define U1_MDrv_PM_InterruptRequest_SECTION 1 4662 #define U1_MDrv_PM_LoadFw_SECTION 1 4663 #define U1_MDrv_PM_RegWrite_SECTION 1 4664 #define U1_MDrv_PM_RegRead_SECTION 1 4665 #define U1_MDrv_PM_RegWriteBit_SECTION 1 4666 #define U1_MDrv_PM_RegReadBit_SECTION 1 4667 #define U1_MDrv_PM_RegWrite2byte_SECTION 1 4668 #define U1_MDrv_PM_RegWrite3byte_SECTION 1 4669 #define U1_MDrv_PM_Control_SECTION 1 4670 #define U1_MDrv_PM_CtrlWrite_SECTION 1 4671 #define U1_MDrv_PM_CtrlRead_SECTION 1 4672 #define U1_MDrv_PM_MemoryWrite_SECTION 1 4673 #define U1_MDrv_PM_MemoryRead_SECTION 1 4674 #define U1_MDrv_PM_RTCEnableInterrupt_SECTION 1 4675 #define U1_MDrv_PM_RTC2EnableInterrupt_SECTION 1 4676 #define U1_MDrv_PM_RTC2SetMatchTime_SECTION 1 4677 #define U1_MDrv_PM_RTCSetMatchTime_SECTION 1 4678 #define U1_MDrv_PM_RTCGetMatchTime_SECTION 1 4679 #define U1_MDrv_PM_RTCSetSystemTime_SECTION 1 4680 #define U1_MDrv_PM_RTCGetSystemTime_SECTION 1 4681 #define U1_MDrv_PM_RTCInit_SECTION 1 4682 #define U1_MDrv_PM_IRInit_SECTION 1 4683 #define U1_MDrv_PM_KeypadInit_SECTION 1 4684 #define U1_MDrv_PM_CalibrateRC_SECTION 1 4685 #define U1_MDrv_PM_isDownloaded_SECTION 1 4686 #define U1_MDrv_PM_Set_Download_SECTION 1 4687 #define U1_MDrv_PM_IrqAttach_SECTION 1 4688 #define U1_MDrv_PM_IrqDetach_SECTION 1 4689 #define U1_MDrv_PM_IrqUnmask_SECTION 1 4690 #define U1_MDrv_PM_IrqMask_SECTION 1 4691 #define U1_MDrv_PM_IrqMaskAll_SECTION 1 4692 #define U1_MDrv_PM_ActiveStandbyMode_SECTION 1 4693 #define U1_MDrv_PM_IsActiveStandbyMode_SECTION 1 4694 #define U1_MDrv_PM_Init_SECTION 1 4695 #define U1_MDrv_PM_GetStatus_SECTION 1 4696 #define U1_MDrv_PM_GetLibVer_SECTION 1 4697 #define U1_MDrv_PM_PowerDown_SECTION 1 4698 #define U1_MDrv_PM_GetMasterKey_SECTION 1 4699 #define U1_MDrv_PM_GetDeviceID_SECTION 1 4700 #define U1_MDrv_PM_GetChipID_SECTION 1 4701 #define U1_MDrv_PM_GetPMMemAddr_SECTION 1 4702 #define U1_MDrv_PM_GetInfo_SECTION 1 4703 #define U1_MDrv_PM_GPIOInit_SECTION 1 4704 #define U1_MDrv_PM_SetDbgLevel_SECTION 1 4705 #define U1_MDrv_PM_RtcInit_SECTION 1 4706 #define U1_MDrv_PM_Rtc_DisableInit_SECTION 1 4707 #define U1_MDrv_PM_RtcSetCounter_SECTION 1 4708 #define U1_MDrv_PM_RtcGetCounter_SECTION 1 4709 #define U1_MDrv_PM_RtcSetMatchCounter_SECTION 1 4710 #define U1_MDrv_PM_RtcGetMatchCounter_SECTION 1 4711 #define U1_MDrv_PM_GetExtraSramData_SECTION 1 4712 #define U1_MDrv_PM_SetExtraSramData_SECTION 1 4713 #define U1_MDrv_PM_SetSPIOffsetForMCU_SECTION 1 4714 #define U1_MDrv_PM_SetSRAMOffsetForMCU_SECTION 1 4715 #define U1_MDrv_PM_SetDRAMOffsetForMCU_SECTION 1 4716 #define U1_MDrv_PM_PowerOnMode_SECTION 1 4717 #define U1_MDrv_PM_GetWakeupSource_SECTION 1 4718 #define U1_MDrv_PM_GetWakeupKey_SECTION 1 4719 #define U1_MDrv_PM_Disable51_SECTION 1 4720 #define U1_MDrv_PM_GPIO4_SetPower_SECTION 1 4721 #define U1_MDrv_PM_PWM_Init_SECTION 1 4722 #define U1_MDrv_PM_PWM_Config_SECTION 1 4723 #define U1_MDrv_PM_PWM_IRRecord_Init_SECTION 1 4724 #define U1_MDrv_PM_PWM_IRRecord_Receive_Complete_SECTION 1 4725 #define U1_MDrv_PM_PWM_IRRecord_Receive_Require_SECTION 1 4726 #define U1_MDrv_PM_PWM_IRRecord_Transmit_SECTION 1 4727 #define U1_MDrv_PM_PWM_IRRecord_SetCallBackFunction_SECTION 1 4728 #define U1_MDrv_PM_PWM_IRRecord_Receive_Exit_SECTION 1 4729 #define U1_MDrv_PM_RunTimePM_Disable_PassWord_SECTION 1 4730 #define U1_MDrv_PM_STR_CheckFactoryPowerOnModePassword_SECTION 1 4731 #define U1_MDrv_PM_STR_CheckFactoryPowerOnMode_Second_SECTION 1 4732 #define U1_MDrv_PM_Check_Version_SECTION 1 4733 #define U1_MDrv_PM_GetSRAMSize_SECTION 1 4734 #define U1_MDrv_PM_GetIRPowerOnKey_SECTION 1 4735 #define U1_MDrv_PM_GetRT51Status_SECTION 1 4736 #define U1_MDrv_PQ_MADiForceMotion_SECTION 1 4737 #define U1_MDrv_PQ_LoadFilmModeTable_SECTION 1 4738 #define U1_MDrv_PQ_LoadDynamicContrastTable_SECTION 1 4739 #define U1_MDrv_PQ_LoadNRTable_SECTION 1 4740 #define U1_MDrv_PQ_LoadMPEGNRTable_SECTION 1 4741 #define U1_MDrv_PQ_Load_ULTRACLEAR_Table_SECTION 1 4742 #define U1_MDrv_PQ_Load_XVYCC_Table_SECTION 1 4743 #define U1_MDrv_PQ_GRULE_Get_Support_Status_SECTION 1 4744 #define U1_MDrv_PQ_SetMemFormat_SECTION 1 4745 #define U1_MDrv_PQ_ReduceBW_ForOSD_SECTION 1 4746 #define U1_MDrv_PQ_Init_DisplayType_SECTION 1 4747 #define U1_MDrv_PQ_Set_DisplayType_SECTION 1 4748 #define U1_MDrv_PQ_GetMADiFromOSDBWGrule_SECTION 1 4749 #define U1_MDrv_PQ_GetMADiInGeneral_SECTION 1 4750 #define U1_MDrv_PQ_LoadPTPTable_SECTION 1 4751 #define U1_MDrv_PQ_Check_PointToPoint_Condition_SECTION 1 4752 #define U1_MDrv_PQ_SetPostCCSOnOff_SECTION 1 4753 #define U1_MDrv_PQ_AdaptiveTuning_SECTION 1 4754 #define U1_MDrv_PQ_FilmMode_AnyCandence_Enable_SECTION 1 4755 #define U1_MDrv_BW_LoadTableByContext_SECTION 1 4756 #define U1_MDrv_BW_LoadInitTable_SECTION 1 4757 #define U1_MDrv_PQ_SetH264_OnOff_SECTION 1 4758 #define U1_MDrv_PQ_SetG3D_OnOff_SECTION 1 4759 #define U1_MDrv_PQ_SetMVC4kx1k_OnOff_SECTION 1 4760 #define U1_MDrv_PQ_SetNetworkMM_OnOff_SECTION 1 4761 #define U1_MDrv_PQ_SetMM_OnOff_SECTION 1 4762 #define U1_MDrv_PQ_SetRmvb_OnOff_SECTION 1 4763 #define U1_MDrv_PQ_SetVIPBypass_OnOff_SECTION 1 4764 #define U1_MDrv_PQ_SetPeaking_OnOff_SECTION 1 4765 #define U1_MDrv_PQ_SetFakeOutEnable_SECTION 1 4766 #define U1_MDrv_BW_resetToDefault_SECTION 1 4767 #define U1_MDrv_BW_CusMode_LoadTable_SECTION 1 4768 #define U1_MDrv_PQ_GetLibVer_SECTION 1 4769 #define U1_MDrv_PQ_GetInfo_SECTION 1 4770 #define U1_MDrv_PQ_GetStatus_SECTION 1 4771 #define U1_MDrv_PQ_SetDbgLevel_SECTION 1 4772 #define U1_MDrv_PQ_Init_SECTION 1 4773 #define U1_MDrv_PQ_GetConfig_SECTION 1 4774 #define U1_MDrv_PQ_Exit_SECTION 1 4775 #define U1_MDrv_PQ_DesideSrcType_SECTION 1 4776 #define U1_MDrv_PQ_GetSrcType_SECTION 1 4777 #define U1_MDrv_PQ_GetDelayTime_SECTION 1 4778 #define U1_MDrv_PQ_GetQmapExecutor_SECTION 1 4779 #define U1_MDrv_PQ_GetInputSourceType_SECTION 1 4780 #define U1_MDrv_PQ_SetColorRange_SECTION 1 4781 #define U1_MDrv_PQ_SetPhotoYUVStandard_SECTION 1 4782 #define U1_MDrv_PQ_SetCSC_SECTION 1 4783 #define U1_MDrv_PQ_Get_MemYUVFmt_SECTION 1 4784 #define U1_MDrv_PQ_LoadScalingTable_SECTION 1 4785 #define U1_MDrv_PQ_ReduceBW_ForPVR_SECTION 1 4786 #define U1_MDrv_PQ_EnableMADIForce_SECTION 1 4787 #define U1_MDrv_PQ_Set420upsampling_SECTION 1 4788 #define U1_MDrv_PQ_SetFilmMode_SECTION 1 4789 #define U1_MDrv_PQ_SetNonLinearScaling_SECTION 1 4790 #define U1_MDrv_PQ_CheckSettings_SECTION 1 4791 #define U1_MDrv_PQ_SkipDuplicatedSetting_SECTION 1 4792 #define U1_MDrv_PQ_GetSkipDuplicatedSettingStatus_SECTION 1 4793 #define U1_MDrv_PQ_LoadSettings_SECTION 1 4794 #define U1_MDrv_PQ_LoadCustomerSettings_SECTION 1 4795 #define U1_MDrv_PQ_LoadTable_SECTION 1 4796 #define U1_MDrv_PQ_CloneTable_SECTION 1 4797 #define U1_MDrv_PQ_LoadCustomerTable_SECTION 1 4798 #define U1_MDrv_PQ_GetIPNum_SECTION 1 4799 #define U1_MDrv_PQ_GetTableNum_SECTION 1 4800 #define U1_MDrv_PQ_GetCurrentTableIndex_SECTION 1 4801 #define U1_MDrv_PQ_3DCloneforPIP_SECTION 1 4802 #define U1_MDrv_PQ_DisableFilmMode_SECTION 1 4803 #define U1_MDrv_PQ_GetSrcTypeName_SECTION 1 4804 #define U1_MDrv_PQ_GetIPName_SECTION 1 4805 #define U1_MDrv_PQ_GetTableName_SECTION 1 4806 #define U1_MDrv_PQ_Set_DTVInfo_SECTION 1 4807 #define U1_MDrv_PQ_Set_MultiMediaInfo_SECTION 1 4808 #define U1_MDrv_PQ_Set_VDInfo_SECTION 1 4809 #define U1_MDrv_PQ_Set_ModeInfo_SECTION 1 4810 #define U1_MDrv_PQ_SetHDMIInfo_SECTION 1 4811 #define U1_MDrv_PQ_SetHDMI_PC_SECTION 1 4812 #define U1_MDrv_PQ_GetHDMI_PC_Status_SECTION 1 4813 #define U1_MDrv_PQ_MADiForceMotionY_SECTION 1 4814 #define U1_MDrv_PQ_MADiForceMotionC_SECTION 1 4815 #define U1_MDrv_PQ_SetRFblMode_SECTION 1 4816 #define U1_MDrv_PQ_GetRFblMode_SECTION 1 4817 #define U1_MDrv_PQ_Get_VDSampling_Info_SECTION 1 4818 #define U1_MDrv_PQ_IOCTL_SECTION 1 4819 #define U1_MDrv_PQ_Set_MLoadEn_SECTION 1 4820 #define U1_MDrv_PQ_Get_ADCSampling_Info_SECTION 1 4821 #define U1_MDrv_PQ_Set3D_OnOff_SECTION 1 4822 #define U1_MDrv_PQ_DisableUCFeature_SECTION 1 4823 #define U1_MDrv_PQ_SetUCFeature_SECTION 1 4824 #define U1_MDrv_PQ_GetCurrentUCFeature_SECTION 1 4825 #define U1_MDrv_PQ_SetDMSV12L_SECTION 1 4826 #define U1_MDrv_PQ_GetDMSV12LFromXRuleTable_SECTION 1 4827 #define U1_MDrv_PQ_GetCaps_SECTION 1 4828 #define U1_MDrv_PQ_SetDS_OnOFF_SECTION 1 4829 #define U1_MDRV_PQ_PrintLoadTableInfo_SECTION 1 4830 #define U1_MDrv_PQ_Get_RFBL_Info_SECTION 1 4831 #define U1_MDrv_PQ_CheckHDMode_SECTION 1 4832 #define U1_MDrv_PQ_Get_Interlace_SD_mode_SECTION 1 4833 #define U1_MDrv_PQ_SetDotByDotMode_SECTION 1 4834 #define U1_MDrv_PQ_Update_MemFormat_SECTION 1 4835 #define U1_MDrv_PQ_LOW_3dQuality_SECTION 1 4836 #define U1_MDrv_PQ_MWE_SetEnhanceQuality_SECTION 1 4837 #define U1_MDrv_PQ_MWE_RestoreEnhanceQuality_SECTION 1 4838 #define U1_MDrv_PQ_MWE_RestoreOffQuality_SECTION 1 4839 #define U1_MDrv_PQ_MWE_SetOffQuality_SECTION 1 4840 #define U1_MDrv_PQ_MWE_CloneWindow_SECTION 1 4841 #define U1_MDrv_PQ_3D_CloneWindow_SECTION 1 4842 #define U1_MDrv_PQ_3D_SettingForLBL_SECTION 1 4843 #define U1_MDrv_PQ_GetHsize_SECTION 1 4844 #define U1_MDrv_PQ_GetVsize_SECTION 1 4845 #define U1_MDrv_PQ_IsInterlace_SECTION 1 4846 #define U1_MDrv_PQ_SetSelectCSC_SECTION 1 4847 #define U1_MDrv_PQ_GetR2YEqSelect_SECTION 1 4848 #define U1_MDrv_PQ_Set_PointToPoint_SECTION 1 4849 #define U1_MDrv_PQ_GetVGASubCaseForceTo422Mode_SECTION 1 4850 #define U1_MDrv_PQ_SetDualViewState_SECTION 1 4851 #define U1_MDrv_PQ_GetDualViewState_SECTION 1 4852 #define U1_MDrv_PQ_ForceVideoInputMode_SECTION 1 4853 #define U1_MDrv_PQ_IsForceVideoInputMode_SECTION 1 4854 #define U1_MDrv_PQ_Get_PointToPoint_SECTION 1 4855 #define U1_MDrv_PQ_GetMemFmtInGeneral_SECTION 1 4856 #define U1_MDrv_PQ_GetMADiForRFBL_SECTION 1 4857 #define U1_MDrv_PQ_Patch2Rto4RForFieldPackingMode_SECTION 1 4858 #define U1_MDrv_PQ_GetBPPInfoFromMADi_SECTION 1 4859 #define U1_MDrv_PQ_ChangeMemConfigFor3D_SECTION 1 4860 #define U1_MDrv_PQ_ForceBPPForDynamicMemFmt_SECTION 1 4861 #define U1_MDrv_PQ_SuggestFrameNum_SECTION 1 4862 #define U1_MDrv_PQ_SetGameMode_SECTION 1 4863 #define U1_MDrv_PQ_EnableHDRMode_SECTION 1 4864 #define U1_MDrv_PQ_GetGameMode_Status_SECTION 1 4865 #define U1_MDrv_PQ_SetBypassMode_SECTION 1 4866 #define U1_MDrv_PQ_GetBypassModeStatus_SECTION 1 4867 #define U1_MDrv_PQ_GetVersion_SECTION 1 4868 #define U1_MDrv_PQ_Cus_GetVersion_SECTION 1 4869 #define U1_MDrv_PQ_GetTableIndex_SECTION 1 4870 #define U1_MDrv_PQ_GetCustomerTableIndex_SECTION 1 4871 #define U1_MDrv_PQ_SetGRuleStatus_SECTION 1 4872 #define U1_MDrv_PQ_GetGRule_LvlNum_SECTION 1 4873 #define U1_MDrv_PQ_GetGRule_GRuleNum_SECTION 1 4874 #define U1_MDrv_PQ_GetGRule_LevelIndex_SECTION 1 4875 #define U1_MDrv_PQ_GetGRule_IPIndex_SECTION 1 4876 #define U1_MDrv_PQ_GetCustomerGRule_IPIndex_SECTION 1 4877 #define U1_MDrv_PQ_GetGRule_TableIndex_SECTION 1 4878 #define U1_MDrv_PQ_GetGRule_CustomerTableIndex_SECTION 1 4879 #define U1_MDrv_PQ_SetPowerState_SECTION 1 4880 #define U1_MDrv_PQ_Set_xvYCC_MatrixCoefficient_SECTION 1 4881 #define U1_MDrv_PQ_Set_xvYCC_MatrixEnable_SECTION 1 4882 #define U1_MDrv_PQ_GetTableIndex_Ex_SECTION 1 4883 #define U1_MDrv_PQ_LoadTable_Ex_SECTION 1 4884 #define U1_MDrv_PQ_Demo_CloneWindow_SECTION 1 4885 #define U1_MDrv_PQ_GetGRule_LvlNum_Ex_SECTION 1 4886 #define U1_MDrv_PQ_GetGRule_LevelIndex_Ex_SECTION 1 4887 #define U1_MDrv_PQ_GetGRule_IPIndex_Ex_SECTION 1 4888 #define U1_MDrv_PQ_GetGRule_TableIndex_Ex_SECTION 1 4889 #define U1_MDrv_PQ_Up_Layer_Set_Config_SECTION 1 4890 #define U1_MDrv_PQ_EnableScalerGamma_SECTION 1 4891 #define U1_MDrv_PQ_SetGammaTbl_SECTION 1 4892 #define U1_MDrv_PQ_Ex_GetVersion_SECTION 1 4893 #define U1_MDrv_PQ_GetAdaptiveVersion_SECTION 1 4894 #define U1_MDrv_PQ_LoadUFSCSettings_SECTION 1 4895 #define U1_MDrv_PQ_LoadCFSettings_SECTION 1 4896 #define U1_MDrv_PQ_Get_DNR_Whole_Reg_SECTION 1 4897 #define U1_MDrv_PQ_SetP2pForceToDoCsc_SECTION 1 4898 #define U1_MDrv_PQ_SetOutputColorFormat_SECTION 1 4899 #define U1_MDrv_PQ_GetPQPathStatus_SECTION 1 4900 #define U1_MDrv_PQ_SetPQBinPath_SECTION 1 4901 #define U1_MDrv_PQ_Load_HDR_Table_SECTION 1 4902 #define U1_MDrv_PQ_Load_MWEType_Table_SECTION 1 4903 #define U1_MDrv_PQ_Load_ColorHue_Table_SECTION 1 4904 #define U1_MDrv_PVR_IframeLUT_Init_SECTION 1 4905 #define U1_MDrv_PVR_IframeLUT_Open_SECTION 1 4906 #define U1_MDrv_PVR_IframeLUT_SetVdecType_SECTION 1 4907 #define U1_MDrv_PVR_IframeLUT_GetWritePtr_SECTION 1 4908 #define U1_MDrv_PVR_IframeLUT_Close_SECTION 1 4909 #define U1_MDrv_PVR_IframeLUT_Exit_SECTION 1 4910 #define U1_MDrv_PM_PWM_Enable_SECTION 1 4911 #define U1_MDrv_PM_PWM_Period_SECTION 1 4912 #define U1_MDrv_PM_PWM_DutyCycle_SECTION 1 4913 #define U1_MDrv_PM_PWM_Div_SECTION 1 4914 #define U1_MDrv_PM_PWM_Polarity_SECTION 1 4915 #define U1_MDrv_PM_PWM_Dben_SECTION 1 4916 #define U1_MDrv_PWM_SetPowerState_SECTION 1 4917 #define U1_MDrv_PWM_GetLibVer_SECTION 1 4918 #define U1_MDrv_PWM_GetStatus_SECTION 1 4919 #define U1_MDrv_PWM_Init_SECTION 1 4920 #define U1_MDrv_PWM_Oen_SECTION 1 4921 #define U1_MDrv_PWM_Period_SECTION 1 4922 #define U1_MDrv_PWM_GetProperty_SECTION 1 4923 #define U1_MDrv_PWM_DutyCycle_SECTION 1 4924 #define U1_MDrv_PWM_UnitDiv_SECTION 1 4925 #define U1_MDrv_PWM_Div_SECTION 1 4926 #define U1_MDrv_PWM_Polarity_SECTION 1 4927 #define U1_MDrv_PWM_Vdben_SECTION 1 4928 #define U1_MDrv_PWM_ResetEn_SECTION 1 4929 #define U1_MDrv_PWM_Dben_SECTION 1 4930 #define U1_MDrv_PWM_IMPULSE_EN_SECTION 1 4931 #define U1_MDrv_PWM_ODDEVEN_SYNC_SECTION 1 4932 #define U1_MDrv_PWM_RstMux_SECTION 1 4933 #define U1_MDrv_PWM_RstCnt_SECTION 1 4934 #define U1_MDrv_PWM_BypassUnit_SECTION 1 4935 #define U1_MDrv_PWM01_CntMode_SECTION 1 4936 #define U1_MDrv_PWM23_CntMode_SECTION 1 4937 #define U1_MDrv_PWM67_CntMode_SECTION 1 4938 #define U1_MDrv_PWM_Shift_SECTION 1 4939 #define U1_MDrv_PWM_Nvsync_SECTION 1 4940 #define U1_MDrv_PWM_Align_SECTION 1 4941 #define U1_MDrv_PWM_Set3DMode_SECTION 1 4942 #define U1_MDrv_PWM_SetDbgLevel_SECTION 1 4943 #define U1_MDrv_PWM_INV_3D_Flag_SECTION 1 4944 #define U1_MDrv_PWM_3D_LR_Sync_SECTION 1 4945 #define U1_MDrv_PWS_GetLibVer_SECTION 1 4946 #define U1_MDrv_PWS_SetDbgLevel_SECTION 1 4947 #define U1_MDrv_PWS_GetInfo_SECTION 1 4948 #define U1_MDrv_PWS_GetStatus_SECTION 1 4949 #define U1_MDrv_PWS_GetSourceInfo_SECTION 1 4950 #define U1_MDrv_PWS_Read2Byte_SECTION 1 4951 #define U1_MDrv_PWS_IpPowerControl_SECTION 1 4952 #define U1_MDrv_PWS_ScenePowerControl_SECTION 1 4953 #define U1_MDrv_PWS_Init_SECTION 1 4954 #define U1_MDrv_PWS_HandleSource_SECTION 1 4955 #define U1_MDrv_PWS_HandleIP_SECTION 1 4956 #define U1_MDrv_PWS_RegisterCallback_SECTION 1 4957 #define U1_MDrv_PWS_CancelCallback_SECTION 1 4958 #define U1_MDrv_PWS_SetPowerState_SECTION 1 4959 #define U1_PWSRegisterToUtopia_SECTION 1 4960 #define U1_PWSOpen_SECTION 1 4961 #define U1_PWSClose_SECTION 1 4962 #define U1_PWSIoctl_SECTION 1 4963 #define U1_MDrv_RASP_InitLibResource_SECTION 1 4964 #define U1_MDrv_RASP_Init_SECTION 1 4965 #define U1_MDrv_RASP_Exit_SECTION 1 4966 #define U1_MDrv_RASP_Reset_SECTION 1 4967 #define U1_MDrv_RASP_Alive_SECTION 1 4968 #define U1_MDrv_RASP_ReplacePackets_SECTION 1 4969 #define U1_MDrv_RASP_Confi_SECTION 1 4970 #define U1_MDrv_RASP_PVR_SetTSIF_SECTION 1 4971 #define U1_MDrv_RASP_PVR_GetTSIFStatus_SECTION 1 4972 #define U1_MDrv_RASP_PVR_FileinEnable_SECTION 1 4973 #define U1_MDrv_RASP_PVR_GetFileinEnable_SECTION 1 4974 #define U1_MDrv_RASP_GetCap_SECTION 1 4975 #define U1_MDrv_RASP_GetLibVer_SECTION 1 4976 #define U1_MDrv_RASP_GetTimerAndPacketNum_SECTION 1 4977 #define U1_MDrv_RASP_GetTsPayload_SECTION 1 4978 #define U1_MDrv_RASP_GetEventMask_SECTION 1 4979 #define U1_MDrv_RASP_PVR_SetBuffer_SECTION 1 4980 #define U1_MDrv_RASP_PVR_Start_SECTION 1 4981 #define U1_MDrv_RASP_PVR_Pause_SECTION 1 4982 #define U1_MDrv_RASP_PVR_GetWriteAddr_SECTION 1 4983 #define U1_MDrv_RASP_PVR_Notify_SECTION 1 4984 #define U1_MDrv_RASP_PVR_SetPacketMode_SECTION 1 4985 #define U1_MDrv_RASP_PVR_TimeStampSetRecordStamp_SECTION 1 4986 #define U1_MDrv_RASP_PVR_TimeStampGetRecordStamp_SECTION 1 4987 #define U1_MDrv_RASP_PVR_TimeStampSelRecordStampSrc_SECTION 1 4988 #define U1_MDrv_RASP_PVR_AllocFlt_SECTION 1 4989 #define U1_MDrv_RASP_PVR_SetPid_SECTION 1 4990 #define U1_MDrv_RASP_PVR_GetPid_SECTION 1 4991 #define U1_MDrv_RASP_PVR_ReleaseFlt_SECTION 1 4992 #define U1_MDrv_RASP_PVR_AttachInterrupt_SECTION 1 4993 #define U1_MDrv_RASP_PVR_EnableInterrupt_SECTION 1 4994 #define U1_MDrv_RASP_PVR_CallbackSize_SECTION 1 4995 #define U1_MDrv_RASP_SetEvent_SECTION 1 4996 #define U1_MDrv_RASP_SetPayload_SECTION 1 4997 #define U1_MDrv_RASP_SetDataSwap_SECTION 1 4998 #define U1_MDrv_PROC_RASP_PVR_SizeMet_SECTION 1 4999 #define U1_MDrv_RASP_CallbackIntCheck_SECTION 1 5000 #define U1_MDrv_RASP_CallbackIntClr_SECTION 1 5001 #define U1_MDrv_RTC_Init_SECTION 1 5002 #define U1_MDrv_RTC_GetCount_SECTION 1 5003 #define U1_MDrv_RTC_DeInit_SECTION 1 5004 #define U1_RTCRegisterToUtopia_SECTION 1 5005 #define U1_RTCOpen_SECTION 1 5006 #define U1_RTCClose_SECTION 1 5007 #define U1_RTCIoctl_SECTION 1 5008 #define U1_MDrv_RTC_SetPowerState_SECTION 1 5009 #define U1_MDrv_RVD_SetBBU_OffsetLength_SECTION 1 5010 #define U1_MDrv_RVD_GetQmemSwBbuVacancy_SECTION 1 5011 #define U1_MDrv_RVD_GetFrameSize_SECTION 1 5012 #define U1_MDrv_RVD_GetBBUStartAddr_SECTION 1 5013 #define U1_MDrv_RVD_GetTimeStamp_SECTION 1 5014 #define U1_MDrv_RVD_GetDecodeCnt_SECTION 1 5015 #define U1_MDrv_RVD_SetBBUDepth_SECTION 1 5016 #define U1_MDrv_RVD_SetBBUReadPtr_SECTION 1 5017 #define U1_MDrv_RVD_SetBBUWritePtr_SECTION 1 5018 #define U1_MDrv_RVD_GetBBUReadPtr_SECTION 1 5019 #define U1_MDrv_RVD_GetBBUWritePtr_SECTION 1 5020 #define U1_MDrv_RVD_GetBBUDepth_SECTION 1 5021 #define U1_MDrv_RVD_SetPictureSize_SECTION 1 5022 #define U1_MDrv_RVD_SetDisplay_SECTION 1 5023 #define U1_MDrv_RVD_PushBBU_SECTION 1 5024 #define U1_MDrv_RVD_SetFileInfo_SECTION 1 5025 #define U1_MDrv_RVD_Init_SECTION 1 5026 #define U1_MDrv_RVD_EnableDynamicScaling_SECTION 1 5027 #define U1_MDrv_RVD_SetVirtualBox_SECTION 1 5028 #define U1_MDrv_RVD_SetDynScalingParam_SECTION 1 5029 #define U1_MDrv_RVD_FlushQueue_SECTION 1 5030 #define U1_MDrv_RVD_GetESReadPtr_SECTION 1 5031 #define U1_MDrv_RVD_ReadSVDProgramCounter_SECTION 1 5032 #define U1_MDrv_RVD_ChkCmdRdy_SECTION 1 5033 #define U1_MDrv_RVD_SetCmd_SECTION 1 5034 #define U1_MDrv_RVD_SetSpeed_SECTION 1 5035 #define U1_MDrv_RVD_IsDbgEnable_SECTION 1 5036 #define U1_MDrv_RVD_GetDbgLevel_SECTION 1 5037 #define U1_MDrv_RVD_SetDbgLevel_SECTION 1 5038 #define U1_MDrv_RVD_SetCfg_SECTION 1 5039 #define U1_MDrv_RVD_SetOSRegBase_SECTION 1 5040 #define U1_MDrv_RVD_GetFrameCnt_SECTION 1 5041 #define U1_MDrv_RVD_GetESWritePtr_SECTION 1 5042 #define U1_MDrv_RVD_CheckDispInfoRdy_SECTION 1 5043 #define U1_MDrv_RVD_CheckCaps_SECTION 1 5044 #define U1_MDrv_RVD_IsTSPlaying_SECTION 1 5045 #define U1_MDrv_RVD_SetTrickMode_SECTION 1 5046 #define U1_MDrv_RVD_Play_SECTION 1 5047 #define U1_MDrv_RVD_AVSyncOn_SECTION 1 5048 #define U1_MDrv_RVD_IsAVSyncOn_SECTION 1 5049 #define U1_MDrv_RVD_Pause_SECTION 1 5050 #define U1_MDrv_RVD_Exit_SECTION 1 5051 #define U1_MDrv_RVD_Resume_SECTION 1 5052 #define U1_MDrv_RVD_EnableLastFrameShowed_SECTION 1 5053 #define U1_MDrv_RVD_StepPlay_SECTION 1 5054 #define U1_MDrv_RVD_IsStepPlayDone_SECTION 1 5055 #define U1_MDrv_RVD_IsIdle_SECTION 1 5056 #define U1_MDrv_RVD_IsDispFinish_SECTION 1 5057 #define U1_MDrv_RVD_IsIFrameFound_SECTION 1 5058 #define U1_MDrv_RVD_GetErrCode_SECTION 1 5059 #define U1_MDrv_RVD_DbgGetData_SECTION 1 5060 #define U1_MDrv_RVD_GetLibVer_SECTION 1 5061 #define U1_MDrv_RVD_DispSetupDone_SECTION 1 5062 #define U1_MDrv_RVD_GetDispInfo_SECTION 1 5063 #define U1_MDrv_RVD_GetStatus_SECTION 1 5064 #define U1_MDrv_RVD_SetBBU_ID_SECTION 1 5065 #define U1_MDrv_RVD_GetInfo_SECTION 1 5066 #define U1_MDrv_RVD_GetIDReadPtr_SECTION 1 5067 #define U1_MDrv_RVD_GetIDWritePtr_SECTION 1 5068 #define U1_MDrv_RVD_SetIDWritePtr_SECTION 1 5069 #define U1_MDrv_RVD_SetIDReadPtr_SECTION 1 5070 #define U1_MDrv_RVD_GetFrameInfo_SECTION 1 5071 #define U1_MDrv_RVD_SetForceISR_SECTION 1 5072 #define U1_MDrv_RVD_GetISRInfo_SECTION 1 5073 #define U1_MDrv_RVD_SetEnableISR_SECTION 1 5074 #define U1_MDrv_RVD_SetISREvent_SECTION 1 5075 #define U1_MDrv_RVD_SetDispRepeatCnt_SECTION 1 5076 #define U1_MDrv_RVD_JumpToPTS_SECTION 1 5077 #define U1_MDrv_RVD_SkipToPTS_SECTION 1 5078 #define U1_MDrv_RVD_GetTrickMode_SECTION 1 5079 #define U1_MDrv_RVD_IsStepDecodeDone_SECTION 1 5080 #define U1_MDrv_RVD_StepDecode_SECTION 1 5081 #define U1_MDrv_RVD_Rst_SECTION 1 5082 #define U1_MDrv_RVD_SetFreezeImg_SECTION 1 5083 #define U1_MDrv_RVD_SetBlueScreen_SECTION 1 5084 #define U1_MDrv_RVD_FireDecCmd_SECTION 1 5085 #define U1_MDrv_RVD_Is1stFrameRdy_SECTION 1 5086 #define U1_MDrv_RVD_GetDecErrCnt_SECTION 1 5087 #define U1_MDrv_RVD_GetDataErrCnt_SECTION 1 5088 #define U1_MDrv_RVD_GetSkipCnt_SECTION 1 5089 #define U1_MDrv_RVD_GetDropCnt_SECTION 1 5090 #define U1_MDrv_RVD_GetDispQueNum_SECTION 1 5091 #define U1_MDrv_RVD_DbgSetCmd_SECTION 1 5092 #define U1_MDrv_RVD_DbgSetData_SECTION 1 5093 #define U1_MDrv_RVD_Dump_Status_SECTION 1 5094 #define U1_MDrv_RVD_EnableTurboFWMode_SECTION 1 5095 #define U1_MDrv_RVD_SetAVSyncFreerunThreshold_SECTION 1 5096 #define U1_MDrv_SAR_Init_SECTION 1 5097 #define U1_MDrv_SAR_Config_SECTION 1 5098 #define U1_MDrv_SAR_GetKeyCode_SECTION 1 5099 #define U1_MDrv_SAR_SetCallback_SECTION 1 5100 #define U1_MDrv_SAR_GetCallback_SECTION 1 5101 #define U1_MDrv_SAR_GetLibVer_SECTION 1 5102 #define U1_MDrv_SAR_GetStatus_SECTION 1 5103 #define U1_MDrv_SAR_Enable_SECTION 1 5104 #define U1_MDrv_SAR_GetInfo_SECTION 1 5105 #define U1_MDrv_SAR_SetDbgLevel_SECTION 1 5106 #define U1_MDrv_SAR_Kpd_Init_SECTION 1 5107 #define U1_MDrv_SAR_Kpd_SetChInfo_SECTION 1 5108 #define U1_MDrv_SAR_Kpd_GetKeyCode_SECTION 1 5109 #define U1_MDrv_SAR_Kpd_GetMultiKeyCode_SECTION 1 5110 #define U1_MDrv_SAR_Kpd_GetStatus_SECTION 1 5111 #define U1_MDrv_SAR_Kpd_GetInfo_SECTION 1 5112 #define U1_MDrv_SAR_Kpd_SetDbgLevel_SECTION 1 5113 #define U1_MDrv_SAR_Adc_Config_SECTION 1 5114 #define U1_MDrv_SAR_Adc_GetValue_SECTION 1 5115 #define U1_MDrv_SAR_Adc_SetHSyncChEn_SECTION 1 5116 #define U1_MDrv_SAR_Adc_SetHSyncCh_SECTION 1 5117 #define U1_MDrv_SAR_Adc_SetDbgLevel_SECTION 1 5118 #define U1_MDrv_SAR_Gpio_CfgDir_SECTION 1 5119 #define U1_MDrv_SAR_Gpio_SetOutput_SECTION 1 5120 #define U1_MDrv_SAR_Gpio_GetInput_SECTION 1 5121 #define U1_MDrv_SAR_Gpio_SetDbgLevel_SECTION 1 5122 #define U1_MDrv_SAR_CfgInterrupt_SECTION 1 5123 #define U1_MDrv_SAR_CfgPMWakeup_SECTION 1 5124 #define U1_MDrv_SAR_ClearInterrupt_SECTION 1 5125 #define U1_MDrv_SAR_GetInterruptStatus_SECTION 1 5126 #define U1_MDrv_SAR_Kpd_MMIO_Init_SECTION 1 5127 #define U1_MDrv_SAR_Kpd_CfgChannelBound_SECTION 1 5128 #define U1_MDrv_SAR_SetLevel_SECTION 1 5129 #define U1_MDrv_SAR_SetPowerState_SECTION 1 5130 #define U1_MDrv_TSensor_GetTemperatureRange_SECTION 1 5131 #define U1_MDrv_TSensor_GetTemperature_SECTION 1 5132 #define U1_MDrv_TSensor_Init_SECTION 1 5133 #define U1_MDrv_TSensor_SetTemperatureMointerRange_SECTION 1 5134 #define U1_MDrv_TSensorIRQClear_SECTION 1 5135 #define U1_MDrv_SC_Init_SECTION 1 5136 #define U1_MDrv_SC_Open_SECTION 1 5137 #define U1_MDrv_SC_Config_SECTION 1 5138 #define U1_MDrv_SC_Close_SECTION 1 5139 #define U1_MDrv_SC_Reset_SECTION 1 5140 #define U1_MDrv_SC_Activate_SECTION 1 5141 #define U1_MDrv_SC_Deactivate_SECTION 1 5142 #define U1_MDrv_SC_Reset_ATR_SECTION 1 5143 #define U1_MDrv_SC_PPS_SECTION 1 5144 #define U1_MDrv_SC_Send_SECTION 1 5145 #define U1_MDrv_SC_Recv_SECTION 1 5146 #define U1_MDrv_SC_T0_SendRecv_SECTION 1 5147 #define U1_MDrv_SC_T1_SendRecv_SECTION 1 5148 #define U1_MDrv_SC_T14_SendRecv_SECTION 1 5149 #define U1_MDrv_SC_Exit_SECTION 1 5150 #define U1_MDrv_SC_GetATR_SECTION 1 5151 #define U1_MDrv_SC_GetInfo_SECTION 1 5152 #define U1_MDrv_SC_GetLibVer_SECTION 1 5153 #define U1_MDrv_SC_GetStatus_SECTION 1 5154 #define U1_MDrv_SC_SetDbgLevel_SECTION 1 5155 #define U1_MDrv_SC_SetPPS_SECTION 1 5156 #define U1_MDrv_SC_ClearState_SECTION 1 5157 #define U1_MDrv_SC_PowerOff_SECTION 1 5158 #define U1_MDrv_SC_SetGuardTime_SECTION 1 5159 #define U1_MDrv_SC_Task_Proc_SECTION 1 5160 #define U1_MDrv_SC_ISR_Proc_SECTION 1 5161 #define U1_MDrv_SC_RawExchange_SECTION 1 5162 #define U1_MDrv_SC_RawExchangeTimeout_SECTION 1 5163 #define U1_MDrv_SC_SetBuffAddr_SECTION 1 5164 #define U1_MDrv_SC_CardVoltage_Config_SECTION 1 5165 #define U1_MDrv_SC_EnableTimeout_SECTION 1 5166 #define U1_MDrv_SC_SetPowerState_SECTION 1 5167 #define U1_MDrv_SEAL_Init_SECTION 1 5168 #define U1_MDrv_Seal_SecureRangeSet_SECTION 1 5169 #define U1_MDrv_Seal_SecureRangeQuery_SECTION 1 5170 #define U1_MDrv_Seal_IMI_RangeSet_SECTION 1 5171 #define U1_MDrv_Seal_GetHittedInfo_SECTION 1 5172 #define U1_MDrv_Seal_SecureRangeLock_SECTION 1 5173 #define U1_MDrv_Seal_NonSecureProcessorSet_SECTION 1 5174 #define U1_MDrv_Seal_NonSecureProcessorQuery_SECTION 1 5175 #define U1_MDrv_Seal_SecureSlaveSet_SECTION 1 5176 #define U1_MDrv_Seal_SecureSlaveQuery_SECTION 1 5177 #define U1_MDrv_Seal_SecureMasterSet_SECTION 1 5178 #define U1_MDrv_Seal_SecureMasterQuery_SECTION 1 5179 #define U1_MDrv_Seal_SetPowerState_SECTION 1 5180 #define U1_MDrv_Seal_BufferLock_SECTION 1 5181 #define U1_MDrv_Seal_ENInterrupt_SECTION 1 5182 #define U1_MDrv_Seal_AttachCallbackFunc_SECTION 1 5183 #define U1_MDrv_Seal_DispatchCallbackFunc_SECTION 1 5184 #define U1_MDrv_SEM_Init_SECTION 1 5185 #define U1_MDrv_SEM_Get_Resource_SECTION 1 5186 #define U1_MDrv_SEM_Free_Resource_SECTION 1 5187 #define U1_MDrv_SEM_Reset_Resource_SECTION 1 5188 #define U1_MDrv_SEM_Get_ResourceID_SECTION 1 5189 #define U1_MDrv_SEM_Get_Num_SECTION 1 5190 #define U1_MDrv_SEM_GetLibVer_SECTION 1 5191 #define U1_MDrv_SEM_SetPowerState_SECTION 1 5192 #define U1_MDrv_SEM_Lock_SECTION 1 5193 #define U1_MDrv_SEM_Unlock_SECTION 1 5194 #define U1_MDrv_SEM_Delete_SECTION 1 5195 #define U1_MDrv_SEM_SetDbgLevel_SECTION 1 5196 #define U1_MDrv_SERFLASH_GetInfo_SECTION 1 5197 #define U1_MDrv_SERFLASH_GetLibVer_SECTION 1 5198 #define U1_MDrv_SERFLASH_GetStatus_SECTION 1 5199 #define U1_MDrv_SERFLASH_SetDbgLevel_SECTION 1 5200 #define U1_MDrv_SERFLASH_SetWPInfo_SECTION 1 5201 #define U1_MDrv_SERFLASH_SetMcuCSCallBack_SECTION 1 5202 #define U1_MDrv_SERFLASH_SetFlashWPCallBack_SECTION 1 5203 #define U1_MDrv_SERFLASH_DetectType_SECTION 1 5204 #define U1_MDrv_SERFLASH_DetectSize_SECTION 1 5205 #define U1_MDrv_SERFLASH_Set2XRead_SECTION 1 5206 #define U1_MDrv_SERFLASH_SetCKG_SECTION 1 5207 #define U1_MDrv_SERFLASH_ClkDiv_SECTION 1 5208 #define U1_MDrv_SERFLASH_SetMode_SECTION 1 5209 #define U1_MDrv_SERFLASH_ReadUID_SECTION 1 5210 #define U1_MDrv_SERFLASH_ChipSelect_SECTION 1 5211 #define U1_MDrv_SERFLASH_Init_SECTION 1 5212 #define U1_MDrv_SERFLASH_ReadID_SECTION 1 5213 #define U1_MDrv_SERFLASH_Read_SECTION 1 5214 #define U1_MDrv_SERFLASH_EraseChip_SECTION 1 5215 #define U1_MDrv_SERFLASH_AddressToBlock_SECTION 1 5216 #define U1_MDrv_SERFLASH_BlockToAddress_SECTION 1 5217 #define U1_MDrv_SERFLASH_AddressErase_SECTION 1 5218 #define U1_MDrv_SERFLASH_BlockErase_SECTION 1 5219 #define U1_MDrv_SERFLASH_SectorErase_SECTION 1 5220 #define U1_MDrv_SERFLASH_CheckWriteDone_SECTION 1 5221 #define U1_MDrv_SERFLASH_Write_SECTION 1 5222 #define U1_MDrv_SERFLASH_DMA_SECTION 1 5223 #define U1_MDrv_SERFLASH_WriteProtect_SECTION 1 5224 #define U1_MDrv_SERFLASH_WriteProtect_Enable_All_Range_SECTION 1 5225 #define U1_MDrv_SERFLASH_WriteProtect_Disable_All_Range_SECTION 1 5226 #define U1_MDrv_SERFLASH_WriteProtect_Disable_Range_Set_SECTION 1 5227 #define U1_MDrv_SERFLASH_WriteProtect_Area_SECTION 1 5228 #define U1_MDrv_SERFLASH_ReadStatusRegister_SECTION 1 5229 #define U1_MDrv_SERFLASH_ReadStatusRegister2_SECTION 1 5230 #define U1_MDrv_SERFLASH_WriteStatusRegister_SECTION 1 5231 #define U1_MDrv_SERFLASH_CopyHnd_SECTION 1 5232 #define U1_MDrv_SERFLASH_SetGPIO_SECTION 1 5233 #define U1_MDrv_SERFLASH_WriteProtect_Area_Lookup_SECTION 1 5234 #define U1_MDrv_SERFLASH_WriteProtect_Area_Boundary_SECTION 1 5235 #define U1_MDrv_FLASH_Write_SECTION 1 5236 #define U1_MDrv_FLASH_Read_SECTION 1 5237 #define U1_MDrv_FLASH_WriteProtect_SECTION 1 5238 #define U1_MDrv_FLASH_WriteProtect_Enable_All_Range_SECTION 1 5239 #define U1_MDrv_FLASH_WriteProtect_Disable_All_Range_SECTION 1 5240 #define U1_MDrv_FLASH_WriteProtect_Disable_Range_Set_SECTION 1 5241 #define U1_MDrv_FLASH_WriteProtect_Area_SECTION 1 5242 #define U1_MDrv_FLASH_ReadStatusRegister_SECTION 1 5243 #define U1_MDrv_FLASH_ReadStatusRegister2_SECTION 1 5244 #define U1_MDrv_FLASH_WriteStatusRegister_SECTION 1 5245 #define U1_MDrv_FLASH_DetectType_SECTION 1 5246 #define U1_MDrv_FLASH_DetectSize_SECTION 1 5247 #define U1_MDrv_FLASH_AddressToBlock_SECTION 1 5248 #define U1_MDrv_FLASH_BlockToAddress_SECTION 1 5249 #define U1_MDrv_FLASH_AddressErase_SECTION 1 5250 #define U1_MDrv_FLASH_BlockErase_SECTION 1 5251 #define U1_MDrv_FLASH_CheckWriteDone_SECTION 1 5252 #define U1_MDrv_FSP_WriteData_SECTION 1 5253 #define U1_MDrv_FSP_ReadData_SECTION 1 5254 #define U1_MDrv_FSP_BlockErase_SECTION 1 5255 #define U1_MDrv_FSP_AddressErase_SECTION 1 5256 #define U1_MDrv_SERFLASH_SetPowerState_SECTION 1 5257 #define U1_MDrv_SMBX_Init_SECTION 1 5258 #define U1_MDrv_SMBX_SendCmd_SECTION 1 5259 #define U1_MDrv_SMBX_Exit_SECTION 1 5260 #define U1_MDrv_SMBX_GetLibVer_SECTION 1 5261 #define U1_MDrv_SYS_Init_SECTION 1 5262 #define U1_MDrv_SYS_GlobalInit_SECTION 1 5263 #define U1_MDrv_SYS_GetInfo_SECTION 1 5264 #define U1_MDrv_SYS_GetChipRev_SECTION 1 5265 #define U1_MDrv_SYS_GetChipID_SECTION 1 5266 #define U1_MDrv_SYS_WDTEnable_SECTION 1 5267 #define U1_MDrv_SYS_WDTClear_SECTION 1 5268 #define U1_MDrv_SYS_WDTLastStatus_SECTION 1 5269 #define U1_MDrv_SYS_WDTSetTime_SECTION 1 5270 #define U1_MDrv_SYS_ResetChip_SECTION 1 5271 #define U1_MDrv_SYS_ResetCPU_SECTION 1 5272 #define U1_MDrv_SYS_SetDbgLevel_SECTION 1 5273 #define U1_MDrv_SYS_FlushMemory_SECTION 1 5274 #define U1_MDrv_SYS_ReadMemory_SECTION 1 5275 #define U1_MDrv_SYS_VIFWriteByteByVDMbox_SECTION 1 5276 #define U1_MDrv_SYS_VIFWriteByteMaskByVDMbox_SECTION 1 5277 #define U1_MDrv_SYS_VIFWriteRegBitByVDMbox_SECTION 1 5278 #define U1_MDrv_SYS_VIFReadByteByVDMbox_SECTION 1 5279 #define U1_MDrv_SYS_VIFRead2ByteByVDMbox_SECTION 1 5280 #define U1_MDrv_SYS_Query_SECTION 1 5281 #define U1_MDrv_SYS_GetSoftwareVersion_SECTION 1 5282 #define U1_MDrv_SYS_SetAGCPadMux_SECTION 1 5283 #define U1_MDrv_SYS_SetPadMux_SECTION 1 5284 #define U1_MDrv_SYS_PackMode_SECTION 1 5285 #define U1_MDrv_SYS_SetPCMCardDetectMode_SECTION 1 5286 #define U1_MDrv_SYS_DisableDebugPort_SECTION 1 5287 #define U1_MDrv_SYS_EnableDebugPort_SECTION 1 5288 #define U1_MDrv_SYS_SetTSOutClockPhase_SECTION 1 5289 #define U1_MDrv_SYS_SetTSClockPhase_SECTION 1 5290 #define U1_MDrv_SYS_PadMuxTableSuspend_SECTION 1 5291 #define U1_MDrv_SYS_PadMuxTableResume_SECTION 1 5292 #define U1_MDrv_SYS_SetPowerState_SECTION 1 5293 #define U1_MDrv_SYS_QueryDolbyHashInfo_SECTION 1 5294 #define U1_MDrv_SYS_GetChipType_SECTION 1 5295 #define U1_MDrv_SYS_SetChipType_SECTION 1 5296 #define U1_MDrv_SYS_GetDolbyKeyCustomer_SECTION 1 5297 #define U1_MDrv_SYS_ReadBrickTerminatorStatus_SECTION 1 5298 #define U1_MDrv_SYS_WriteBrickTerminatorStatus_SECTION 1 5299 #define U1_MDrv_SYS_GetEfuseDid_SECTION 1 5300 #define U1_MDrv_SYS_ReadEfuseHDCPKey_SECTION 1 5301 #define U1_MDrv_SYS_GetIpList_SECTION 1 5302 #define U1_MDrv_SYS_GetMemcConfg_SECTION 1 5303 #define U1_MDrv_SYS_GetQoSConfig_SECTION 1 5304 #define U1_MDrv_SYS_RegisterIoProc_SECTION 1 5305 #define U1_MDrv_SYS_ReadKernelCmdLine_SECTION 1 5306 #define U1_MDrv_SYS_GetTEEInfo_SECTION 1 5307 #define U1_MDrv_SYS_GetUtopiaReleaseLabel_SECTION 1 5308 #define U1_MDrv_TCF_Init_SECTION 1 5309 #define U1_MDrv_CF_Version_Info_SECTION 1 5310 #define U1_MDrv_CF_Trans_Status_SECTION 1 5311 #define U1_MDrv_CF_Cf_Status_SECTION 1 5312 #define U1_MDrv_CF_FeatureVector_SECTION 1 5313 #define U1_MDrv_CF_Issue_Op_SECTION 1 5314 #define U1_MDrv_CF_IsFinished_SECTION 1 5315 #define U1_MDrv_CF_Read_Op_Result_SECTION 1 5316 #define U1_MDrv_CFB_Init_SECTION 1 5317 #define U1_MDrv_CFB_Enable_SECTION 1 5318 #define U1_MDrv_CFB_Reset_SECTION 1 5319 #define U1_MDrv_CFB_Setup_SECTION 1 5320 #define U1_MDrv_CFB_Is_Ready_SECTION 1 5321 #define U1_MDrv_CFB_Is_Done_SECTION 1 5322 #define U1_MDrv_CFB_DBG_KT_Response_SECTION 1 5323 #define U1_MDrv_CFB_DBG_CFB_FSM_SECTION 1 5324 #define U1_MDrv_CFKE_Cmd_Exe_SECTION 1 5325 #define U1_MDrv_CFKE_IsDone_SECTION 1 5326 #define U1_MDrv_CFKE_IsReady_SECTION 1 5327 #define U1_MDrv_CFKE_UserHash_Setup_SECTION 1 5328 #define U1_MDrv_CRIKL_Mirror_SECTION 1 5329 #define U1_MDrv_CRIKL_Set_KeyConfig_SECTION 1 5330 #define U1_MDrv_VE_GetLibVer_SECTION 1 5331 #define U1_MDrv_VE_GetInfo_SECTION 1 5332 #define U1_MDrv_VE_GetStatus_SECTION 1 5333 #define U1_MDrv_VE_SetDbgLevel_SECTION 1 5334 #define U1_MDrv_VE_GetCaps_SECTION 1 5335 #define U1_MDrv_VE_SwitchInputSource_SECTION 1 5336 #define U1_MDrv_VE_SetInputSource_SECTION 1 5337 #define U1_MDrv_VE_SwitchOuputDest_SECTION 1 5338 #define U1_MDrv_VE_SetOutputCtrl_SECTION 1 5339 #define U1_MDrv_VE_SetOutputVideoStd_SECTION 1 5340 #define U1_MDrv_VE_SetCusTable_SECTION 1 5341 #define U1_MDrv_VE_EnableCusTable_SECTION 1 5342 #define U1_MDrv_VE_PowerOn_SECTION 1 5343 #define U1_MDrv_VE_PowerOff_SECTION 1 5344 #define U1_MDrv_VE_SetIOMapBase_SECTION 1 5345 #define U1_MDrv_VE_Init_SECTION 1 5346 #define U1_MDrv_VE_GetConfig_SECTION 1 5347 #define U1_MDrv_VE_Exit_SECTION 1 5348 #define U1_MDrv_VE_SetWSSData_SECTION 1 5349 #define U1_MDrv_VE_GetWSSData_SECTION 1 5350 #define U1_MDrv_VE_SetMode_SECTION 1 5351 #define U1_MDrv_VE_SetBlackScreen_SECTION 1 5352 #define U1_MDrv_VE_IsBlackScreenEnabled_SECTION 1 5353 #define U1_MDrv_VE_EnableTtx_SECTION 1 5354 #define U1_MDrv_VE_SetTtxBuffer_SECTION 1 5355 #define U1_MDrv_VE_ClearTtxReadDoneStatus_SECTION 1 5356 #define U1_MDrv_VE_GetTtxReadDoneStatus_SECTION 1 5357 #define U1_MDrv_VE_SetVbiTtxActiveLines_SECTION 1 5358 #define U1_MDrv_VE_SetVbiTtxActiveLinesBitmap_SECTION 1 5359 #define U1_MDrv_VE_SetVbiTtxRange_SECTION 1 5360 #define U1_MDrv_VE_EnableCcSw_SECTION 1 5361 #define U1_MDrv_VE_SetCcRange_SECTION 1 5362 #define U1_MDrv_VE_SendCcData_SECTION 1 5363 #define U1_MDrv_VE_set_display_window_SECTION 1 5364 #define U1_MDrv_VE_SetFrameColor_SECTION 1 5365 #define U1_MDrv_VE_SetOSD_SECTION 1 5366 #define U1_MDrv_VE_Set_OSDLayer_SECTION 1 5367 #define U1_MDrv_VE_Get_OSDLayer_SECTION 1 5368 #define U1_MDrv_VE_Set_VideoAlpha_SECTION 1 5369 #define U1_MDrv_VE_Get_VideoAlpha_SECTION 1 5370 #define U1_MDrv_VE_SetRGBIn_SECTION 1 5371 #define U1_MDrv_VE_Get_Output_Video_Std_SECTION 1 5372 #define U1_MDrv_VE_SetCaptureMode_SECTION 1 5373 #define U1_MApi_VE_GetDstInfo_SECTION 1 5374 #define U1_MDrv_VE_Set_TestPattern_SECTION 1 5375 #define U1_MApi_VE_W2BYTE_MSK_SECTION 1 5376 #define U1_MApi_VE_R2BYTE_MSK_SECTION 1 5377 #define U1_MDrv_VE_DumpTable_SECTION 1 5378 #define U1_MDrv_VE_DisableRegWrite_SECTION 1 5379 #define U1_MDrv_VE_ShowColorBar_SECTION 1 5380 #define U1_MDrv_VE_AdjustPositionBase_SECTION 1 5381 #define U1_MDrv_VE_SetFrameLock_SECTION 1 5382 #define U1_MDrv_VE_Set_Customer_Scaling_SECTION 1 5383 #define U1_MDrv_VE_set_crop_window_SECTION 1 5384 #define U1_MDrv_VE_set_be_display_window_SECTION 1 5385 #define U1_MDrv_VE_Get_Ext_Caps_SECTION 1 5386 #define U1_MDrv_VE_SetWindow_SECTION 1 5387 #define U1_MDrv_VE_InitVECapture_SECTION 1 5388 #define U1_MDrv_VE_EnaVECapture_SECTION 1 5389 #define U1_MDrv_VE_GetVECaptureState_SECTION 1 5390 #define U1_MDrv_VE_VECaptureWaitOnFrame_SECTION 1 5391 #define U1_MDrv_VE_Adjust_FrameStart_SECTION 1 5392 #define U1_MDrv_VE_SetWSS525Data_SECTION 1 5393 #define U1_MDrv_VE_GetWSS525Data_SECTION 1 5394 #define U1_MDrv_VE_OnOffWSS_SECTION 1 5395 #define U1_MDrv_VE_GetWSSStatus_SECTION 1 5396 #define U1_MDrv_VE_OnOffMV_SECTION 1 5397 #define U1_MDrv_VE_GetMVStatus_SECTION 1 5398 #define U1_MDrv_VE_OnOffDCS_SECTION 1 5399 #define U1_MDrv_VE_GetDCSStatus_SECTION 1 5400 #define U1_MDrv_TVE_SetPowerState_SECTION 1 5401 #define U1_mdrv_uart_open_SECTION 1 5402 #define U1_MDrv_UART_SetPowerState_SECTION 1 5403 #define U1_mdrv_uart_close_SECTION 1 5404 #define U1_mdrv_uart_connect_SECTION 1 5405 #define U1_mdrv_uart_get_connection_SECTION 1 5406 #define U1_mdrv_uart_connect_mux_SECTION 1 5407 #define U1_mdrv_uart_invert_SECTION 1 5408 #define U1_mdrv_uart_set_baudrate_SECTION 1 5409 #define U1_mdrv_uart_set_rx_callback_SECTION 1 5410 #define U1_mdrv_uart_set_tx_buffer_SECTION 1 5411 #define U1_mdrv_uart_set_rx_buffer_SECTION 1 5412 #define U1_mdrv_uart_rx_enable_SECTION 1 5413 #define U1_mdrv_uart_tx_enable_SECTION 1 5414 #define U1_mdrv_uart_rx_disable_SECTION 1 5415 #define U1_mdrv_uart_tx_disable_SECTION 1 5416 #define U1_mdrv_uart_read_SECTION 1 5417 #define U1_mdrv_uart_write_SECTION 1 5418 #define U1_mdrv_uart_poll_SECTION 1 5419 #define U1_mdrv_uart_set_rx_callback_halreg_SECTION 1 5420 #define U1_MDrv_UART_SetIOMapBase_SECTION 1 5421 #define U1_MDrv_UART_Init_SECTION 1 5422 #define U1_MDrv_UART_Standby_Init_SECTION 1 5423 #define U1_MDrv_UART_PutChar_SECTION 1 5424 #define U1_MDrv_UART_PutString_SECTION 1 5425 #define U1_MDrv_UART_GetChar_SECTION 1 5426 #define U1_MDrv_UART_GetFile_SECTION 1 5427 #define U1_MDrv_UART_GetInfo_SECTION 1 5428 #define U1_MDrv_UART_GetDev_SECTION 1 5429 #define U1_MDrv_UART_GetLibVer_SECTION 1 5430 #define U1_MDrv_UART_GetStatus_SECTION 1 5431 #define U1_MDrv_UART_SetDbgLevel_SECTION 1 5432 #define U1_MDrv_UART_SetPMRxEnable_SECTION 1 5433 #define U1_MDrv_UART_SetUARTSecurityBank_SECTION 1 5434 #define U1_MDrv_UrDMA_GetLibVer_SECTION 1 5435 #define U1_MDrv_UrDMA_SetDbgLevel_SECTION 1 5436 #define U1_MDrv_UrDMA_TxInit_SECTION 1 5437 #define U1_MDrv_UrDMA_RxInit_SECTION 1 5438 #define U1_MDrv_UrDMA_Polling_Tx_Done_SECTION 1 5439 #define U1_MDrv_UrDMA_ISR_SECTION 1 5440 #define U1_MDrv_UrDMA_SelMode_SECTION 1 5441 #define U1_MDrv_UrDMA_Engine_SECTION 1 5442 #define U1_MDrv_UrDMA_Init_SECTION 1 5443 #define U1_MDrv_OverCurrentDetect_RegisterCallBack_SECTION 1 5444 #define U1_MDrv_USB_RegisterCallBack_SECTION 1 5445 #define U1_MDrv_Usb_Init_SECTION 1 5446 #define U1_MDrv_USB_Port_Init_SECTION 1 5447 #define U1_MDrv_UsbClose_SECTION 1 5448 #define U1_MDrv_UsbDeviceConnectBitEx_SECTION 1 5449 #define U1_MDrv_USB_Port_Close_SECTION 1 5450 #define U1_MDrv_Usb_STR_Off_SECTION 1 5451 #define U1_MDrv_Usb_STR_On_SECTION 1 5452 #define U1_MDrv_UsbBlockReadToMIU_SECTION 1 5453 #define U1_MDrv_UsbBlockWriteFromMIU_SECTION 1 5454 #define U1_MDrv_UsbBlockReadToMIUEx_SECTION 1 5455 #define U1_MDrv_UsbBlockWriteFromMIUEx_SECTION 1 5456 #define U1_MDrv_GetUsbBlockSize_SECTION 1 5457 #define U1_MDrv_GetUsbBlockSizeEx_SECTION 1 5458 #define U1_MDrv_GetUsbBlockNumEx_SECTION 1 5459 #define U1_MDrv_GetUsbBlockNum_SECTION 1 5460 #define U1_MDrv_UsbGetMaxLUNCount_SECTION 1 5461 #define U1_MDrv_UsbGetMaxLUNCountEx_SECTION 1 5462 #define U1_MDrv_UsbIsLunConnected_SECTION 1 5463 #define U1_ChkUsbReady_SECTION 1 5464 #define U1_ChkUsbReadyEx_SECTION 1 5465 #define U1_MDrv_USB_MscLookupHostID_SECTION 1 5466 #define U1_MDrv_USB_MscLookupManufacturerString_SECTION 1 5467 #define U1_MDrv_USB_MscLookupProductString_SECTION 1 5468 #define U1_MDrv_USB_MscLookupSerialNumberString_SECTION 1 5469 #define U1_MDrv_USB_MscLookupVidPid_SECTION 1 5470 #define U1_MDrv_USB_Quirk_Add_3G_SECTION 1 5471 #define U1_MDrv_USB_IOCTL_Cmd_SECTION 1 5472 #define U1_MDrv_VBI_GetLibVer_SECTION 1 5473 #define U1_MDrv_VBI_GetInfo_SECTION 1 5474 #define U1_MDrv_VBI_GetStatus_SECTION 1 5475 #define U1_MDrv_VBI_SetDbgLevel_SECTION 1 5476 #define U1_MDrv_VBI_Init_SECTION 1 5477 #define U1_MDrv_VBI_Exit_SECTION 1 5478 #define U1_MDrv_VBI_RegisterCB_SECTION 1 5479 #define U1_MDrv_VBI_RingBuffer_Reset_SECTION 1 5480 #define U1_MDrv_VBI_InitializeTTXSlicer_SECTION 1 5481 #define U1_MDrv_VBI_EnableTTXSlicer_SECTION 1 5482 #define U1_MDrv_VBI_IsVPS_Ready_SECTION 1 5483 #define U1_MDrv_VBI_IsTTX_Ready_SECTION 1 5484 #define U1_MDrv_VBI_IsWSS_Ready_SECTION 1 5485 #define U1_MDrv_VBI_GetWSS_Data_SECTION 1 5486 #define U1_MDrv_VBI_GetVPS_Data_SECTION 1 5487 #define U1_MDrv_VBI_SetVideoStandard_SECTION 1 5488 #define U1_MDrv_VBI_TTX_CheckCircuitReady_SECTION 1 5489 #define U1_MDrv_VBI_TTX_GetPacketCount_SECTION 1 5490 #define U1_MDrv_VBI_TTX_PacketBufferIsEmpty_SECTION 1 5491 #define U1_MDrv_VBI_TTX_GetPackets_SECTION 1 5492 #define U1_MDrv_VBI_TTX_GetPacket_SECTION 1 5493 #define U1_MDrv_VBI_TTX_PacketBufferIsOverflow_SECTION 1 5494 #define U1_MDrv_VBI_TTX_PacketBufferGetNoOfOverflows_SECTION 1 5495 #define U1_MDrv_VBI_TTX_EnableLine_SECTION 1 5496 #define U1_MDrv_VBI_ProtectMemory_SECTION 1 5497 #define U1_MDrv_VBI_CC_InitSlicer_SECTION 1 5498 #define U1_MDrv_VBI_CC_InitYPbYr_SECTION 1 5499 #define U1_MDrv_VBI_CC_EnableSlicer_SECTION 1 5500 #define U1_MDrv_VBI_CC_SetDataRate_SECTION 1 5501 #define U1_MDrv_VBI_CC_SetFrameCnt_SECTION 1 5502 #define U1_MDrv_VBI_CC_GetInfo_SECTION 1 5503 #define U1_MDrv_VBI_CC_EnableLine_SECTION 1 5504 #define U1_MDrv_VBI_SyncMemory_SECTION 1 5505 #define U1_MDrv_VBI_CC_SetSCWindowLen_SECTION 1 5506 #define U1_MDrv_VBI_CC_SetVideoStandard_SECTION 1 5507 #define U1_MDrv_VBI_WSS_SetVpsByteNum_SECTION 1 5508 #define U1_MDrv_VBI_Suspend_SECTION 1 5509 #define U1_MDrv_VBI_Resume_SECTION 1 5510 #define U1_MDrv_VBI_SetPowerState_SECTION 1 5511 #define U1_DRV_VIF_Version_SECTION 1 5512 #define U1_DRV_VIF_SetClock_SECTION 1 5513 #define U1_DRV_VIF_Init_SECTION 1 5514 #define U1_DRV_VIF_Reset_SECTION 1 5515 #define U1_DRV_VIF_Exit_SECTION 1 5516 #define U1_DRV_VIF_Handler_SECTION 1 5517 #define U1_DRV_VIF_SetSoundSystem_SECTION 1 5518 #define U1_DRV_VIF_SetIfFreq_SECTION 1 5519 #define U1_DRV_VIF_Read_CR_FOE_SECTION 1 5520 #define U1_DRV_VIF_Read_CR_LOCK_STATUS_SECTION 1 5521 #define U1_DRV_VIF_BypassDBBAudioFilter_SECTION 1 5522 #define U1_DRV_VIF_SetFreqBand_SECTION 1 5523 #define U1_DRV_VIF_GetInputLevelIndicator_SECTION 1 5524 #define U1_DRV_VIF_SetParameter_SECTION 1 5525 #define U1_DRV_VIF_ShiftClk_SECTION 1 5526 #define U1_MDrv_VIF_SetPowerState_SECTION 1 5527 #define U1_DRV_VIF_WriteByte_SECTION 1 5528 #define U1_DRV_VIF_ReadByte_SECTION 1 5529 #define U1_MDrv_WBLE_Init_SECTION 1 5530 #define U1_MDrv_WBLE_EnableBLE_SECTION 1 5531 #define U1_MDrv_WBLE_EnableWLE_SECTION 1 5532 #define U1_MDrv_WBLE_SetBLE_SECTION 1 5533 #define U1_MDrv_WBLE_SetWLE_SECTION 1 5534 #define U1_MDrv_WBLE_Handler_BLEAvgLuma_SECTION 1 5535 #define U1_MDrv_WBLE_Set_SlopeValue_SECTION 1 5536 #define U1_MDrv_WDT_GetLibVer_SECTION 1 5537 #define U1_MDrv_WDT_Init_SECTION 1 5538 #define U1_MDrv_WDT_Stop_SECTION 1 5539 #define U1_MDrv_WDT_Clear_SECTION 1 5540 #define U1_MDrv_WDT_ClearRstFlag_SECTION 1 5541 #define U1_MDrv_WDT_IsReset_SECTION 1 5542 #define U1_MDrv_WDT_IsEnable_SECTION 1 5543 #define U1_MDrv_WDT_SetTimer_SECTION 1 5544 #define U1_MDrv_WDT_SetTimer_ms_SECTION 1 5545 #define U1_MDrv_WDT_SetTimer_us_SECTION 1 5546 #define U1_MDrv_WDT_SetIntTimer_SECTION 1 5547 #define U1_MDrv_TIMER_Init_SECTION 1 5548 #define U1_MDrv_TIMER_CfgFnct_SECTION 1 5549 #define U1_MDrv_TIMER_Count_SECTION 1 5550 #define U1_MDrv_TIMER_INT_SECTION 1 5551 #define U1_MDrv_TIMER_Rst_SECTION 1 5552 #define U1_MDrv_TIMER_SetMaxMatch_SECTION 1 5553 #define U1_MDrv_TIMER_HitMaxMatch_SECTION 1 5554 #define U1_MDrv_TIMER_GetMaxMatch_SECTION 1 5555 #define U1_MDrv_TIMER_GetCounter_SECTION 1 5556 #define U1_MDrv_TIMER_GetSecond_SECTION 1 5557 #define U1_MDrv_TIMER_GetMs_SECTION 1 5558 #define U1_MDrv_TIMER_GetUs_SECTION 1 5559 #define U1_MDrv_TIMER_Delay_SECTION 1 5560 #define U1_MDrv_TIMER_DelayMs_SECTION 1 5561 #define U1_MDrv_TIMER_DelayUs_SECTION 1 5562 #define U1_MDrv_TIMER_Exit_SECTION 1 5563 #define U1_MDrv_WDT_SetPowerState_SECTION 1 5564 #define U1_MDrv_HDMI_Func_Caps_SECTION 1 5565 #define U1_MDrv_HDMI_init_SECTION 1 5566 #define U1_MDrv_HDMI_Exit_SECTION 1 5567 #define U1_MDrv_HDMI_pkt_reset_SECTION 1 5568 #define U1_MDrv_HDMI_pullhpd_SECTION 1 5569 #define U1_MDrv_HDMI_GC_Info_SECTION 1 5570 #define U1_MDrv_HDMI_Packet_Received_SECTION 1 5571 #define U1_MDrv_HDMI_Get_ColorFormat_SECTION 1 5572 #define U1_MDrv_HDMI_Get_ColorRange_SECTION 1 5573 #define U1_MDrv_HDMI_Get_Content_Type_SECTION 1 5574 #define U1_MDrv_HDMI_Get_ExtColorimetry_SECTION 1 5575 #define U1_MDrv_HDMI_Set_EQ_SECTION 1 5576 #define U1_MDrv_HDMI_Set_EQ_To_Port_SECTION 1 5577 #define U1_MDrv_HDMI_Audio_MUTE_Enable_SECTION 1 5578 #define U1_MDrv_HDMI_Audio_Status_Clear_SECTION 1 5579 #define U1_MDrv_HDMI_Get_AspectRatio_SECTION 1 5580 #define U1_MDrv_HDMI_Get_ActiveFormat_AspectRatio_SECTION 1 5581 #define U1_MDrv_HDMI_Get_AVIInfoFrameVer_SECTION 1 5582 #define U1_MDrv_HDMI_err_status_update_SECTION 1 5583 #define U1_MDrv_HDMI_IsHDMI_Mode_SECTION 1 5584 #define U1_MDrv_HDMI_Get_MID_info_SECTION 1 5585 #define U1_MDrv_HDMI_get_packet_value_SECTION 1 5586 #define U1_MDrv_DVI_ChannelPhaseStatus_SECTION 1 5587 #define U1_MDrv_DVI_HF_adjust_SECTION 1 5588 #define U1_MDrv_DVI_SoftwareReset_SECTION 1 5589 #define U1_mdrv_dvi_reset_SECTION 1 5590 #define U1_MDrv_DVI_ClkPullLow_SECTION 1 5591 #define U1_MDrv_DVI_SwitchSrc_SECTION 1 5592 #define U1_MDrv_HDMI_SetForClockLessThan70Mhz_SECTION 1 5593 #define U1_MDrv_HDMI_dvi_adjust_SECTION 1 5594 #define U1_MDrv_HDMI_SetUpdatePhaseLineCount_SECTION 1 5595 #define U1_MDrv_HDMI_GetTMDSFreq_SECTION 1 5596 #define U1_MDrv_HDCP_Enable_SECTION 1 5597 #define U1_MDrv_HDMI_SetHdcpEnable_SECTION 1 5598 #define U1_MDrv_HDCP_ClearStatus_SECTION 1 5599 #define U1_MDrv_HDCP_initproductionkey_SECTION 1 5600 #define U1_MDrv_HDCP_GetStatus_SECTION 1 5601 #define U1_MDrv_HDCP_Vsync_end_en_SECTION 1 5602 #define U1_MDrv_HDMI_audio_output_SECTION 1 5603 #define U1_MDrv_HDMI_audio_cp_hdr_info_SECTION 1 5604 #define U1_MDrv_HDMI_audio_channel_status_SECTION 1 5605 #define U1_MDrv_HDMI_GetLibVer_SECTION 1 5606 #define U1_MDrv_HDMI_GetInfo_SECTION 1 5607 #define U1_MDrv_HDMI_GetStatus_SECTION 1 5608 #define U1_MDrv_HDMI_Get_AVIInfoActiveInfoPresent_SECTION 1 5609 #define U1_MDrv_HDMI_READ_DDCRAM_SECTION 1 5610 #define U1_MDrv_HDMI_PROG_DDCRAM_SECTION 1 5611 #define U1_MDrv_HDMI_Get_Pixel_Repetition_SECTION 1 5612 #define U1_MDrv_HDMI_3D_4Kx2K_Process_SECTION 1 5613 #define U1_MDrv_HDMI_AVG_ScaleringDown_SECTION 1 5614 #define U1_MDrv_HDMI_Check4K2K_SECTION 1 5615 #define U1_MDrv_HDMI_Check_Additional_Format_SECTION 1 5616 #define U1_MDrv_HDMI_Get_3D_Structure_SECTION 1 5617 #define U1_MDrv_HDMI_Get_3D_Ext_Data_SECTION 1 5618 #define U1_MDrv_HDMI_Get_3D_Meta_Field_SECTION 1 5619 #define U1_MDrv_HDMI_Get_VIC_Code_SECTION 1 5620 #define U1_MDrv_HDMI_Get_4Kx2K_VIC_Code_SECTION 1 5621 #define U1_MDrv_HDMI_ARC_PINControl_SECTION 1 5622 #define U1_MDrv_DVI_Software_Reset_SECTION 1 5623 #define U1_MDrv_HDMI_CheckHDMI20_Setting_SECTION 1 5624 #define U1_MDrv_HDMI_StablePolling_SECTION 1 5625 #define U1_MDrv_HDMI_GetSourceVersion_SECTION 1 5626 #define U1_MDrv_HDMI_Set5VDetectGPIOSelect_SECTION 1 5627 #define U1_MDrv_HDMI_GetDEStableStatus_SECTION 1 5628 #define U1_MDrv_HDMI_CheckHDCP14_SECTION 1 5629 #define U1_MDrv_HDMI_CheckHDCPState_SECTION 1 5630 #define U1_MDrv_HDMI_Ctrl_SECTION 1 5631 #define U1_MDrv_HDMI_GetDataInfo_SECTION 1 5632 #define U1_MDrv_HDMI_SetPowerState_SECTION 1 5633 #define U1_MDrv_HDCP22_FillCipherKey_SECTION 1 5634 #define U1_MDrv_HDCP22_InitCBFunc_SECTION 1 5635 #define U1_MDrv_HDCP22_PortInit_SECTION 1 5636 #define U1_MDrv_HDCP22_PollingReadDone_SECTION 1 5637 #define U1_MDrv_HDCP22_EnableCipher_SECTION 1 5638 #define U1_MDrv_HDCP22_SendMsg_SECTION 1 5639 #define U1_MDrv_HDCP22_Handler_SECTION 1 5640 #define U1_MDrv_HDMI_EX_GetLibVer_SECTION 1 5641 #define U1_MDrv_HDMI_EX_GetInfo_SECTION 1 5642 #define U1_MDrv_HDMI_EX_GetStatus_SECTION 1 5643 #define U1_MDrv_HDMI_EX_Get_AVIInfoActiveInfoPresent_SECTION 1 5644 #define U1_MDrv_HDMI_EX_Func_Caps_SECTION 1 5645 #define U1_MDrv_HDMI_EX_init_SECTION 1 5646 #define U1_MDrv_HDMI_EX_Exit_SECTION 1 5647 #define U1_MDrv_HDMI_EX_pkt_reset_SECTION 1 5648 #define U1_MDrv_HDMI_EX_pullhpd_SECTION 1 5649 #define U1_MDrv_HDMI_EX_GC_Info_SECTION 1 5650 #define U1_MDrv_HDMI_EX_Packet_Received_SECTION 1 5651 #define U1_MDrv_HDMI_EX_Get_ColorFormat_SECTION 1 5652 #define U1_MDrv_HDMI_EX_Get_ColorRange_SECTION 1 5653 #define U1_MDrv_HDMI_EX_Get_Content_Type_SECTION 1 5654 #define U1_MDrv_HDMI_EX_Get_ExtColorimetry_SECTION 1 5655 #define U1_MDrv_HDMI_EX_Set_EQ_SECTION 1 5656 #define U1_MDrv_HDMI_EX_Set_EQ_To_Port_SECTION 1 5657 #define U1_MDrv_HDMI_EX_Audio_MUTE_Enable_SECTION 1 5658 #define U1_MDrv_HDMI_EX_Audio_Status_Clear_SECTION 1 5659 #define U1_MDrv_HDMI_EX_Get_AspectRatio_SECTION 1 5660 #define U1_MDrv_HDMI_EX_Get_ActiveFormat_AspectRatio_SECTION 1 5661 #define U1_MDrv_HDMI_EX_Get_AVIInfoFrameVer_SECTION 1 5662 #define U1_MDrv_HDMI_EX_err_status_update_SECTION 1 5663 #define U1_MDrv_HDMI_EX_Get_PollingStatus_SECTION 1 5664 #define U1_MDrv_HDMI_EX_IsHDMI_Mode_SECTION 1 5665 #define U1_MDrv_HDMI_EX_Get_MID_info_SECTION 1 5666 #define U1_MDrv_HDMI_EX_get_packet_value_SECTION 1 5667 #define U1_MDrv_DVI_EX_ChannelPhaseStatus_SECTION 1 5668 #define U1_MDrv_DVI_EX_SoftwareReset_SECTION 1 5669 #define U1_mdrv_dvi_ex_reset_SECTION 1 5670 #define U1_MDrv_DVI_EX_ClkPullLow_SECTION 1 5671 #define U1_MDrv_DVI_EX_SwitchSrc_SECTION 1 5672 #define U1_MDrv_HDMI_EX_SetForClockLessThan70Mhz_SECTION 1 5673 #define U1_MDrv_HDMI_EX_dvi_adjust_SECTION 1 5674 #define U1_MDrv_HDMI_EX_SetUpdatePhaseLineCount_SECTION 1 5675 #define U1_MDrv_HDCP_EX_Enable_SECTION 1 5676 #define U1_MDrv_HDMI_EX_SetHdcpEnable_SECTION 1 5677 #define U1_MDrv_HDCP_EX_ClearStatus_SECTION 1 5678 #define U1_MDrv_HDCP_EX_initproductionkey_SECTION 1 5679 #define U1_MDrv_HDCP_EX_GetStatus_SECTION 1 5680 #define U1_MDrv_HDCP_EX_Vsync_end_en_SECTION 1 5681 #define U1_MDrv_HDMI_EX_audio_output_SECTION 1 5682 #define U1_MDrv_HDMI_EX_audio_cp_hdr_info_SECTION 1 5683 #define U1_MDrv_HDMI_EX_audio_channel_status_SECTION 1 5684 #define U1_MDrv_HDMI_EX_READ_DDCRAM_SECTION 1 5685 #define U1_MDrv_HDMI_EX_PROG_DDCRAM_SECTION 1 5686 #define U1_MDrv_HDMI_EX_Get_Pixel_Repetition_SECTION 1 5687 #define U1_MDrv_HDMI_EX_3D_4Kx2K_Process_SECTION 1 5688 #define U1_MDrv_HDMI_EX_AVG_ScaleringDown_SECTION 1 5689 #define U1_MDrv_HDMI_EX_Check4K2K_SECTION 1 5690 #define U1_MDrv_HDMI_EX_Check_Additional_Format_SECTION 1 5691 #define U1_MDrv_HDMI_EX_Get_3D_Structure_SECTION 1 5692 #define U1_MDrv_HDMI_EX_Get_3D_Ext_Data_SECTION 1 5693 #define U1_MDrv_HDMI_EX_Get_3D_Meta_Field_SECTION 1 5694 #define U1_MDrv_HDMI_EX_Get_VIC_Code_SECTION 1 5695 #define U1_MDrv_HDMI_EX_Get_4Kx2K_VIC_Code_SECTION 1 5696 #define U1_MDrv_HDMI_EX_ARC_PINControl_SECTION 1 5697 #define U1_MDrv_GOP_SC_Init_SECTION 1 5698 #define U1_MDrv_GOP_SC_MuxSel_SECTION 1 5699 #define U1_MDrv_GOP_SC_SetParams_SECTION 1 5700 #define U1_MDrv_GOP_SC_SetCfg_SECTION 1 5701 #define U1_MDrv_GOP_SC_SetDst_SECTION 1 5702 #define U1_MDrv_GOP_SC_SetLock_SECTION 1 5703 #define U1_MDrv_GOP_SC_SetFPLL_Enable_SECTION 1 5704 #define U1_MApi_XC_Get_FD_Mask_Status_SECTION 1 5705 #define U1_MApi_XC_Set_XC_VOP_SECTION 1 5706 #define U1_MApi_XC_GetSWDSIndex_SECTION 1 5707 #define U1_MDrv_HDMI_Get_PollingStatus_SECTION 1 5708 #define U1_MApi_XC_SetSWDRInfo_SECTION 1 5709 #define U1_MApi_XC_GetSWDRInfo_SECTION 1 5710 #define U1_MApi_DAC_SetVGAHsyncVsync_SECTION 1 5711