xref: /utopia/UTPA2-700.0.x/modules/mbx/hal/curry/mbx/regMBXINT.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
9 // or part of MStar Software is expressly prohibited, unless prior written
10 // permission has been granted by MStar.
11 //
12 // By accessing, browsing and/or using MStar Software, you acknowledge that you
13 // have read, understood, and agree, to be bound by below terms ("Terms") and to
14 // comply with all applicable laws and regulations:
15 //
16 // 1. MStar shall retain any and all right, ownership and interest to MStar
17 //    Software and any modification/derivatives thereof.
18 //    No right, ownership, or interest to MStar Software and any
19 //    modification/derivatives thereof is transferred to you under Terms.
20 //
21 // 2. You understand that MStar Software might include, incorporate or be
22 //    supplied together with third party`s software and the use of MStar
23 //    Software may require additional licenses from third parties.
24 //    Therefore, you hereby agree it is your sole responsibility to separately
25 //    obtain any and all third party right and license necessary for your use of
26 //    such third party`s software.
27 //
28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as
29 //    MStar`s confidential information and you agree to keep MStar`s
30 //    confidential information in strictest confidence and not disclose to any
31 //    third party.
32 //
33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any
34 //    kind. Any warranties are hereby expressly disclaimed by MStar, including
35 //    without limitation, any warranties of merchantability, non-infringement of
36 //    intellectual property rights, fitness for a particular purpose, error free
37 //    and in conformity with any international standard.  You agree to waive any
38 //    claim against MStar for any loss, damage, cost or expense that you may
39 //    incur related to your use of MStar Software.
40 //    In no event shall MStar be liable for any direct, indirect, incidental or
41 //    consequential damages, including without limitation, lost of profit or
42 //    revenues, lost or damage of data, and unauthorized system use.
43 //    You agree that this Section 4 shall still apply without being affected
44 //    even if MStar Software has been modified by MStar in accordance with your
45 //    request or instruction for your use, except otherwise agreed by both
46 //    parties in writing.
47 //
48 // 5. If requested, MStar may from time to time provide technical supports or
49 //    services in relation with MStar Software to you for your use of
50 //    MStar Software in conjunction with your or your customer`s product
51 //    ("Services").
52 //    You understand and agree that, except otherwise agreed by both parties in
53 //    writing, Services are provided on an "AS IS" basis and the warranty
54 //    disclaimer set forth in Section 4 above shall apply.
55 //
56 // 6. Nothing contained herein shall be construed as by implication, estoppels
57 //    or otherwise:
58 //    (a) conferring any license or right to use MStar name, trademark, service
59 //        mark, symbol or any other identification;
60 //    (b) obligating MStar or any of its affiliates to furnish any person,
61 //        including without limitation, you and your customers, any assistance
62 //        of any kind whatsoever, or any information; or
63 //    (c) conferring any license or right under any intellectual property right.
64 //
65 // 7. These terms shall be governed by and construed in accordance with the laws
66 //    of Taiwan, R.O.C., excluding its conflict of law rules.
67 //    Any and all dispute arising out hereof or related hereto shall be finally
68 //    settled by arbitration referred to the Chinese Arbitration Association,
69 //    Taipei in accordance with the ROC Arbitration Law and the Arbitration
70 //    Rules of the Association by three (3) arbitrators appointed in accordance
71 //    with the said Rules.
72 //    The place of arbitration shall be in Taipei, Taiwan and the language shall
73 //    be English.
74 //    The arbitration award shall be final and binding to both parties.
75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
85 // MStar Semiconductor Inc. and be kept in strict confidence
86 // ("MStar Confidential Information") by the recipient.
87 // Any unauthorized act including without limitation unauthorized disclosure,
88 // copying, use, reproduction, sale, distribution, modification, disassembling,
89 // reverse engineering and compiling of the contents of MStar Confidential
90 // Information is unlawful and strictly prohibited. MStar hereby reserves the
91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94 
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 /// @file   regMBXINT.h
97 /// @brief  MStar Mailbox Driver DDI
98 /// @author MStar Semiconductor Inc.
99 /// @attention
100 /// <b><em>For INT_FIQMASK_AEON2MIPS, maybe has issues with big-endient, but seems pm won't use this bit\n
101 /// so just skip it now. </em></b>
102 ///////////////////////////////////////////////////////////////////////////////////////////////////
103 
104 #ifndef _MHAL_MBX_INTERRUPT_REG_H
105 #define _MHAL_MBX_INTERRUPT_REG_H
106 
107 //=============================================================================
108 // Includs
109 //=============================================================================
110 
111 //=============================================================================
112 // Defines & Macros
113 //=============================================================================
114 #define RIU_MAP _virtRIUBaseAddrMBXINT
115 
116 #define RIU     ((MS_U16 volatile *) RIU_MAP)
117 #define RIU8    ((MS_U8  volatile *) RIU_MAP)
118 
119 
120 #define REG_FIQ_MASK_BASE                (0xC80<<1)
121 #define FIQ_REG(address)                 RIU[address*2+REG_FIQ_MASK_BASE]
122 #define REG_FIQ_H1_48_63                 0x0027
123     #define INT_FIQMASK_H3_H2            BIT(0)
124     #define INT_FIQMASK_H3_AEON          BIT(1)
125     #define INT_FIQMASK_H3_PM            BIT(2)
126 
127 #define REG_FIQ_H1_32_47                 0x0026
128     #define INT_FIQMASK_PM_H3           BIT(4)
129     #define INT_FIQMASK_PM_H2           BIT(5)
130     #define INT_FIQMASK_PM_AEON         BIT(6)
131 
132     #define INT_FIQMASK_AEON_H3         BIT(8)
133     #define INT_FIQMASK_AEON_H2         BIT(9)
134     #define INT_FIQMASK_AEON_PM         BIT(10)
135 
136     #define INT_FIQMASK_H2_H3           BIT(12)
137     #define INT_FIQMASK_H2_AEON         BIT(13)
138     #define INT_FIQMASK_H2_PM           BIT(14)
139 
140 #define REG_FIQS_H1_32_47               0x002e
141 #define REG_FIQS_H1_48_63               0x002f
142 
143 
144 
145 
146 #define REG_CPU_INT_BASE                 (0x2A0<<1)
147 #define CPU_INT_REG(address)             RIU[address*2+REG_CPU_INT_BASE]
148 #define REG_INT_PMFIRE                   0x0000
149     #define INT_PM_AEON                  BIT(0)
150     #define INT_PM_H2                    BIT(1)
151     #define INT_PM_H3                    BIT(2)
152 
153 #define REG_INT_AEONFIRE                 0x0002
154     #define INT_AEON_PM                  BIT(0)
155     #define INT_AEON_H2                  BIT(1)
156     #define INT_AEON_H3                  BIT(2)
157 
158 #define REG_INT_H2FIRE                   0x0004
159     #define INT_H2_PM                    BIT(0)
160     #define INT_H2_AEON                  BIT(1)
161     #define INT_H2_H3                    BIT(2)
162 
163 #define REG_INT_H3FIRE                   0x0004
164     #define INT_H3_PM                    BIT(0)
165     #define INT_H3_AEON                  BIT(1)
166     #define INT_H3_H2                    BIT(2)
167 
168 #endif //_MHAL_MBX_INTERRUPT_REG_H
169 
170 
171