1*53ee8cc1Swenshuai.xi //<MStar Software> 2*53ee8cc1Swenshuai.xi //****************************************************************************** 3*53ee8cc1Swenshuai.xi // MStar Software 4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are 6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. 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If requested, MStar may from time to time provide technical supports or 49*53ee8cc1Swenshuai.xi // services in relation with MStar Software to you for your use of 50*53ee8cc1Swenshuai.xi // MStar Software in conjunction with your or your customer`s product 51*53ee8cc1Swenshuai.xi // ("Services"). 52*53ee8cc1Swenshuai.xi // You understand and agree that, except otherwise agreed by both parties in 53*53ee8cc1Swenshuai.xi // writing, Services are provided on an "AS IS" basis and the warranty 54*53ee8cc1Swenshuai.xi // disclaimer set forth in Section 4 above shall apply. 55*53ee8cc1Swenshuai.xi // 56*53ee8cc1Swenshuai.xi // 6. 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These terms shall be governed by and construed in accordance with the laws 66*53ee8cc1Swenshuai.xi // of Taiwan, R.O.C., excluding its conflict of law rules. 67*53ee8cc1Swenshuai.xi // Any and all dispute arising out hereof or related hereto shall be finally 68*53ee8cc1Swenshuai.xi // settled by arbitration referred to the Chinese Arbitration Association, 69*53ee8cc1Swenshuai.xi // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70*53ee8cc1Swenshuai.xi // Rules of the Association by three (3) arbitrators appointed in accordance 71*53ee8cc1Swenshuai.xi // with the said Rules. 72*53ee8cc1Swenshuai.xi // The place of arbitration shall be in Taipei, Taiwan and the language shall 73*53ee8cc1Swenshuai.xi // be English. 74*53ee8cc1Swenshuai.xi // The arbitration award shall be final and binding to both parties. 75*53ee8cc1Swenshuai.xi // 76*53ee8cc1Swenshuai.xi //****************************************************************************** 77*53ee8cc1Swenshuai.xi //<MStar Software> 78*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 79*53ee8cc1Swenshuai.xi // 80*53ee8cc1Swenshuai.xi // Copyright (c) 2006-2007 MStar Semiconductor, Inc. 81*53ee8cc1Swenshuai.xi // All rights reserved. 82*53ee8cc1Swenshuai.xi // 83*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained 84*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of 85*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence 86*53ee8cc1Swenshuai.xi // (��MStar Confidential Information��) by the recipient. 87*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure, 88*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling, 89*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential 90*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the 91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 92*53ee8cc1Swenshuai.xi // 93*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 94*53ee8cc1Swenshuai.xi 95*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 96*53ee8cc1Swenshuai.xi /// 97*53ee8cc1Swenshuai.xi /// @file drvHDMITx.h 98*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc. 99*53ee8cc1Swenshuai.xi /// @brief HDMI Tx Driver Interface 100*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 101*53ee8cc1Swenshuai.xi 102*53ee8cc1Swenshuai.xi #ifndef _DRV_HDMITX_H_ 103*53ee8cc1Swenshuai.xi #define _DRV_HDMITX_H_ 104*53ee8cc1Swenshuai.xi 105*53ee8cc1Swenshuai.xi 106*53ee8cc1Swenshuai.xi #ifdef __cplusplus 107*53ee8cc1Swenshuai.xi extern "C" 108*53ee8cc1Swenshuai.xi { 109*53ee8cc1Swenshuai.xi #endif 110*53ee8cc1Swenshuai.xi 111*53ee8cc1Swenshuai.xi #include "halHDMITx.h" 112*53ee8cc1Swenshuai.xi #ifdef CUSTOMER_NDS 113*53ee8cc1Swenshuai.xi #include "apiHDMITx_NDS.h" 114*53ee8cc1Swenshuai.xi #endif // CUSTOMER_NDS 115*53ee8cc1Swenshuai.xi 116*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 117*53ee8cc1Swenshuai.xi // Driver Capability 118*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 119*53ee8cc1Swenshuai.xi 120*53ee8cc1Swenshuai.xi 121*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 122*53ee8cc1Swenshuai.xi // Macro and Define 123*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 124*53ee8cc1Swenshuai.xi #define HDMITX_EDID_BLK_SIZE 128U //wilson@kano 125*53ee8cc1Swenshuai.xi #define HDMITX_CEA_DAT_BLK_TYPE_NUM 8U //wilson@kano 126*53ee8cc1Swenshuai.xi 127*53ee8cc1Swenshuai.xi 128*53ee8cc1Swenshuai.xi #ifdef MSOS_TYPE_LINUX_KERNEL 129*53ee8cc1Swenshuai.xi #define HDMITX_ISR_ENABLE 1U 130*53ee8cc1Swenshuai.xi #else 131*53ee8cc1Swenshuai.xi #define HDMITX_ISR_ENABLE 1U 132*53ee8cc1Swenshuai.xi #endif 133*53ee8cc1Swenshuai.xi 134*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 135*53ee8cc1Swenshuai.xi // Type and Structure 136*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 137*53ee8cc1Swenshuai.xi 138*53ee8cc1Swenshuai.xi typedef enum 139*53ee8cc1Swenshuai.xi { 140*53ee8cc1Swenshuai.xi E_HDMITX_POOL_ID_INTERNAL_0 = 0, // just for test, please refine. 141*53ee8cc1Swenshuai.xi E_HDMITX_POOL_ID_MAX, // just for test, please refine. 142*53ee8cc1Swenshuai.xi } E_HDMITX_POOL_ID; 143*53ee8cc1Swenshuai.xi 144*53ee8cc1Swenshuai.xi 145*53ee8cc1Swenshuai.xi //*********************// 146*53ee8cc1Swenshuai.xi // DVI / HDMI // 147*53ee8cc1Swenshuai.xi //*********************// 148*53ee8cc1Swenshuai.xi 149*53ee8cc1Swenshuai.xi /* 150*53ee8cc1Swenshuai.xi Bit1: 151*53ee8cc1Swenshuai.xi - 0: DVI 152*53ee8cc1Swenshuai.xi - 1: HDMI 153*53ee8cc1Swenshuai.xi Bit0: 154*53ee8cc1Swenshuai.xi - 0: without HDCP 155*53ee8cc1Swenshuai.xi - 1: with HDCP 156*53ee8cc1Swenshuai.xi */ 157*53ee8cc1Swenshuai.xi typedef enum 158*53ee8cc1Swenshuai.xi { 159*53ee8cc1Swenshuai.xi E_HDMITX_DVI = 0, // DVI without HDCP 160*53ee8cc1Swenshuai.xi E_HDMITX_DVI_HDCP = 1, // DVI with HDCP 161*53ee8cc1Swenshuai.xi E_HDMITX_HDMI = 2, // HDMI without HDCP 162*53ee8cc1Swenshuai.xi E_HDMITX_HDMI_HDCP = 3, // HDMI with HDCP 163*53ee8cc1Swenshuai.xi } MsHDMITX_OUTPUT_MODE; 164*53ee8cc1Swenshuai.xi 165*53ee8cc1Swenshuai.xi typedef enum 166*53ee8cc1Swenshuai.xi { 167*53ee8cc1Swenshuai.xi E_HDMITX_EVENT_RUN = 0x00000001U, 168*53ee8cc1Swenshuai.xi E_HDMITX_EVENT_IRQ = 0x00000002U, 169*53ee8cc1Swenshuai.xi //wilson@kano 170*53ee8cc1Swenshuai.xi E_HDMITX_EVENT_RXTIMER = 0x00000004U, 171*53ee8cc1Swenshuai.xi E_HDMITX_EVENT_CECRX = 0x00000008U, 172*53ee8cc1Swenshuai.xi 173*53ee8cc1Swenshuai.xi E_HdcpTX_EVENT_RUN = 0x00000010U, 174*53ee8cc1Swenshuai.xi E_HdcpTX_EVENT_IRQ = 0x00000020U, 175*53ee8cc1Swenshuai.xi E_HdcpTX_EVENT_RITIMER = 0x00000040U, 176*53ee8cc1Swenshuai.xi 177*53ee8cc1Swenshuai.xi #if 0 178*53ee8cc1Swenshuai.xi E_HDMITX_EVENT_RITIMER = 0x00000004, 179*53ee8cc1Swenshuai.xi E_HDMITX_EVENT_RXTIMER = 0x00000008, 180*53ee8cc1Swenshuai.xi E_HDMITX_EVENT_CECRX = 0x00000010, 181*53ee8cc1Swenshuai.xi #endif 182*53ee8cc1Swenshuai.xi } MDrvHDMITXEvent; 183*53ee8cc1Swenshuai.xi 184*53ee8cc1Swenshuai.xi #if 0 185*53ee8cc1Swenshuai.xi typedef enum //wilson@kano 186*53ee8cc1Swenshuai.xi { 187*53ee8cc1Swenshuai.xi E_HdcpTX_EVENT_RUN = 0x00000001, 188*53ee8cc1Swenshuai.xi E_HdcpTX_EVENT_IRQ = 0x00000002, 189*53ee8cc1Swenshuai.xi E_HdcpTX_EVENT_RITIMER = 0x00000004, 190*53ee8cc1Swenshuai.xi } MDrvHdcpTXEvent; 191*53ee8cc1Swenshuai.xi #endif 192*53ee8cc1Swenshuai.xi 193*53ee8cc1Swenshuai.xi typedef enum 194*53ee8cc1Swenshuai.xi { 195*53ee8cc1Swenshuai.xi //wilson@kano 196*53ee8cc1Swenshuai.xi E_HDMITX_FSM_PENDING = 0, 197*53ee8cc1Swenshuai.xi E_HDMITX_FSM_VALIDATE_EDID = 1, 198*53ee8cc1Swenshuai.xi E_HDMITX_FSM_PRE_TRANSMIT = 2, 199*53ee8cc1Swenshuai.xi E_HDMITX_FSM_TRANSMIT = 3, 200*53ee8cc1Swenshuai.xi E_HDMITX_FSM_DONE = 4, 201*53ee8cc1Swenshuai.xi #if 0 202*53ee8cc1Swenshuai.xi E_HDMITX_FSM_PENDING = 0, 203*53ee8cc1Swenshuai.xi E_HDMITX_FSM_CHECK_HPD = 1, 204*53ee8cc1Swenshuai.xi E_HDMITX_FSM_VALIDATE_EDID = 2, 205*53ee8cc1Swenshuai.xi E_HDMITX_FSM_HDCP_AUTH_WAIT_RX = 3, 206*53ee8cc1Swenshuai.xi E_HDMITX_FSM_HDCP_AUTH_CHECK_R0 = 4, 207*53ee8cc1Swenshuai.xi E_HDMITX_FSM_HDCP_AUTH_CHECK_REPEATER = 5, 208*53ee8cc1Swenshuai.xi E_HDMITX_FSM_HDCP_AUTH_DONE = 6, 209*53ee8cc1Swenshuai.xi E_HDMITX_FSM_HDCP_AUTH_FAIL = 7, 210*53ee8cc1Swenshuai.xi #endif 211*53ee8cc1Swenshuai.xi } MDrvHDMITX_FSM_STATE; 212*53ee8cc1Swenshuai.xi 213*53ee8cc1Swenshuai.xi typedef enum 214*53ee8cc1Swenshuai.xi { 215*53ee8cc1Swenshuai.xi E_NORMAL_OUTPUT = 0, // still display normally 216*53ee8cc1Swenshuai.xi E_HDCP_ENCRYPTION = 1, // HDCP encryption to show snow screen 217*53ee8cc1Swenshuai.xi E_BLUE_SCREEN = 2, // blue screen 218*53ee8cc1Swenshuai.xi } MDrvHDMITX_UNHDCPRX_CONTROL; 219*53ee8cc1Swenshuai.xi 220*53ee8cc1Swenshuai.xi typedef enum 221*53ee8cc1Swenshuai.xi { 222*53ee8cc1Swenshuai.xi E_CHECK_NOT_READY = 0, 223*53ee8cc1Swenshuai.xi E_CHECK_REVOKED = 1, 224*53ee8cc1Swenshuai.xi E_CHECK_NOT_REVOKED = 2, 225*53ee8cc1Swenshuai.xi }MDrvHDMITX_REVOCATION_STATE; 226*53ee8cc1Swenshuai.xi 227*53ee8cc1Swenshuai.xi typedef enum 228*53ee8cc1Swenshuai.xi { 229*53ee8cc1Swenshuai.xi E_RXFail_NORMAL_OUTPUT = 0, // still display normally 230*53ee8cc1Swenshuai.xi E_RXFail_HDCP_ENCRYPTION = 1, // HDCP encryption to show snow screen 231*53ee8cc1Swenshuai.xi E_RXFail_BLUE_SCREEN = 2, // blue screen 232*53ee8cc1Swenshuai.xi } MDrvHDMITX_HDCPRXFail_CONTROL; 233*53ee8cc1Swenshuai.xi 234*53ee8cc1Swenshuai.xi typedef enum 235*53ee8cc1Swenshuai.xi { 236*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_RESET = 0x01, 237*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_WAITING_ACTIVE_RX = 0x02, 238*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_CHECK_REPEATER_READY = 0x03, 239*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_CHECK_R0 = 0x04, 240*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_AUTH_DONE = 0x05, 241*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_AUTH_FAIL = 0x06, 242*53ee8cc1Swenshuai.xi 243*53ee8cc1Swenshuai.xi // bit[7:6]=00 for checking valid rx 244*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_RX_IS_NOT_VALID = 0x00, // 00 00 245*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_RX_IS_VALID = 0x10, // 00 01 246*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_RX_KEY_FAIL = 0x20, // 00 10 247*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_TX_KEY_FAIL = 0x30, // 00 11 248*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_RX_KEY_REVOKED = 0x0F, // 00 00 11 11 249*53ee8cc1Swenshuai.xi 250*53ee8cc1Swenshuai.xi // bit[7:6]=01 for repeater 251*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_REPEATER_TIMEOUT = 0x40, // 01 00 252*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_REPEATER_READY = 0x50, // 01 01 253*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_REPEATER_NOT_READY = 0x60, // 01 10 254*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_REPEATER_VALID = 0x70, // 01 11 255*53ee8cc1Swenshuai.xi 256*53ee8cc1Swenshuai.xi // bit[7:6]=10 for SHA1 257*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_REPEATER_SHA1_FAIL = 0x80, // 10 00 258*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_REPEATER_SHA1_PASS = 0x90, // 10 01 259*53ee8cc1Swenshuai.xi 260*53ee8cc1Swenshuai.xi // bit[7:6]=11 for Ri 261*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_SYNC_RI_FAIL = 0xC0, // 11 00 262*53ee8cc1Swenshuai.xi E_HDMITX_HDCP_SYNC_RI_PASS = 0xD0 // 11 01 263*53ee8cc1Swenshuai.xi }MsHDMITX_HDCP_AUTH_STATUS; 264*53ee8cc1Swenshuai.xi 265*53ee8cc1Swenshuai.xi typedef enum 266*53ee8cc1Swenshuai.xi { 267*53ee8cc1Swenshuai.xi HDCP14Tx_MainState_A0 = 0x00, 268*53ee8cc1Swenshuai.xi HDCP14Tx_MainState_A1andA2 = 0x01, 269*53ee8cc1Swenshuai.xi // HDCP14Tx_MainState_A2 = 0x02, 270*53ee8cc1Swenshuai.xi HDCP14Tx_MainState_A3 = 0x03, 271*53ee8cc1Swenshuai.xi HDCP14Tx_MainState_A4 = 0x04, 272*53ee8cc1Swenshuai.xi HDCP14Tx_MainState_A5 = 0x05, 273*53ee8cc1Swenshuai.xi HDCP14Tx_MainState_A6 = 0x06, 274*53ee8cc1Swenshuai.xi HDCP14Tx_MainState_A7 = 0x07, 275*53ee8cc1Swenshuai.xi HDCP14Tx_MainState_A8 = 0x08, 276*53ee8cc1Swenshuai.xi HDCP14Tx_MainState_A9 = 0x09, 277*53ee8cc1Swenshuai.xi } enHDCP14Tx_MainStates; 278*53ee8cc1Swenshuai.xi 279*53ee8cc1Swenshuai.xi typedef enum 280*53ee8cc1Swenshuai.xi { 281*53ee8cc1Swenshuai.xi HDCP14Tx_SubFSM_IDLE = 0x00, 282*53ee8cc1Swenshuai.xi HDCP14Tx_SubFSM_ExchangeKSV = 0x01, 283*53ee8cc1Swenshuai.xi HDCP14Tx_SubFSM_VerifyBksv = 0x02, 284*53ee8cc1Swenshuai.xi HDCP14Tx_SubFSM_Computation = 0x03, 285*53ee8cc1Swenshuai.xi HDCP14Tx_SubFSM_CheckR0 = 0x04, 286*53ee8cc1Swenshuai.xi HDCP14Tx_SubFSM_AuthDone = 0x05, 287*53ee8cc1Swenshuai.xi HDCP14Tx_SubFSM_PollingRdyBit = 0x06, 288*53ee8cc1Swenshuai.xi HDCP14Tx_SubFSM_AuthWithRepeater = 0x07, 289*53ee8cc1Swenshuai.xi HDCP14Tx_SubFSM_CheckRi = 0x08, 290*53ee8cc1Swenshuai.xi HDCP14Tx_SubFSM_AuthFail = 0x09 291*53ee8cc1Swenshuai.xi } enHDCP14Tx_SubStates; 292*53ee8cc1Swenshuai.xi 293*53ee8cc1Swenshuai.xi typedef struct __attribute__ ((packed)) 294*53ee8cc1Swenshuai.xi { 295*53ee8cc1Swenshuai.xi MS_BOOL hdcp_Rx_valid; 296*53ee8cc1Swenshuai.xi //MS_BOOL hdmitx_hdcp_flag; ///< hdmitx hdcp encryption on/off 297*53ee8cc1Swenshuai.xi 298*53ee8cc1Swenshuai.xi enHDCP14Tx_MainStates hdcp14tx_MainState; 299*53ee8cc1Swenshuai.xi enHDCP14Tx_SubStates hdcp14tx_SubState; 300*53ee8cc1Swenshuai.xi enHDCP14Tx_SubStates hdcp14tx_PreSubState; 301*53ee8cc1Swenshuai.xi 302*53ee8cc1Swenshuai.xi // HDCP 303*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_HdcpUseInternalKey_flag; ///< hdmitx HDCP key source 304*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_HdcpStartAuth_flag; ///< hdmitx HDCP start authentication flag 305*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_HdcpAuthDone_flag; ///< hdmitx HDCP authentication done flag 306*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_HdcpCheckRepeater_flag; ///< hdmitx HDCP check repeater flag 307*53ee8cc1Swenshuai.xi 308*53ee8cc1Swenshuai.xi // CEC 309*53ee8cc1Swenshuai.xi MsHDMITX_HDCP_AUTH_STATUS hdmitx_HDCPAuth_Status; ///< hdmitx HDCP authentication status 310*53ee8cc1Swenshuai.xi MDrvHDMITX_UNHDCPRX_CONTROL hdmitx_unHDCPRx_Control; ///< hdmitx unHDCP Rx ouput way 311*53ee8cc1Swenshuai.xi MDrvHDMITX_HDCPRXFail_CONTROL hdmitx_HDCPRxFail_Control; ///< hdmitx HDCP Rx fail output way 312*53ee8cc1Swenshuai.xi 313*53ee8cc1Swenshuai.xi MS_U8 hdcp_srmlist[5116]; // maximum length of the 1st generation 314*53ee8cc1Swenshuai.xi MS_U8 hdcp_revocationlist[5068]; // 5x max number of device 315*53ee8cc1Swenshuai.xi MS_BOOL revocationlist_ready; // revocationlist update flag 316*53ee8cc1Swenshuai.xi MS_U8 revocation_size; 317*53ee8cc1Swenshuai.xi MDrvHDMITX_REVOCATION_STATE revocation_state; // revocation check state 318*53ee8cc1Swenshuai.xi 319*53ee8cc1Swenshuai.xi MS_U8 HDCP_AKSV[5]; 320*53ee8cc1Swenshuai.xi MS_U8 HDCP_BKSV[5]; 321*53ee8cc1Swenshuai.xi MS_U8 ucBStatus[2]; 322*53ee8cc1Swenshuai.xi MS_BOOL HDCP_74_check; 323*53ee8cc1Swenshuai.xi MS_U32 u32AlignDummy; 324*53ee8cc1Swenshuai.xi } MDrvHdcpTx_PARAMETER_LIST; //wilson@kano 325*53ee8cc1Swenshuai.xi 326*53ee8cc1Swenshuai.xi enum enCEA_DATABLK_TAG_CODE //wilson@kano 327*53ee8cc1Swenshuai.xi { 328*53ee8cc1Swenshuai.xi CEATag_Reserved_0 = 0, 329*53ee8cc1Swenshuai.xi CEATag_AudioBlk = 1, 330*53ee8cc1Swenshuai.xi CEATag_VideoBlk = 2, 331*53ee8cc1Swenshuai.xi CEATag_VendorSpecific = 3, 332*53ee8cc1Swenshuai.xi CEATag_SpeakerAlloc = 4, 333*53ee8cc1Swenshuai.xi CEATag_VESA_DTCBlk = 5, 334*53ee8cc1Swenshuai.xi CEATag_Reserved_1 = 6, 335*53ee8cc1Swenshuai.xi CEATag_UseExtTag = 7 336*53ee8cc1Swenshuai.xi }; 337*53ee8cc1Swenshuai.xi 338*53ee8cc1Swenshuai.xi enum enCEA_DATABLK_EXT_TAG_CODE //wilson@kano 339*53ee8cc1Swenshuai.xi { 340*53ee8cc1Swenshuai.xi CEAExtTag_VideoCap_DB = 0, 341*53ee8cc1Swenshuai.xi CEAExtTag_VSVideo_DB = 1, 342*53ee8cc1Swenshuai.xi CEAExtTag_VESADisplayDev_DB = 2, 343*53ee8cc1Swenshuai.xi CEAExtTag_VESAVideoTimingBlk = 3, 344*53ee8cc1Swenshuai.xi CEAExtTag_ReservedHDMIVideoDB = 4, 345*53ee8cc1Swenshuai.xi CEAExtTag_ColorimetryDB = 5, 346*53ee8cc1Swenshuai.xi CEAExtTag_HDRStaticMetaDB = 6, 347*53ee8cc1Swenshuai.xi CEAExtTag_YCbCr420VideoDB = 14, 348*53ee8cc1Swenshuai.xi CEAExtTag_YCbCr420CapMapDB = 15, 349*53ee8cc1Swenshuai.xi CEAExtTag_ReservedCEAMiscAudio = 16, 350*53ee8cc1Swenshuai.xi CEAExtTag_VSAudioDB = 17, 351*53ee8cc1Swenshuai.xi CEAExtTag_ReservedHDMIAudioDB = 18, 352*53ee8cc1Swenshuai.xi CEAExtTag_InfoFrameDB = 32 353*53ee8cc1Swenshuai.xi }; 354*53ee8cc1Swenshuai.xi 355*53ee8cc1Swenshuai.xi typedef struct __attribute__ ((packed)) 356*53ee8cc1Swenshuai.xi { 357*53ee8cc1Swenshuai.xi MsHDMITX_AVI_VIC VideoTiming; 358*53ee8cc1Swenshuai.xi MsHDMITX_EDID_3D_STRUCTURE_ALL Video3DInfo; 359*53ee8cc1Swenshuai.xi MS_U32 u32AlignDummy; 360*53ee8cc1Swenshuai.xi } stHDMITX_RXEDID_VIDEO_INFO; //wilson@kano 361*53ee8cc1Swenshuai.xi 362*53ee8cc1Swenshuai.xi typedef struct __attribute__ ((packed)) 363*53ee8cc1Swenshuai.xi { 364*53ee8cc1Swenshuai.xi MS_U8 EdidBlk0[HDMITX_EDID_BLK_SIZE]; 365*53ee8cc1Swenshuai.xi MS_U8 EdidBlk1[HDMITX_EDID_BLK_SIZE]; 366*53ee8cc1Swenshuai.xi MS_U8 ManufacturerID[3]; 367*53ee8cc1Swenshuai.xi MS_U8 CEADataBlkLen[HDMITX_CEA_DAT_BLK_TYPE_NUM]; 368*53ee8cc1Swenshuai.xi MS_U8 PhyAddr[2]; 369*53ee8cc1Swenshuai.xi MS_BOOL SupportHdmi; 370*53ee8cc1Swenshuai.xi 371*53ee8cc1Swenshuai.xi //HF-VSDB, scdc relative 372*53ee8cc1Swenshuai.xi MS_U8 HF_VSDBVerInfo; 373*53ee8cc1Swenshuai.xi MS_U8 MaxTmdsCharRate; 374*53ee8cc1Swenshuai.xi #if 0 375*53ee8cc1Swenshuai.xi MS_BOOL SupportIndependView; 376*53ee8cc1Swenshuai.xi MS_BOOL SupportDualView; 377*53ee8cc1Swenshuai.xi MS_BOOL Support3DOsdDisparity; 378*53ee8cc1Swenshuai.xi #endif 379*53ee8cc1Swenshuai.xi MS_BOOL SupportLTEScramble; 380*53ee8cc1Swenshuai.xi MS_BOOL SupportSCDC; 381*53ee8cc1Swenshuai.xi MS_BOOL SupportRR; //read request 382*53ee8cc1Swenshuai.xi MS_U8 YUV420DeepColorInfo; 383*53ee8cc1Swenshuai.xi 384*53ee8cc1Swenshuai.xi MS_BOOL AudSupportAI; 385*53ee8cc1Swenshuai.xi #if 0 386*53ee8cc1Swenshuai.xi MS_BOOL b3DPresent; 387*53ee8cc1Swenshuai.xi MS_U8 b3dMultiPresent; 388*53ee8cc1Swenshuai.xi MS_U8 Hdmi3DLen; 389*53ee8cc1Swenshuai.xi MS_BOOL Support2D_50Hz; 390*53ee8cc1Swenshuai.xi MS_BOOL Support2D_60Hz; 391*53ee8cc1Swenshuai.xi MS_BOOL Support3D_50Hz; 392*53ee8cc1Swenshuai.xi MS_BOOL Support3D_60Hz; 393*53ee8cc1Swenshuai.xi #endif 394*53ee8cc1Swenshuai.xi MsHDMITX_VIDEO_COLORDEPTH_VAL ColorDepthInfo; 395*53ee8cc1Swenshuai.xi 396*53ee8cc1Swenshuai.xi // data block content 397*53ee8cc1Swenshuai.xi MS_U8 AudioDataBlk[32]; 398*53ee8cc1Swenshuai.xi MS_U8 VideoDataBlk[32]; 399*53ee8cc1Swenshuai.xi MS_U8 VendorDataBlk[32]; 400*53ee8cc1Swenshuai.xi MS_U8 SpeakerAllocDataBlk[32]; 401*53ee8cc1Swenshuai.xi MS_U8 VESA_DTCDataBlk[32]; 402*53ee8cc1Swenshuai.xi MS_U8 HdmiVICList[7]; //this field has only 3 bits 403*53ee8cc1Swenshuai.xi MS_U8 HdmiVICLen; 404*53ee8cc1Swenshuai.xi #if 0 405*53ee8cc1Swenshuai.xi stHDMITX_RXEDID_VIDEO_INFO SupVidTiming[32]; 406*53ee8cc1Swenshuai.xi #endif 407*53ee8cc1Swenshuai.xi 408*53ee8cc1Swenshuai.xi MS_U8 HDMI_VSDB[32]; 409*53ee8cc1Swenshuai.xi MS_U8 HDMI_VSDB_Len; 410*53ee8cc1Swenshuai.xi MS_U8 HF_VSDB[32]; 411*53ee8cc1Swenshuai.xi MS_U8 HF_VSDB_Len; 412*53ee8cc1Swenshuai.xi 413*53ee8cc1Swenshuai.xi //for 420 414*53ee8cc1Swenshuai.xi MS_BOOL Support420ColorFmt; 415*53ee8cc1Swenshuai.xi MS_U8 YCbCr420VidDataBlk[32]; 416*53ee8cc1Swenshuai.xi MS_U8 YCbCr420CapMapDataBlk[32]; 417*53ee8cc1Swenshuai.xi 418*53ee8cc1Swenshuai.xi //for colorimetry 419*53ee8cc1Swenshuai.xi MS_U8 ExtColorimetry; 420*53ee8cc1Swenshuai.xi 421*53ee8cc1Swenshuai.xi //for HDR 422*53ee8cc1Swenshuai.xi MS_BOOL bSupportHDR; 423*53ee8cc1Swenshuai.xi MS_U8 HDRStaticDataBlk[32]; 424*53ee8cc1Swenshuai.xi MS_U32 u32AlignDummy; 425*53ee8cc1Swenshuai.xi 426*53ee8cc1Swenshuai.xi } stHDMITX_RxEDID_Info; //wilson@kano 427*53ee8cc1Swenshuai.xi 428*53ee8cc1Swenshuai.xi typedef struct __attribute__ ((packed)) 429*53ee8cc1Swenshuai.xi { 430*53ee8cc1Swenshuai.xi MS_BOOL bHDMITxTaskIdCreated; 431*53ee8cc1Swenshuai.xi MS_BOOL bHDMITxEventIdCreated; 432*53ee8cc1Swenshuai.xi MS_BOOL bCheckRxTimerIdCreated; 433*53ee8cc1Swenshuai.xi 434*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_hdcp_flag; ///< hdmitx hdcp encryption on/off 435*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_enable_flag; ///< hdmitx module actived 436*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_tmds_flag; ///< hdmitx tmds on/off 437*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_video_flag; ///< hdmitx video on/off 438*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_audio_flag; ///< hdmitx audio on/off 439*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_csc_flag; ///< hdmitx csc on/off 440*53ee8cc1Swenshuai.xi //MS_BOOL hdmitx_audio_supportAI; ///< hdmitx audio support AI 441*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_RB_swap_flag; ///< hdmitx R/B swap 442*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_force_mode; ///< hdmitx output force mode: auto/force 443*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_force_output_color; ///< hdmitx output force color format: auto/force 444*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_AFD_override_mode; ///< hdmitx AFD override mode: auto/override 445*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_edid_ready; ///< hdmitx get ready to Rx's EDID 446*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_avmute_flag; ///< hdmitx AVMUTE status 447*53ee8cc1Swenshuai.xi 448*53ee8cc1Swenshuai.xi // CEC 449*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_CECEnable_flag; ///< hdmitx CEC enable flag 450*53ee8cc1Swenshuai.xi 451*53ee8cc1Swenshuai.xi MDrvHDMITX_FSM_STATE hdmitx_fsm_state; ///< hdmitx fsm state 452*53ee8cc1Swenshuai.xi MDrvHDMITX_FSM_STATE hdmitx_fsm_prestate; ///< hdmitx fsm pre-state 453*53ee8cc1Swenshuai.xi MsHDMITX_RX_STATUS hdmitx_preRX_status; ///< hdmitx previous Rx status 454*53ee8cc1Swenshuai.xi 455*53ee8cc1Swenshuai.xi MsHDMITX_OUTPUT_MODE output_mode; ///< output DVI / HDMI mode 456*53ee8cc1Swenshuai.xi MsHDMITX_OUTPUT_MODE force_output_mode; ///< output DVI / HDMI mode 457*53ee8cc1Swenshuai.xi MsHDMITX_COLORIMETRY colorimetry; 458*53ee8cc1Swenshuai.xi MsHDMITX_EXT_COLORIMETRY ext_colorimetry; 459*53ee8cc1Swenshuai.xi MsHDMITX_YCC_QUANT_RANGE enYCCQuantRange; 460*53ee8cc1Swenshuai.xi MsHDMITX_VIDEO_COLORDEPTH_VAL output_colordepth_val; // output video color depth 461*53ee8cc1Swenshuai.xi MsHDMITX_VIDEO_TIMING output_video_timing; ///< output video timing 462*53ee8cc1Swenshuai.xi MsHDMITX_VIDEO_TIMING output_video_prevtiming; ///< output video previous timing 463*53ee8cc1Swenshuai.xi MsHDMITX_VIDEO_COLOR_FORMAT input_color; ///< RGB444 / YUV444 464*53ee8cc1Swenshuai.xi MsHDMITX_VIDEO_COLOR_FORMAT output_color; ///< RGB444 / YUV444 465*53ee8cc1Swenshuai.xi MsHDMITX_YCC_QUANT_RANGE input_range; 466*53ee8cc1Swenshuai.xi MsHDMITX_YCC_QUANT_RANGE output_range; 467*53ee8cc1Swenshuai.xi MsHDMITX_VIDEO_COLOR_FORMAT force_output_color; ///< RGB444 / YUV444 468*53ee8cc1Swenshuai.xi MsHDMITX_VIDEO_ASPECT_RATIO output_aspect_ratio; // Aspect ratio 469*53ee8cc1Swenshuai.xi MsHDMITX_VIDEO_SCAN_INFO output_scan_info; // overscan / underscan 470*53ee8cc1Swenshuai.xi MsHDMITX_VIDEO_AFD_RATIO output_afd_ratio; // AFD 471*53ee8cc1Swenshuai.xi MS_U8 output_activeformat_present; // Active format information present 472*53ee8cc1Swenshuai.xi MsHDMITX_AUDIO_FREQUENCY output_audio_frequncy; ///< audio sampling frequency 473*53ee8cc1Swenshuai.xi MsHDMITX_AUDIO_CHANNEL_COUNT output_audio_channel; // audio channel count 474*53ee8cc1Swenshuai.xi MsHDMITX_AUDIO_CODING_TYPE output_audio_type; // audio coding type 475*53ee8cc1Swenshuai.xi 476*53ee8cc1Swenshuai.xi MsHDMITX_ANALOG_TUNING analog_setting; // HDMI Tx Pre-emphasis and Double termination 477*53ee8cc1Swenshuai.xi 478*53ee8cc1Swenshuai.xi MS_U8 ubSSCEn; 479*53ee8cc1Swenshuai.xi MS_VIRT u32PMRIUBaseAddress; 480*53ee8cc1Swenshuai.xi 481*53ee8cc1Swenshuai.xi #if !defined (__aarch64__) 482*53ee8cc1Swenshuai.xi MS_U32 u32AlignDummy0; 483*53ee8cc1Swenshuai.xi #endif 484*53ee8cc1Swenshuai.xi 485*53ee8cc1Swenshuai.xi MS_PHY u32PMBankSize; 486*53ee8cc1Swenshuai.xi 487*53ee8cc1Swenshuai.xi #if (defined(MSOS_TYPE_LINUX_KERNEL)) 488*53ee8cc1Swenshuai.xi MS_VIRT u32CoproRIUBase; 489*53ee8cc1Swenshuai.xi #if !defined (__aarch64__) 490*53ee8cc1Swenshuai.xi MS_U32 u32AlignDummy1; 491*53ee8cc1Swenshuai.xi #endif 492*53ee8cc1Swenshuai.xi #endif 493*53ee8cc1Swenshuai.xi 494*53ee8cc1Swenshuai.xi MS_BOOL hdmitx_bypass_flag; //RxTxBypass 495*53ee8cc1Swenshuai.xi 496*53ee8cc1Swenshuai.xi //EDID 497*53ee8cc1Swenshuai.xi stHDMITX_RxEDID_Info RxEdidInfo; //wilson@kano 498*53ee8cc1Swenshuai.xi 499*53ee8cc1Swenshuai.xi //wilson@kano: sorting previous EDID relative items 500*53ee8cc1Swenshuai.xi //map to ColorDepthInfo //MsHDMITX_VIDEO_COLORDEPTH_VAL edid_colordepth_val; // EDID video color depth 501*53ee8cc1Swenshuai.xi //map to PhyAddr[]//MS_U8 edid_phyadr[2]; // EDID physical address 502*53ee8cc1Swenshuai.xi //map to VideoDataBlk//MS_U8 short_video_descriptor[32]; // short video descriptor of EDID 503*53ee8cc1Swenshuai.xi //map to AudioDataBlk//MS_U8 short_audio_descriptor[32]; // short audio descriptor of EDID 504*53ee8cc1Swenshuai.xi //map to CEADataBlkLen//MS_U8 data_block_length[8]; // data block length of each data block 505*53ee8cc1Swenshuai.xi //map to ManufacturerID//MS_U8 id_manufacturer_name[3]; // ID Manufacturer Name 506*53ee8cc1Swenshuai.xi //map to EdidBlk0//MS_U8 edid_block0[128]; //EDID's 1st 128 data 507*53ee8cc1Swenshuai.xi //map to EdidBlk1//MS_U8 edid_block1[128]; //EDID's 2nd 128 data 508*53ee8cc1Swenshuai.xi //map to Support2D_50Hz//MS_BOOL edid_2D_50hz_support; 509*53ee8cc1Swenshuai.xi //map to Support2D_60Hz//MS_BOOL edid_2D_60hz_support; 510*53ee8cc1Swenshuai.xi //map to Support3D_50Hz//MS_BOOL edid_3D_50hz_support; 511*53ee8cc1Swenshuai.xi //map to Support3D_60Hz//MS_BOOL edid_3D_60hz_support; 512*53ee8cc1Swenshuai.xi //map to 3DPresent//MS_BOOL edid_3D_present; 513*53ee8cc1Swenshuai.xi //map to SupportHdmi//MS_BOOL edid_HDMI_support; 514*53ee8cc1Swenshuai.xi //SupVidTiming//MsHDMITX_EDID_3D_SUPPORT_TIMING edid_3D_support_timing[32]; 515*53ee8cc1Swenshuai.xi } MDrvHDMITX_PARAMETER_LIST; //wilson@kano 516*53ee8cc1Swenshuai.xi 517*53ee8cc1Swenshuai.xi // debug mask definition 518*53ee8cc1Swenshuai.xi #define HDMITX_DBG 0x01U ///< Debug PQ Table 519*53ee8cc1Swenshuai.xi #define HDMITX_DBG_HDCP 0x02U ///< Debug S RULE 520*53ee8cc1Swenshuai.xi #define HDMITX_DBG_UTILTX 0x04U ///< Debug S RULE 521*53ee8cc1Swenshuai.xi 522*53ee8cc1Swenshuai.xi /** 523*53ee8cc1Swenshuai.xi * @brief HDMI Status 524*53ee8cc1Swenshuai.xi */ 525*53ee8cc1Swenshuai.xi typedef struct 526*53ee8cc1Swenshuai.xi { 527*53ee8cc1Swenshuai.xi MS_BOOL bIsInitialized; 528*53ee8cc1Swenshuai.xi MS_BOOL bIsRunning; 529*53ee8cc1Swenshuai.xi }MS_HDMI_TX_Status; 530*53ee8cc1Swenshuai.xi 531*53ee8cc1Swenshuai.xi typedef struct 532*53ee8cc1Swenshuai.xi { 533*53ee8cc1Swenshuai.xi MS_BOOL bIsInitialized; 534*53ee8cc1Swenshuai.xi MS_BOOL bIsRunning; 535*53ee8cc1Swenshuai.xi }MS_HDCP_TX_Status; 536*53ee8cc1Swenshuai.xi 537*53ee8cc1Swenshuai.xi // Debug 538*53ee8cc1Swenshuai.xi /** 539*53ee8cc1Swenshuai.xi * @brief HDMI Info 540*53ee8cc1Swenshuai.xi */ 541*53ee8cc1Swenshuai.xi typedef struct 542*53ee8cc1Swenshuai.xi { 543*53ee8cc1Swenshuai.xi MS_U8 Reserved; 544*53ee8cc1Swenshuai.xi }MS_HDMI_TX_INFO; 545*53ee8cc1Swenshuai.xi 546*53ee8cc1Swenshuai.xi typedef struct 547*53ee8cc1Swenshuai.xi { 548*53ee8cc1Swenshuai.xi // HDMI Tx Current, Pre-emphasis and Double termination 549*53ee8cc1Swenshuai.xi MS_U8 tm_txcurrent; // TX current control(U4: 0x11302B[13:12], K1: 0x11302B[13:11]) 550*53ee8cc1Swenshuai.xi MS_U8 tm_pren2; // pre-emphasis mode control, 0x11302D[5] 551*53ee8cc1Swenshuai.xi MS_U8 tm_precon; // TM_PRECON, 0x11302E[7:4] 552*53ee8cc1Swenshuai.xi MS_U8 tm_pren; // pre-emphasis enable, 0x11302E[11:8] 553*53ee8cc1Swenshuai.xi MS_U8 tm_tenpre; // Double termination pre-emphasis enable, 0x11302F[3:0] 554*53ee8cc1Swenshuai.xi MS_U8 tm_ten; // Double termination enable, 0x11302F[7:4] 555*53ee8cc1Swenshuai.xi } drvHDMITX_ANALOG_TUNING; 556*53ee8cc1Swenshuai.xi 557*53ee8cc1Swenshuai.xi typedef enum 558*53ee8cc1Swenshuai.xi { 559*53ee8cc1Swenshuai.xi E_HDMITX_TIMING_ERR_NONE = 0x00000000, 560*53ee8cc1Swenshuai.xi E_HDMITX_TIMING_ERR_CFG_ERR = 0x00000001, 561*53ee8cc1Swenshuai.xi E_HDMITX_TIMING_ERR_EDID_ERR = 0x00000002, 562*53ee8cc1Swenshuai.xi E_HDMITX_TIMING_ERR_COLOR_FMT = 0x00000004, 563*53ee8cc1Swenshuai.xi E_HDMITX_TIMING_ERR_COLOR_DEPTH = 0x00000008, 564*53ee8cc1Swenshuai.xi E_HDMITX_TIMING_ERR_TIMING = 0x00000010, 565*53ee8cc1Swenshuai.xi E_HDMITX_TIMING_ERR_HW_LIMIT = 0x00000020, 566*53ee8cc1Swenshuai.xi E_HDMITX_TIMING_ERR_SW_LIMIT = 0x00000040, 567*53ee8cc1Swenshuai.xi E_HDMITX_TIMING_ERR_SINK_LIMIT = 0x00000080, 568*53ee8cc1Swenshuai.xi E_HDMITX_TIMING_ERR_MAX = 0xFFFFFFFF 569*53ee8cc1Swenshuai.xi }MsHDMITX_TIMING_ERROR; 570*53ee8cc1Swenshuai.xi 571*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 572*53ee8cc1Swenshuai.xi // Function Prototype 573*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 574*53ee8cc1Swenshuai.xi #ifdef MDRV_HDMITX_C 575*53ee8cc1Swenshuai.xi #define INTERFACED 576*53ee8cc1Swenshuai.xi #else 577*53ee8cc1Swenshuai.xi #define INTERFACED extern 578*53ee8cc1Swenshuai.xi #endif 579*53ee8cc1Swenshuai.xi 580*53ee8cc1Swenshuai.xi INTERFACED void* pu32HDMITXInst; 581*53ee8cc1Swenshuai.xi INTERFACED void* pu32HDMITXRes[E_HDMITX_POOL_ID_MAX]; 582*53ee8cc1Swenshuai.xi 583*53ee8cc1Swenshuai.xi INTERFACED MS_U32 MDrv_HDMITx_Get_Semaphore(void *pInstance); 584*53ee8cc1Swenshuai.xi INTERFACED MS_U32 MDrv_HDMITx_Release_Semaphore(void *pInstance); 585*53ee8cc1Swenshuai.xi 586*53ee8cc1Swenshuai.xi /*********************************************************************/ 587*53ee8cc1Swenshuai.xi /* */ 588*53ee8cc1Swenshuai.xi /* HDCP22 Relative */ 589*53ee8cc1Swenshuai.xi /* */ 590*53ee8cc1Swenshuai.xi /*********************************************************************/ 591*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_HDCP2AccessX74(MS_U8 u8PortIdx, MS_U8 u8OffsetAddr, MS_U8 u8OpCode, MS_U8 *pu8RdBuf, MS_U8 *pu8WRBuff, MS_U16 u16RdLen, MS_U16 u16WRLen); 592*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_HDCP2TxInit(MS_U8 u8PortIdx, MS_BOOL bEnable); 593*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_HDCP2TxEnableEncryptEnable(MS_U8 u8PortIdx, MS_BOOL bEnable); 594*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_HDCP2TxFillCipherKey(MS_U8 u8PortIdx, MS_U8 *pu8Riv, MS_U8 *pu8KsXORLC128); 595*53ee8cc1Swenshuai.xi 596*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDCPTx_SetAksv2R0Interval(MS_U32 u32Interval); 597*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDCPTx_SetUnHDCPRxCtrl(void* pInstance, MDrvHDMITX_UNHDCPRX_CONTROL enUnHDCPCtrl); 598*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDCPTx_SetHDCPRxFailCtrl(void* pInstance, MDrvHDMITX_UNHDCPRX_CONTROL enUnHDCPCtrl); 599*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDCPTx_GetAuthDoneFlag(void* pInstance); //wilson@kano 600*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDCPTx_GetHdcpKey(void* pInstance, MS_BOOL useinternalkey, MS_U8 *data); 601*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDCPTx_GetBksv(void* pInstance, MS_U8 *pucData); 602*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDCPTx_GetAksv(void* pInstance, MS_U8 *pucData); 603*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDCPTx_GetRevocationKeyList(void* pInstance, MS_U8 *data, MS_U16 size); 604*53ee8cc1Swenshuai.xi INTERFACED enHDCP14Tx_SubStates MDrv_HDCPTx_GetPreState(void* pInstance); 605*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDCPTx_GetRxValid(void* pInstance); //wilson@kano 606*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDCPTx_GetKSVList(MS_U8 *pu8Bstatus, MS_U8* pu8KSVList, MS_U16 u16BufLen, MS_U16 *pu16KSVLength); 607*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDCPTx_CheckAuthFailFlag(void* pInstance); 608*53ee8cc1Swenshuai.xi INTERFACED MDrvHDMITX_REVOCATION_STATE MDrv_HDCPTx_RevocationKey_Check(void* pInstance); 609*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDCPTx_IsSRMSignatureValid(MS_U8 *data, MS_U32 size); 610*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDCPTx_StartAuth(void* pInstance, MS_BOOL bFlag); 611*53ee8cc1Swenshuai.xi /////////////////////////// HDMI TX relative 612*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_EdidChecking(void* pInstance); 613*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_GetHdcpEnFlag(void* pInstance); 614*53ee8cc1Swenshuai.xi INTERFACED MsHDMITX_OUTPUT_MODE MDrv_HDMITx_GetOutputMode(void* pInstance); 615*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_GetRxStatus(void); 616*53ee8cc1Swenshuai.xi INTERFACED MsHDMITX_RX_STATUS MDrv_HDMITx_GetFullRxStatus(void* pInstance); 617*53ee8cc1Swenshuai.xi INTERFACED MsHDMITX_VIDEO_COLORDEPTH_VAL MDrv_HDMITx_GetDeepColorMode(void* pInstance); 618*53ee8cc1Swenshuai.xi INTERFACED MsHDMITX_VIDEO_TIMING MDrv_HDMITx_GetOutputTiming(void* pInstance); 619*53ee8cc1Swenshuai.xi INTERFACED MsHDMITX_VIDEO_COLOR_FORMAT MDrv_HDMITx_GetColorFormat(void* pInstance); 620*53ee8cc1Swenshuai.xi INTERFACED MsHDMITX_VIDEO_COLORDEPTH_VAL MDrv_HDMITx_GetRxDCInfoFromEDID(void* pInstance); 621*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_GetEdidRdyFlag(void* pInstance); 622*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetRxVideoFormatFromEDID(void* pInstance, MS_U8 *pu8Buffer, MS_U8 u8BufSize); 623*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetDataBlockLengthFromEDID(void* pInstance, MS_U8 *pu8Length, MS_U8 u8TagCode); 624*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetRxAudioFormatFromEDID(void* pInstance, MS_U8 *pu8Buffer, MS_U8 u8BufSize); 625*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_EdidGetHDMISupportFlag(void* pInstance); 626*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetRxIDManufacturerName(void* pInstance, MS_U8 *pu8Buffer); 627*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetEDIDData(void* pInstance, MS_U8 *pu8Buffer, MS_BOOL BlockIdx); 628*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetRx3DStructureFromEDID(void* pInstance, MsHDMITX_VIDEO_TIMING timing, MsHDMITX_EDID_3D_STRUCTURE_ALL *p3DStructure); 629*53ee8cc1Swenshuai.xi INTERFACED MS_U32 MDrv_HDMITx_GetAudioCTS(void); 630*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_GetAVMUTEStatus(void* pInstance); 631*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_GetLibVer(const MSIF_Version **ppVersion); 632*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_GetInfo(MS_HDMI_TX_INFO *pInfo); 633*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_GetStatus(MS_HDMI_TX_Status *pStatus); 634*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetEDIDPhyAdr(void* pInstance, MS_U8* pucData); 635*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_GetVICListFromEDID(void* pInstance, MS_U8 *pu8Buffer, MS_U8 u8BufSize); 636*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_GetColorFormatFromEDID(void* pInstance, MsHDMITX_VIDEO_TIMING timing, MsHDMITX_EDID_COLOR_FORMAT *pColorFmt); 637*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetAudioDataBlock(void* pInstance, MS_U8* pu8Data, MS_U32 u32DataLen, MS_U32* pu32RealLen); 638*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetVideoDataBlock(void* pInstance, MS_U8* pu8Data, MS_U32 u32DataLen, MS_U32* pu32RealLen); 639*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetVSDB(void* pInstance, MS_U8* pu8Data, MS_U32 u32DataLen, MS_U32* pu32RealLen); 640*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetHFVSDB(void* pInstance, MS_U8* pu8Data, MS_U32 u32DataLen, MS_U32* pu32RealLen); 641*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetColorimetryDataBlock(void* pInstance, MS_U8* pu8Data, MS_U32 u32DataLen, MS_U32* pu32RealLen); 642*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_GetHDRStaticMetaDataBlock(void* pInstance, MS_U8* pu8Data, MS_U32 u32DataLen, MS_U32* pu32RealLen); 643*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_Get420VideoDataBlock(void* pInstance, MS_U8* pu8Data, MS_U32 u32DataLen, MS_U32* pu32RealLen); 644*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_Get420CapabilityMapDataBlock(void* pInstance, MS_U8* pu8Data, MS_U32 u32DataLen, MS_U32* pu32RealLen); 645*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetTMDSOnOff(void* pInstance, MS_BOOL state); 646*53ee8cc1Swenshuai.xi INTERFACED MS_U32 MDrv_HDMITx_GetTMDSStatus(void* pInstance); 647*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetHDMITxMode(void* pInstance, MsHDMITX_OUTPUT_MODE mode); 648*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetDeepColorMode(void* pInstance, MsHDMITX_VIDEO_COLORDEPTH_VAL enDeepColorMode); 649*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetRBChannelSwap(void* pInstance, MS_BOOL state); //wilson@kano 650*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetVideoOnOff(void* pInstance, MS_BOOL state); 651*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetColorFormat(void* pInstance, MsHDMITX_VIDEO_COLOR_FORMAT enInColor, MsHDMITX_VIDEO_COLOR_FORMAT enOutColor); 652*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_ColorandRange_Transform(void* pInstance, MsHDMITX_VIDEO_COLOR_FORMAT incolor, MsHDMITX_VIDEO_COLOR_FORMAT outcolor, MsHDMITX_YCC_QUANT_RANGE inange, MsHDMITX_YCC_QUANT_RANGE outrange); 653*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetAVMUTE(void* pInstance, MS_BOOL bflag); 654*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_Set_VS_InfoFrame(void* pInstance, MsHDMITX_VIDEO_VS_FORMAT enVSFmt, MsHDMITX_VIDEO_4k2k_VIC enVid4K2KVic, MsHDMITX_VIDEO_3D_STRUCTURE enVid3DStruct); 655*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetVideoOutputMode(void* pInstance, MsHDMITX_VIDEO_TIMING enVidTiming); 656*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetVideoOutputModeByCustomer(void* pInstance, MsHDMITX_VIDEO_TIMING enVidTiming, stHDMITX_TIMING_INFO_BY_CUSTOMER stTimingInfo); 657*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetVideoOutputAsepctRatio(void* pInstance, MsHDMITX_VIDEO_ASPECT_RATIO enOutputAR); 658*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetVideoOutputOverscan_AFD(void* pInstance, MS_U8 ucA0, MS_BOOL bAFDOverwrite, MsHDMITX_VIDEO_SCAN_INFO enScanInfo, MsHDMITX_VIDEO_AFD_RATIO enAFDRatio); 659*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetAudioOnOff(void* pInstance, MS_BOOL state); 660*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetAudioFrequency(void* pInstance, MsHDMITX_AUDIO_FREQUENCY enAudFreq); 661*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetAudioChCnt(void* pInstance, MsHDMITX_AUDIO_CHANNEL_COUNT enChCnt); 662*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetAudioFmt(void* pInstance, MsHDMITX_AUDIO_CODING_TYPE enAudFmt); 663*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetAudioSourceFormat(MsHDMITX_AUDIO_SOURCE_FORMAT fmt); 664*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetHDCPOnOff(void* pInstance, MS_BOOL state); 665*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetHDCPFlag(void* pInstance, MS_BOOL bEnableHdcp); 666*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_SetDbgLevel(MS_U16 u16DbgSwitch); 667*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetHPDGpioPin(MS_U8 u8pin); 668*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetCECOnOff(void* pInstance, MS_BOOL bflag); 669*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_SetAVIInfoExtColorimetry(void* pInstance, MsHDMITX_EXT_COLORIMETRY enExtColorimetry, MsHDMITX_YCC_QUANT_RANGE enYccQuantRange); 670*53ee8cc1Swenshuai.xi INTERFACED MS_U8 MDrv_HDMITx_SetAVIInfoColorimetry(void* pInstance, MsHDMITX_COLORIMETRY enColorimetry); 671*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_GetCECStatus(void* pInstance); 672*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_Power_OnOff(MS_BOOL bEnable); 673*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_TurnOnOff(void *pInstance, MS_BOOL state); 674*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_EnablePacketGen(MS_BOOL bflag); 675*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_PKT_User_Define_Clear(void); 676*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_PKT_User_Define(MsHDMITX_PACKET_TYPE packet_type, MS_BOOL def_flag, MsHDMITX_PACKET_PROCESS def_process, MS_U8 def_fcnt); 677*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_PKT_Content_Define(MsHDMITX_PACKET_TYPE packet_type, MS_U8* data, MS_U8 length); 678*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_MuteAudioFIFO(MS_BOOL bflag); 679*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_AnalogTuning(void* pInstance, drvHDMITX_ANALOG_TUNING *pInfo); 680*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_ForceHDMIOutputMode(void* pInstance, MS_BOOL bflag, MsHDMITX_OUTPUT_MODE output_mode); 681*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_ForceHDMIOutputColorFormat(void* pInstance, MS_BOOL bflag, MsHDMITX_VIDEO_COLOR_FORMAT output_color); 682*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_DisableRegWrite(MS_BOOL bFlag); 683*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_RxBypass_Mode(void* pInstance, MsHDMITX_INPUT_FREQ freq, MS_BOOL bflag); 684*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_Disable_RxBypass(void* pInstance); 685*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_IsSupportDVIMode(void); 686*53ee8cc1Swenshuai.xi INTERFACED MS_U32 MDrv_HDMITx_SetPowerState(void* pInstance, EN_POWER_MODE u16PowerState); 687*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_DisableTMDSCtrl(MS_BOOL bFlag); 688*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_Exhibit(void* pInstance); 689*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITxHDCPTx_Init(void* pInstance); //wilson@kano 690*53ee8cc1Swenshuai.xi INTERFACED MS_BOOL MDrv_HDMITx_SSC_Enable(void* pInstance, MS_U8 ubSSCEn); 691*53ee8cc1Swenshuai.xi INTERFACED MsHDMITX_TIMING_ERROR MDrv_HDMITx_CheckLegalTiming(void* pInstance, MsHDMITX_OUTPUT_MODE eOutputMode, MsHDMITX_VIDEO_TIMING idx, MsHDMITX_VIDEO_COLOR_FORMAT incolor_fmt, MsHDMITX_VIDEO_COLOR_FORMAT outcolor_fmt, MsHDMITX_VIDEO_COLORDEPTH_VAL color_depth); 692*53ee8cc1Swenshuai.xi INTERFACED MsHDMITX_TIMING_ERROR MDrv_HDMITx_CheckEDIDTiming(void* pInstance, MsHDMITX_AVI_VIC eVIC, MS_U32 uiPxlClk, MsHDMITX_VIDEO_COLOR_FORMAT incolor_fmt, MsHDMITX_VIDEO_COLOR_FORMAT outcolor_fmt, MsHDMITX_VIDEO_COLORDEPTH_VAL color_depth); 693*53ee8cc1Swenshuai.xi INTERFACED MsHDMITX_TIMING_ERROR MDrv_HDMITx_CheckEDIDColorFormat(void* pInstance, MsHDMITX_VIDEO_TIMING idx, MsHDMITX_AVI_VIC eVIC, MsHDMITX_VIDEO_COLOR_FORMAT incolor_fmt, MsHDMITX_VIDEO_COLOR_FORMAT outcolor_fmt, MsHDMITX_VIDEO_COLORDEPTH_VAL color_depth); 694*53ee8cc1Swenshuai.xi INTERFACED MsHDMITX_TIMING_ERROR MDrv_HDMITx_CheckEDIDColorDepth(void* pInstance, MsHDMITX_VIDEO_COLOR_FORMAT outcolor_fmt, MsHDMITX_VIDEO_COLORDEPTH_VAL color_depth); 695*53ee8cc1Swenshuai.xi 696*53ee8cc1Swenshuai.xi #ifdef CONFIG_UTOPIA_PROC_DBG_SUPPORT 697*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_MDCMDEchoCommand(void* pInstance, MS_U64* u64ReqHdl, char* pcCmdLine); 698*53ee8cc1Swenshuai.xi INTERFACED void MDrv_HDMITx_MDCMDGetInfo(void* pInstance, MS_U64* u64ReqHdl); 699*53ee8cc1Swenshuai.xi #endif 700*53ee8cc1Swenshuai.xi 701*53ee8cc1Swenshuai.xi #ifdef __cplusplus 702*53ee8cc1Swenshuai.xi } 703*53ee8cc1Swenshuai.xi #endif 704*53ee8cc1Swenshuai.xi 705*53ee8cc1Swenshuai.xi #endif // _DRV_HDMITX_H_ 706*53ee8cc1Swenshuai.xi 707