1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. MStar shall retain any and all right, ownership and interest to MStar 17 // Software and any modification/derivatives thereof. 18 // No right, ownership, or interest to MStar Software and any 19 // modification/derivatives thereof is transferred to you under Terms. 20 // 21 // 2. You understand that MStar Software might include, incorporate or be 22 // supplied together with third party`s software and the use of MStar 23 // Software may require additional licenses from third parties. 24 // Therefore, you hereby agree it is your sole responsibility to separately 25 // obtain any and all third party right and license necessary for your use of 26 // such third party`s software. 27 // 28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29 // MStar`s confidential information and you agree to keep MStar`s 30 // confidential information in strictest confidence and not disclose to any 31 // third party. 32 // 33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34 // kind. Any warranties are hereby expressly disclaimed by MStar, including 35 // without limitation, any warranties of merchantability, non-infringement of 36 // intellectual property rights, fitness for a particular purpose, error free 37 // and in conformity with any international standard. You agree to waive any 38 // claim against MStar for any loss, damage, cost or expense that you may 39 // incur related to your use of MStar Software. 40 // In no event shall MStar be liable for any direct, indirect, incidental or 41 // consequential damages, including without limitation, lost of profit or 42 // revenues, lost or damage of data, and unauthorized system use. 43 // You agree that this Section 4 shall still apply without being affected 44 // even if MStar Software has been modified by MStar in accordance with your 45 // request or instruction for your use, except otherwise agreed by both 46 // parties in writing. 47 // 48 // 5. If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 //////////////////////////////////////////////////////////////////////////////// 79 // 80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81 // All rights reserved. 82 // 83 // Unless otherwise stipulated in writing, any and all information contained 84 // herein regardless in any format shall remain the sole proprietary of 85 // MStar Semiconductor Inc. and be kept in strict confidence 86 // (!��MStar Confidential Information!�L) by the recipient. 87 // Any unauthorized act including without limitation unauthorized disclosure, 88 // copying, use, reproduction, sale, distribution, modification, disassembling, 89 // reverse engineering and compiling of the contents of MStar Confidential 90 // Information is unlawful and strictly prohibited. MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 #ifndef _HAL_GOP_H_ 96 #define _HAL_GOP_H_ 97 98 #include "drvGOP.h" 99 #include "regGOP.h" 100 101 #include "apiGOP.h" 102 103 //------------------------------------------------------------------------------------------------- 104 // Macro and Define 105 //------------------------------------------------------------------------------------------------- 106 #define Gop23_GwinCtl_Ofet 0UL 107 108 #define MAX_GOP_MIUCOUNT 3UL 109 #define MAX_GOP_MIUSEL MAX_GOP_MIUCOUNT-1 110 #define MAX_GOP_SUPPORT 5UL 111 #define MAX_GOP_MUX 5UL 112 #define MAX_GOP_MUX_SEL 5UL 113 #define MAX_GOP_MUX_OPNum MAX_GOP_MUX 114 #define MAX_GOP_DualMUX_Num 3UL 115 #define MAX_GOP0_GWIN 2UL 116 #define MAX_GOP1_GWIN 2UL 117 #define MAX_GOP2_GWIN 1UL 118 #define MAX_GOP3_GWIN 1UL 119 #define MAX_GOP4_GWIN 1UL 120 #define MAX_GOP5_GWIN 0UL 121 122 #define GOP0_Gwin0Id 0UL 123 #define GOP0_Gwin1Id 1UL 124 #define GOP1_Gwin0Id 2UL 125 #define GOP1_Gwin1Id 3UL 126 #define GOP2_Gwin0Id 4UL 127 #define GOP3_Gwin0Id 5UL 128 #define GOP4_Gwin0Id 6UL 129 #define GOP5_Gwin0Id 7UL 130 131 #define GOP0_REG_FORM E_GOP_REG_FORM_2G + E_GOP_PAL_SIZE_256 132 #define GOP1_REG_FORM E_GOP_REG_FORM_2G + E_GOP_PAL_SIZE_256 133 #define GOP2_REG_FORM E_GOP_REG_FORM_T81G + E_GOP_PAL_SIZE_NONE 134 #define GOP3_REG_FORM E_GOP_REG_FORM_T81G + E_GOP_PAL_SIZE_NONE 135 #define GOP4_REG_FORM E_GOP_REG_FORM_NONE 136 #define GOP5_REG_FORM E_GOP_REG_FORM_NONE 137 #define GOPD_REG_FORM E_GOPD_FIFO_DEPTH_64 138 139 140 #define GOP0_GwinIdBase GOP0_Gwin0Id 141 #define GOP1_GwinIdBase MAX_GOP0_GWIN 142 #define GOP2_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN 143 #define GOP3_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN 144 #define GOP4_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN + MAX_GOP3_GWIN 145 #define GOP5_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN + MAX_GOP3_GWIN + MAX_GOP4_GWIN 146 147 #define GOP_MIXER_MUX 6UL 148 149 150 #define GOP_BIT0 0x01 151 #define GOP_BIT1 0x02 152 #define GOP_BIT2 0x04 153 #define GOP_BIT3 0x08 154 #define GOP_BIT4 0x10 155 #define GOP_BIT5 0x20 156 #define GOP_BIT6 0x40 157 #define GOP_BIT7 0x80 158 #define GOP_BIT8 0x0100 159 #define GOP_BIT9 0x0200 160 #define GOP_BIT10 0x0400 161 #define GOP_BIT11 0x0800 162 #define GOP_BIT12 0x1000 163 #define GOP_BIT13 0x2000 164 #define GOP_BIT14 0x4000 165 #define GOP_BIT15 0x8000 166 167 #define GOP_REG_WORD_MASK 0xFFFFUL 168 #define GOP_REG_HW_MASK 0xFF00UL 169 #define GOP_REG_LW_MASK 0x00FFUL 170 171 #define GOP_WordUnit 32 172 #define GOP_DWIN_WordUnit 32UL 173 #define GOP_TotalGwinNum (MAX_GOP0_GWIN+MAX_GOP1_GWIN+MAX_GOP2_GWIN+MAX_GOP3_GWIN+MAX_GOP4_GWIN+MAX_GOP5_GWIN) 174 #define HAL_GOP_BankOffset(pGOPHalLocal) ((pGOPHalLocal)->bank_offset) 175 176 #define GOP_FIFO_BURST_ALL (GOP_BIT8|GOP_BIT9|GOP_BIT10|GOP_BIT11|GOP_BIT12) 177 #define GOP_FIFO_BURST_MIDDLE (GOP_BIT8|GOP_BIT9) 178 #define GOP_FIFO_BURST_SHORT (GOP_BIT8) 179 #define GOP_DMA_ACCESS_HIGH_PRIORITY (GOP_BIT14|GOP_BIT15) 180 181 182 #define GOP_FIFO_BURST_MASK (GOP_BIT8|GOP_BIT9|GOP_BIT10|GOP_BIT11|GOP_BIT12) 183 #define GOP_FIFO_THRESHOLD 0xD0UL 184 185 #ifndef GOP_MIU0_LENGTH 186 #define GOP_MIU0_LENGTH HAL_MIU1_BASE 187 #endif 188 189 #define DWIN_SUPPORT_WINDOWDE_CAPTURE FALSE //HW issue, Not support it, should use FrameDE to capture video for DWIN 190 #define DWIN_SUPPORT_OSD_CAPTURE FALSE //Support it 191 #define DWIN_SUPPORT_CLOCK_GATING FALSE //Support it 192 193 #define ENABLE_GOP_T3DPATCH 194 #ifdef ENABLE_GOP_T3DPATCH 195 #define GOP_PD_T3D 0x170UL 196 #define GOP_PD_NORMAL 0xEFUL 197 #endif 198 199 // HW patch 200 // #define XC_FSC_FRC_PATCH 0 201 #define GOP_AFBC_PRELOAD_PATCH 202 203 #define GOP_4K2K30 204 #define OUTPUT_VAILD_SIZE_PATCH 205 206 #define GOP_PUBLIC_UPDATE MAX_GOP_SUPPORT 207 208 #if (MAX_GOP_SUPPORT < 5) 209 #define GFLIP_REG_BANKS (MAX_GOP_SUPPORT * GOP_BANK_OFFSET) 210 #else 211 #define GFLIP_REG_BANKS (MAX_GOP_SUPPORT * GOP_BANK_OFFSET + 2) 212 #endif 213 #define GFLIP_REG16_NUM_PER_BANK 128UL 214 215 #define GPU_TILE_FORMAT_ARGB8888 0x5UL 216 217 #if (defined ANDROID) && (defined TV_OS) 218 #define GOP_CMDQ_ENABLE 219 #endif 220 221 #ifdef GOP_CMDQ_ENABLE 222 #include "drvCMDQ.h" 223 #endif 224 225 #define GOP_SUPPORT_SPLIT_MODE 1 226 #define GOP_SPLIT_SUPPORT_MAXW (512UL) 227 228 #define ENABLE_MANUAL_CROP 1 229 230 #define AFBC_ALIGN_FACTOR 16 231 232 #define VE_MUX_INIT_VALUE 5UL 233 234 //Gwin enable HW bug 235 #define GOP_AUTO_CLK_GATING_PATCH 236 237 /*the following is for parameters for shared between multiple process context*/ 238 typedef struct __attribute__((packed)) 239 { 240 GOP_CHIP_PROPERTY gopChipProperty; 241 MS_U16 u16GopSplitMode_LRWIDTH[SHARED_GOP_MAX_COUNT]; 242 DRV_GOPDstType GOP_Dst[SHARED_GOP_MAX_COUNT]; 243 }GOP_CTX_HAL_SHARED; 244 245 /*the following is for parameters for used in local process context*/ 246 typedef struct 247 { 248 GOP_CTX_HAL_SHARED *pHALShared; 249 MS_VIRT va_mmio_base; 250 MS_U32 bank_offset; 251 MS_U16 u16Clk0Setting; ///Backup Current GOPG clock setting 252 MS_U16 u16Clk1Setting; ///Backup Current GOPD clock setting 253 MS_U16 u16Clk2Setting; ///Backup Current SRAM clock setting 254 DRV_GOPDstType drvGFlipGOPDst[MAX_GOP_SUPPORT]; 255 GOP_CHIP_PROPERTY *pGopChipPro; 256 DRV_GOP_CONSALPHA_BITS User_ConsAlpha_bits; 257 258 /*check all gop dst is valid or not for each mux*/ 259 MS_BOOL *pbIsMuxVaildToGopDst; 260 }GOP_CTX_HAL_LOCAL; 261 262 typedef struct 263 { 264 GOP_CTX_HAL_LOCAL GOPHalSTRCtx; 265 MS_U16 BankReg[GFLIP_REG_BANKS][GFLIP_REG16_NUM_PER_BANK]; 266 MS_U16 CKG_GopReg[10]; 267 MS_U16 GS_GopReg[3]; 268 MS_U16 XC_GopReg[20]; 269 }GFLIP_REGS_SAVE_AREA; 270 271 //VE register bank 272 typedef enum 273 { 274 MS_VE_REG_BANK_3B, 275 MS_VE_REG_BANK_3E, 276 MS_VE_REG_BANK_3F, 277 } MS_VE_REG_BANK; 278 279 typedef enum 280 { 281 EN_OSD_0, 282 EN_OSD_1, 283 }EN_VE_OSD_ENABLE; 284 285 /*To write VE bank register*/ 286 extern void MApi_VE_W2BYTE_MSK(MS_VE_REG_BANK VE_BK, MS_U32 u32Reg, MS_U16 u16Val, MS_U16 u16Mask); 287 extern MS_U16 MApi_VE_R2BYTE_MSK(MS_VE_REG_BANK VE_BK, MS_U32 u32Reg, MS_U16 u16Mask); 288 289 //------------------------------------------------------------------------------------------------- 290 // Type and Structure 291 //------------------------------------------------------------------------------------------------- 292 typedef enum 293 { 294 E_GOP0 = 0, 295 E_GOP1 = 1, 296 E_GOP2 = 2, 297 E_GOP3 = 3, 298 E_GOP4 = 4, 299 E_GOP_Dwin = 5, 300 E_GOP_MIXER = 6, 301 E_GOP5 = 7, 302 }E_GOP_TYPE; 303 304 //------------------------------------------------------------------------------------------------- 305 // Function and Variable 306 //------------------------------------------------------------------------------------------------- 307 MS_BOOL _GetBnkOfstByGop(MS_U8 gop, MS_U32 *pBnkOfst); 308 void HAL_GOP_Init(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum); 309 void HAL_GOP_Init_Context(GOP_CTX_HAL_LOCAL *pGOPHalLocal, 310 GOP_CTX_HAL_SHARED *pHALShared, MS_BOOL bNeedInitShared); 311 void HAL_GOP_Chip_Proprity_Init(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 312 void HAL_GOP_Restore_Ctx(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 313 void HAL_GOP_Write16Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32addr, MS_U16 u16val, MS_U16 mask); 314 void HAL_GOP_Write32Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u16addr, MS_U32 u32val); 315 void HAL_GOP_Write32Pal(GOP_CTX_HAL_LOCAL *pGOPHalLocal, 316 MS_U8* pREGMAP_Base, MS_U16 *pREGMAP_Offset, MS_U32 u32REGMAP_Len, 317 MS_U8 u8Index, MS_U8 u8A, MS_U8 u8R, MS_U8 u8G, MS_U8 u8B); 318 void HAL_GOP_Read16Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u16addr, MS_U16* pu16ret); 319 void HAL_GOP_GWIN_SetBlending(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable, MS_U8 u8coef); 320 void HAL_GOP_SetIOMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr); 321 void HAL_GOP_SetIOFRCMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr); 322 void HAL_GOP_SetIOPMMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr); 323 void HAL_GOP_GWIN_GetMUX(GOP_CTX_HAL_LOCAL*pGOPHalLocal, MS_U8* u8GOPNum, Gop_MuxSel eGopMux); 324 void HAL_GOP_GWIN_SetMUX(GOP_CTX_HAL_LOCAL*pGOPHalLocal, MS_U8 u8GOPNum, Gop_MuxSel eGopMux); 325 void HAL_GOP_GetGOPEnum(GOP_CTX_HAL_LOCAL *pGOPHalLocal, GOP_TYPE_DEF* GOP_TYPE); 326 MS_U16 HAL_GOP_GetBPP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPColorType fbFmt); 327 GOP_Result HAL_GOP_SetGOPACKMask(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U16 u16GopMask); 328 GOP_Result HAL_GOP_SetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop); 329 MS_U16 HAL_GOP_GetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop); 330 MS_U8 HAL_GOP_GetMaxGwinNumByGOP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GopNum); 331 MS_U8 HAL_GOP_SelGwinIdByGOP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8Gop, MS_U8 u8Idx); 332 MS_U8 HAL_GOP_GetMIUDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopnum); 333 void HAL_GOP_SetIPSel2SC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_IPSEL_GOP ipSelGop); 334 E_GOP_VIDEOTIMING_MIRRORTYPE HAL_GOP_GetVideoTimingMirrorType(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bHorizontal); 335 MS_U8 HAL_GOP_GetDWINMIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 336 GOP_Result HAL_GOP_DWIN_SetSourceSel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_DWIN_SRC_SEL enSrcSel); 337 GOP_Result HAL_GOP_DWIN_EnableR2YCSC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bEnable); 338 GOP_Result HAL_GOP_SetDWINMIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 miu); 339 GOP_Result HAL_GOP_GetGOPDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8gopNum, DRV_GOPDstType *pGopDst); 340 GOP_Result HAL_GOP_GetMixerDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPDstType *pGopDst); 341 GOP_Result HAL_GOP_SetMixerDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPDstType eDstType); 342 GOP_Result HAL_GOP_GOPSel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum); 343 GOP_Result HAL_GOP_SetGOPHighPri(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum); 344 GOP_Result HAL_GOP_SetGOPEnable2SC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 345 GOP_Result HAL_GOP_SetGOP2Pto1P(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 346 GOP_Result HAL_GOP_SetGOPEnable2Mode1(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 347 GOP_Result HAL_GOP_GetGOPAlphaMode1(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL *pbEnable); 348 GOP_Result HAL_GOP_GWIN_SetDstPlane(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 GopNum, DRV_GOPDstType eDstType,MS_BOOL bOnlyCheck); 349 GOP_Result HAL_GOP_SetGOPClk(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, DRV_GOPDstType eDstType); 350 GOP_Result HAL_GOP_SetClkForCapture(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_DWIN_SRC_SEL enSrcSel); 351 GOP_Result HAL_GOP_MIXER_SetGOPEnable2Mixer(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 352 GOP_Result HAL_GOP_MIXER_EnableVfilter(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bEn); 353 GOP_Result HAL_GOP_MIXER_SetMux(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_U8 muxNum, MS_BOOL bEnable); 354 GOP_Result HAL_GOP_MIXER_EnableOldBlendMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEn); 355 GOP_Result HAL_GOP_InitMux(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 356 GOP_Result HAL_GOP_SetClock(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_BOOL bEnable); 357 GOP_Result HAL_ConvertAPIAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gwinid, MS_PHY* u64Adr); 358 GOP_Result HAL_GOP_VE_SetOutputTiming(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32mode); 359 GOP_Result HAL_GOP_MIXER_SetOutputTiming(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32mode, GOP_DRV_MixerTiming *pTM); 360 GOP_Result HAL_GOP_GWIN_EnableTileMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable, E_GOP_TILE_DATA_TYPE tilemode); 361 GOP_Result HAL_GOP_SetUVSwap(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum,MS_BOOL bEn); 362 GOP_Result HAL_GOP_SetYCSwap(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum,MS_BOOL bEn); 363 GOP_Result HAL_GOP_GWIN_GetNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL* pEnable); 364 GOP_Result HAL_GOP_GWIN_SetNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable); 365 GOP_Result HAL_GOP_GWiN_Set3DOSD_Sub(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP ,MS_U8 u8Gwin, MS_PHY u32SubAddr); 366 GOP_Result HAL_GOP_SetGOPToVE(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEn ); 367 GOP_Result HAL_GOP_3D_SetMiddle(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP,MS_U16 u16Middle); 368 GOP_Result HAL_GOP_OC_SetOCEn(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bOCEn); 369 GOP_Result HAL_GOP_OC_Get_MIU_Sel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 *MIUId); 370 GOP_Result HAL_GOP_OC_SetOCInfo(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_OC_INFO* pOCinfo); 371 GOP_Result HAL_GOP_DWIN_SetRingBuffer(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32RingSize,MS_U32 u32BufSize); 372 GOP_Result HAL_GOP_AdjustField(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 GopNum, DRV_GOPDstType eDstType); 373 GOP_Result HAL_GOP_TestPattern_IsVaild(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GopNum); 374 GOP_Result HAL_GOP_SetWinFmt(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 regForm, MS_U8 u8GOPNum, MS_U8 u8GwinNum, MS_U16 colortype); 375 GOP_Result HAL_GOP_Set_PINPON(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum, MS_BOOL bEn, E_DRV_GOP_PINPON_MODE pinpon_mode); 376 GOP_Result HAL_GOP_HScalingDown(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable,MS_U16 src, MS_U16 dst); 377 GOP_Result HAL_GOP_VScalingDown(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable,MS_U16 src, MS_U16 dst); 378 GOP_Result HAL_GOP_DeleteWinHVSize(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_U16 u16HSize, MS_U16 u16VSize); 379 GOP_Result HAL_GOP_DumpGOPReg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U16 u16BankIdx, MS_U16 u16Addr, MS_U16* u16Val); 380 GOP_Result HAL_GOP_RestoreGOPReg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U16 u16BankIdx, MS_U16 u16Addr, MS_U16 u16Val); 381 GOP_Result HAL_GOP_PowerState(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32PowerState, GFLIP_REGS_SAVE_AREA* pGOP_STRPrivate); 382 GOP_Result HAL_GOP_GWIN_SetGPUTileMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gwinid, EN_DRV_GOP_GPU_TILE_MODE tile_mode); 383 GOP_Result HAL_GOP_EnableTLB(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable); 384 GOP_Result HAL_GOP_SetTLBAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_PHY u64TLBAddr, MS_U32 u32size); 385 GOP_Result HAL_GOP_SetTLBSubAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_PHY u64TLBAddr); 386 #ifdef GOP_CMDQ_ENABLE 387 GOP_Result HAL_GOP_CMDQ_WriteCommand(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *cmdq_struct,MS_U32 *number,MS_U32 u32addr, MS_U16 u16val, MS_U16 mask); 388 GOP_Result HAL_GOP_CMDQ_BegineDraw(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *target,MS_U32 *number, MS_U32 *u32GopIdx); 389 GOP_Result HAL_GOP_CMDQ_EndDraw(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *target,MS_U32 *number, MS_U32 u32GopIdx); 390 GOP_Result HAL_GOP_CMDQ_SetGOPACKMask(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U16 u16GopMask); 391 GOP_Result HAL_GOP_CMDQ_SetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop); 392 #endif 393 GOP_Result HAL_GOP_EnableTwoLineBufferMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEnable); 394 GOP_Result HAL_GOP_Set_GWIN_INTERNAL_MIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_U8 miusel); 395 GOP_Result HAL_GOP_Set_MIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP,MS_U8 miusel); 396 GOP_Result HAL_GOP_GetIPInterlace(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL *bInterlace); 397 GOP_Result HAL_GOP_IsHDREnabled(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL *pbHDREnable); 398 GOP_Result HAL_GOP_SetGopGwinHVPixel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_U8 u8win, MS_U16 hstart, MS_U16 hend, MS_U16 vstart, MS_U16 vend); 399 GOP_Result HAL_GOP_AFBC_GetCore(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP,MS_U8* u8Core); 400 GOP_Result Hal_SetCropWindow(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, EN_GOP_CROP_CTL crop_mode); 401 GOP_Result HAL_GOP_SetDbgLevel(EN_GOP_DEBUG_LEVEL level); 402 #endif // _HAL_TEMP_H_ 403