xref: /utopia/UTPA2-700.0.x/modules/dmx/drv/mmfi2/drvMMFilein.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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94 
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file    drvMMFilein.h
98 /// @brief  Multimedia File In (MMFILEIN 2) Driver Interface
99 /// @author MStar Semiconductor,Inc.
100 /// @attention
101 /// All MMFILEIN DDI are not allowed to use in any interrupt context other than MMFILEIN ISR and Callback
102 ///////////////////////////////////////////////////////////////////////////////////////////////////
103 
104 #ifndef _DRV_MMFILEIN_H_
105 #define _DRV_MMFILEIN_H_
106 
107 #ifdef __cplusplus
108 extern "C"
109 {
110 #endif
111 
112 
113 //-------------------------------------------------------------------------------------------------
114 //  Driver Capability
115 //-------------------------------------------------------------------------------------------------
116 
117 #define MMFI_VER_1_0                     0x0100UL
118 #define MMFI_VER_2_0                     0x0200UL
119 
120 #define MMFI_VERSION                     MMFI_VER_2_0
121 
122 
123 /// TSP byte address alignment unit
124 #define DRVMMFI_ALIGN_UNIT           16
125 
126 /// TSP byte address alignment macro
127 #define DRVMMFI_ALIGN(_x)            ALIGN_16((MS_U32)_x)
128 
129 
130 //-------------------------------------------------------------------------------------------------
131 //  Macro and Define
132 //-------------------------------------------------------------------------------------------------
133 /// Transport stream null PID
134 #define DRVMMFI_PID_NULL             0x1FFF
135 #define MSIF_MMFI_LIB_CODE           {'M','M','F','I','2'}                                               // Lib code
136 #define MSIF_MMFI_LIBVER             {'0','2'}                                                       // LIB version
137 #define MSIF_MMFI_BUILDNUM           {'0','0'}                                                       // Build Number
138 #define MSIF_MMFI_CHANGELIST         {'0','0','6','0','7','2','6','6'}                               // P4 ChangeList Number
139 
140 #define MMFI_DRV_VERSION             /* Character String for DRV/API version             */  \
141     MSIF_TAG,                       /* 'MSIF'                                           */  \
142     MSIF_CLASS,                     /* '00'                                             */  \
143     MSIF_CUS,                       /* 0x0000                                           */  \
144     MSIF_MOD,                       /* 0x0000                                           */  \
145     MSIF_CHIP,                                                                              \
146     MSIF_CPU,                                                                               \
147     MSIF_MMFI_LIB_CODE,              /* IP__                                             */  \
148     MSIF_MMFI_LIBVER,                /* 0.0 ~ Z.Z                                        */  \
149     MSIF_MMFI_BUILDNUM,              /* 00 ~ 99                                          */  \
150     MSIF_MMFI_CHANGELIST,            /* CL#                                              */  \
151     MSIF_OS
152 
153 
154 //-------------------------------------------------------------------------------------------------
155 //  Type and Structure
156 //-------------------------------------------------------------------------------------------------
157 /// MMFILEIN DDI return value
158 
159 /// @name MMFI_Result
160 /// @ref MMFI_Result
161 /// return value
162 /// @{
163 typedef enum
164 {
165     DRVMMFI_FAIL                     = 0,
166     DRVMMFI_OK                       = 1,
167     DRVMMFI_INVALID_PARAM            = 2,
168     DRVMMFI_FUNC_ERROR               = 3,
169     DRVMMFI_NOTSUPPORT               = 4,
170 } MMFI_Result;
171 /// @}
172 
173 typedef enum
174 {
175     E_DRVMMFI_PATH0   = 0x00,
176     E_DRVMMFI_PATH1   = 0x01,
177 
178 }DrvMMFI_Path;
179 
180 typedef enum
181 {
182     E_DRVMMFI_MODE_NO_BYPASS_AU     = 0x0000,
183     E_DRVMMFI_MODE_PS_AU            = 0x0001,
184     E_DRVMMFI_MODE_PS_AUB           = 0x0002,
185     E_DRVMMFI_MODE_APID_BYPASS      = 0x0004,
186     E_DRVMMFI_MODE_APIDB_BYPASS     = 0x0008,
187 
188     E_DRVMMFI_MODE_NO_BYPASS_V3D    = 0x0010,
189     E_DRVMMFI_MODE_PS_V3D           = 0x0020,
190     E_DRVMMFI_MODE_V3DPID_BYPASS    = 0x0040,
191 
192     E_DRVMMFI_MODE_NO_BYPASS_VD     = 0x0080,
193     E_DRVMMFI_MODE_VDPID_BYPASS     = 0x0100,
194     E_DRVMMFI_MODE_NO_BYPASS_TS     = 0x0200,
195     E_DRVMMFI_MODE_PS_VD            = 0x0400,
196 
197     E_DRVMMFI_MODE_PS_AUC           = 0x0800,
198     E_DRVMMFI_MODE_PS_AUD           = 0x1000,
199 
200     E_DRVMMFI_MODE_PS_VD3           = 0x2000,
201     E_DRVMMFI_MODE_PS_VD4           = 0x4000,
202 
203     E_DRVMMFI_MODE_PS_AUE           = 0x0003,
204     E_DRVMMFI_MODE_PS_AUF           = 0x0005,
205 
206     E_DRVMMFI_MODE_PS_VD5           = 0x0006,
207     E_DRVMMFI_MODE_PS_VD6           = 0x0007,
208     E_DRVMMFI_MODE_PS_VD7           = 0x0009,
209     E_DRVMMFI_MODE_PS_VD8           = 0x000A,
210 
211     E_DRVMMFI_MODE_MMFI1_MASK       = 0x8000,   //must set, when using MMFI1 path
212 } DrvMMFI_FileinMode;
213 
214 typedef enum
215 {
216     /// Command Queue is Idle
217     E_DRVMMFI_STATE_IDLE        = 0x00,
218     /// Command Queue is Busy
219     E_DRVMMFI_STATE_BUSY        = 0x01,
220 
221     E_DRVMMFI_STATE_UNKNOWN     = 0xFF,
222 } DrvMMFI_FileinState;
223 
224 typedef enum
225 {
226     E_DRVMMFI_STATUS_UNKNOWN            = 0,
227     E_DRVMMFI_STATUS_FILEINDONE0        = 0x01,    //bit 0
228     E_DRVMMFI_STATUS_AU_PKTERR0         = 0x02,    //bit 1
229     E_DRVMMFI_STATUS_FILEINDONE1        = 0x04,    //bit 2
230     E_DRVMMFI_STATUS_VD_PKTERR0         = 0x08,    //bit 3
231     E_DRVMMFI_STATUS_AU_PKTERR1         = 0x10,
232     E_DRVMMFI_STATUS_VD_PKTERR1         = 0x20,
233 } DrvMMFI_Status;
234 
235 
236 /// MMFI file in Packet mode
237 typedef enum //_DrvMMFI_PacketMode
238 {
239     E_DRVMMFI_PKTMODE_188              = 0x0000,
240     E_DRVMMFI_PKTMODE_192              = 0x0001,
241     E_DRVMMFI_PKTMODE_204              = 0x0002,
242 } DrvMMFI_PacketMode;
243 
244 /// TSP TS Input Source
245 typedef enum
246 {
247     E_DRVMMFI_FLTTYPE_NONE = 0,
248     E_DRVMMFI_FLTTYPE_AUD  = 1,
249     E_DRVMMFI_FLTTYPE_AUDB = 2,
250     E_DRVMMFI_FLTTYPE_AUDC = 3,
251     E_DRVMMFI_FLTTYPE_AUDD = 4,
252     E_DRVMMFI_FLTTYPE_AUDE = 5,
253     E_DRVMMFI_FLTTYPE_AUDF = 6,
254     E_DRVMMFI_FLTTYPE_VD   = 7,
255     E_DRVMMFI_FLTTYPE_VD3D = 8,
256     E_DRVMMFI_FLTTYPE_VD3  = 9,
257     E_DRVMMFI_FLTTYPE_VD4  = 10,
258     E_DRVMMFI_FLTTYPE_VD5  = 11,
259     E_DRVMMFI_FLTTYPE_VD6  = 12,
260     E_DRVMMFI_FLTTYPE_VD7  = 13,
261     E_DRVMMFI_FLTTYPE_VD8  = 14,
262     E_DRVMMFI_FLTTYPE_MAX
263 } DrvMMFI_FltType;
264 
265 typedef enum //_DrvMMFI_DbgLevel
266 {
267     E_DRVMMFI_DBG_Release = 0,
268     E_DRVMMFI_DBG_ERR, // display error msg
269     E_DRVMMFI_DBG_INFO,
270 } DrvMMFI_DbgLevel;
271 
272 typedef enum
273 {
274     E_DRVMMFI_CAP_FILTER0_NUM = 0,                  // Get filter number
275     E_DRVMMFI_CAP_FILTER1_NUM,                      // Get pvr filter number
276     E_DRVMMFI_CAP_RESOURCE_SIZE,                    // Get the data structure size of private resource (share resource)
277 
278     E_DRVMMFI_CAP_FILTER_ALL_NUM,
279 } DrvMMFI_Cap;
280 
281 
282 typedef struct _DrvPIDFLT_HEADER
283 {
284     MS_U32      CCounter        : 4;
285     MS_U32      Adp_Ctrl        : 2;
286     MS_U32      Scramble        : 2;
287     MS_U32      PID             : 13;
288     MS_U32      TS_Priority     : 1;
289     MS_U32      Payload_Start   : 1;
290     MS_U32      Err_Flag        : 1;
291     MS_U32      reserved        : 8;
292 }DrvPIDFLT_HEADER;
293 
294 //-------------------------------------------------------------------------------------------------
295 //  Function and Variable
296 //-------------------------------------------------------------------------------------------------
297 MMFI_Result MDrv_MMFI_InitLibResource(void* pResMemAddr);
298 MMFI_Result MDrv_MMFI_Init(void);
299 MMFI_Result MDrv_MMFI_Exit(void);
300 MMFI_Result MDrv_MMFI_Get_HWIntStatus(MS_U32* pu32status);
301 MMFI_Result MDrv_MMFI_SetDbgLevel(DrvMMFI_DbgLevel DbgLevel);
302 MMFI_Result MDrv_MMFI_AudPath_Enable(MS_BOOL bEnable);
303 MMFI_Result MDrv_MMFI_File_SetTimer(DrvMMFI_Path epath, MS_U8 u8timer);
304 MMFI_Result MDrv_MMFI_File_ByteTimer_En(DrvMMFI_Path epath, MS_BOOL bEnable);
305 MMFI_Result MDrv_MMFI_Path_Alloc(MS_U32 *pu32PathId);
306 MMFI_Result MDrv_MMFI_Path_Free(DrvMMFI_Path epath);
307 
308 // PIDFlt API
309 MMFI_Result MDrv_MMFI_PidFlt_Alloc(DrvMMFI_Path epath, DrvMMFI_FltType eFilterType, MS_U8 *pu8PidFltId);
310 MMFI_Result MDrv_MMFI_PidFlt_Free(MS_U8 u8PidFltId);
311 MMFI_Result MDrv_MMFI_PidFlt_Enable(MS_U8 u8PidFltId, MS_BOOL bEnable);
312 MMFI_Result MDrv_MMFI_PidFlt_SetPid(MS_U8 u8PidFltId, MS_U16 u16Pid);
313 
314 MMFI_Result MDrv_MMFI_File_CmdQ_Reset(DrvMMFI_Path epath);
315 MMFI_Result MDrv_MMFI_File_CmdQFifo_Status(DrvMMFI_Path epath, MS_U8 *pu8FifoLevel);
316 MMFI_Result MDrv_MMFI_File_CmdQ_GetSlot(DrvMMFI_Path epath, MS_U32 *pu32EmptySlot);
317 
318 MMFI_Result MDrv_MMFI_SetPlaybackTimeStamp(DrvMMFI_Path epath, MS_U32 u32lpcr2);
319 MMFI_Result MDrv_MMFI_GetPlaybackTimeStamp(DrvMMFI_Path epath, MS_U32 *pu32lpcr2);
320 MMFI_Result MDrv_MMFI_GetFileInTimeStamp(DrvMMFI_Path epath, MS_U32* pu32TSLen);
321 
322 MMFI_Result MDrv_MMFI_File_SetAddr(DrvMMFI_Path epath, MS_PHY phyStreamAddr);
323 MMFI_Result MDrv_MMFI_File_SetSize(DrvMMFI_Path epath, MS_U32 u32StreamSize);
324 MMFI_Result MDrv_MMFI_File_SetPacketMode(DrvMMFI_Path epath, DrvMMFI_PacketMode PacketMode);
325 MMFI_Result MDrv_MMFI_File_192Mode_En(DrvMMFI_Path epath, MS_BOOL bEnable);
326 MMFI_Result MDrv_MMFI_File_192BlockScheme_En(DrvMMFI_Path epath, MS_BOOL bEnable);
327 MMFI_Result MDrv_MMFI_File_SetPacketMode(DrvMMFI_Path epath, DrvMMFI_PacketMode PacketMode);
328 MMFI_Result MDrv_MMFI_File_SetTimeStampClk(DrvMMFI_Path ePath, MS_U32 u32ClkSrc);
329 MMFI_Result MDrv_MMFI_File_GetReadAddr(DrvMMFI_Path epath, MS_PHY* pphyReadAddr);
330 
331 MMFI_Result MDrv_MMFI_DupPktSkip(DrvMMFI_Path epath, MS_BOOL bEnable);
332 MMFI_Result MDrv_MMFI_TEI_SkipPktf(DrvMMFI_Path epath, MS_BOOL bEnable);
333 MMFI_Result MDrv_MMFI_Clr_Pidflt_ByteCnt(DrvMMFI_Path epath);
334 MMFI_Result MDrv_MMFI_TSDataEndian_Swap(DrvMMFI_Path epath, MS_BOOL bEnable);
335 MMFI_Result MDrv_MMFI_TSOrder_Swap(DrvMMFI_Path epath, MS_BOOL bEnable);
336 
337 MMFI_Result MDrv_MMFI_File_GetState(DrvMMFI_Path epath, DrvMMFI_FileinState *peFileinState);
338 MMFI_Result MDrv_MMFI_File_ChkStatus(DrvMMFI_Status* pStatus);
339 MMFI_Result MDrv_MMFI_File_ClearHWInt(MS_U32 u32int);
340 MMFI_Result MDrv_MMFI_Get_TsHeader(DrvMMFI_Path epath, DrvPIDFLT_HEADER *pheader);
341 
342 MMFI_Result MDrv_MMFI_File_Start(DrvMMFI_Path epath);
343 MMFI_Result MDrv_MMFI_File_Abort(DrvMMFI_Path epath);
344 MMFI_Result MDrv_MMFI_File_ModeEnable(DrvMMFI_FileinMode fileinmode, MS_BOOL bEnable);
345 
346 MMFI_Result MDrv_MMFI_ResetAll(void);
347 MMFI_Result MDrv_MMFI_GetCap(DrvMMFI_Cap eCap, void* pOutput);
348 MMFI_Result MDrv_MMFI_RemoveDupAVPkt(MS_BOOL bEnable);
349 
350 MMFI_Result MDrv_MMFI_VD3DPath_Enable(MS_BOOL bEnable);
351 
352 MMFI_Result MDrv_MMFI_Set_MOBF_FileinKey(DrvMMFI_Path epath, MS_U32 u32Key);
353 MMFI_Result MDrv_MMFI_MOBF_FileIn_Enable(DrvMMFI_Path epath, MS_BOOL benable);
354 MMFI_Result MDrv_MMFI_MOBF_FileIn_SetLevel(DrvMMFI_Path epath, MS_U8 u8level);
355 
356 #ifdef MSOS_TYPE_LINUX_KERNEL
357 MMFI_Result MDrv_MMFI_Suspend(void);
358 MMFI_Result MDrv_MMFI_Resume(void);
359 #endif  //MSOS_TYPE_LINUX_KERNEL
360 
361 
362 #ifdef __cplusplus
363 } // closing brace for extern "C"
364 #endif
365 
366 #endif // _DRV_MMFILEIN_H_
367