1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
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11 //
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20 //
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75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
85 // MStar Semiconductor Inc. and be kept in strict confidence
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91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 //-------------------------------------------------------------------------------------------------
96 // Include Files
97 //-------------------------------------------------------------------------------------------------
98 // Common Definition
99 #ifdef MSOS_TYPE_LINUX_KERNEL
100 #include <linux/string.h>
101 #else
102 #include <string.h>
103 #endif
104
105 #include "MsCommon.h"
106 #include "MsIRQ.h"
107 #include "MsOS.h"
108 #include "MsTypes.h"
109
110 #include "drvBDMA.h"
111 #include "drvSERFLASH.h"
112
113 #include "regCHIP.h"
114
115 #include "halAUDSP.h"
116 #include "drvAUDIO.h"
117 #include "../audio/regAUDIO.h"
118 #include "../audio/halAUDIO.h"
119 #include "../audio/halSIF.h"
120 #include "../audio/halADVAUDIO.h"
121 #include "../audio/ddr_config.h"
122 #include "../audio/r2_shm_comm.h"
123 #include "../audio/decR2_shm.h"
124 #if ASND_R2_SUPPORT
125 #include "../audio/sndR2_shm.h"
126 #endif
127
128 #ifdef CONFIG_MBOOT//Mboot Mini system
129 #include "dspcode_s/aucode_s.c"
130 #include "dspcode_s/aucode_dec.c"
131 #include "dspcode_s/aucode_mboot_r2.c"
132 #else
133 #include "dspcode_s/aucode_palsum.c"
134 #include "dspcode_s/aucode_btsc.c"
135 #include "dspcode_s/aucode_s.c"
136 #include "dspcode_s/aucode_dec.c"
137 #include "dspcode_s/aucode_adec_r2.c"
138 #if ASND_R2_SUPPORT
139 #include "dspcode_s/aucode_asnd_r2.c"
140 #endif
141 #include "dspcode_s/aucode_dde.c"
142 #include "dspcode_s/aucode_ms10_dde.c"
143
144 #include "dspcode_adv/aucode_puresnd.c"
145 #include "dspcode_adv/aucode_dps.c"
146 #include "dspcode_adv/aucode_dbx.c"
147 #endif
148
149
150
151 #if defined(MSOS_TYPE_NUTTX)
152 extern int lib_lowprintf(const char *format, ...);
153 #define DBG_PREFIX lib_lowprintf
154 #else
155 #define DBG_PREFIX printf
156 #endif
157
158 #if (defined ANDROID)
159 #include <sys/mman.h>
160 #include <cutils/ashmem.h>
161 #include <cutils/log.h>
162
163 #ifndef LOGI // android 4.1 rename LOGx to ALOGx
164 #define LOGI ALOGI
165 #endif
166
167 #ifndef LOGE // android 4.1 rename LOGx to ALOGx
168 #define LOGE ALOGE
169 #endif
170
171 #define HALAUDSP_PRINT(fmt, args...) LOGI("<<android>> " fmt, ## args)
172 #define HALAUDSP_ERROR(fmt, args...) LOGE("<<android>> " fmt, ## args)
173 #else
174 #define HALAUDSP_PRINT(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
175 #define HALAUDSP_ERROR(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
176 #endif
177
178 #define HALAUDSP_CHECK_SHM_INIT \
179 do { \
180 if (g_AudioVars2 == NULL) \
181 { \
182 HALAUDSP_ERROR("%s() : Warning! g_AudioVars2 should not be NULL !!!\n", __FUNCTION__); \
183 HALAUDSP_ERROR("%s() : Perform SHM Init here !!!\n", __FUNCTION__); \
184 if (HAL_AUDIO_InitialVars() == FALSE) \
185 { \
186 MS_ASSERT(0); \
187 } \
188 } \
189 } while(0)
190
191 //-------------------------------------------------------------------------------------------------
192 // Driver Compiler Options
193 //-------------------------------------------------------------------------------------------------
194
195 #define DBG_AUDSP_LOAD(args...) //DBG_PREFIX(args)
196 #define DBG_AUDSP(args...) //DBG_PREFIX(args)
197 #define DBG_AUDSP_ERROR(args...) //DBG_PREFIX(args);
198
199 #ifdef CONFIG_MBOOT //mboot Speed up
200 #define DSP_VERIFY_DSP_CODE 0 // 0: don't verify dsp code (for speed)
201 // 1: verify dsp code (for debug)
202 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
203 // 1: check IDMA ready (for debug)
204 #else
205 #define DSP_VERIFY_DSP_CODE 1 // 0: don't verify dsp code (for speed)
206 // 1: verify dsp code (for debug)
207 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
208 // 1: check IDMA ready (for debug)
209 #endif
210
211 #define AU_NULL 0
212
213 #ifdef CONFIG_MBOOT
214 #define FLASH_COPY(x,y,z,i,j) TRUE
215 #define FLASH_CHKDONE() TRUE
216 #else
217 #define FLASH_COPY(x,y,z,i,j) MDrv_SERFLASH_CopyHnd(x,y,z,i,j)
218 #define FLASH_CHKDONE() MDrv_FLASH_CheckWriteDone()
219 #endif
220
221 LOAD_CODE_INFO g_loadcodeinfo;
222 MS_BOOL g_bDSPLoadCode = FALSE;
223
224 #ifndef CONFIG_MBOOT
225 AUDIO_ALG_INFO dsp_info[]=
226 {
227 // ---------- Decoder2 DSP Code ----------
228 //AU_DVB_SYS_NONE[0]
229 {
230 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
231 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
232 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
233 AU_NULL, AU_NULL, AU_NULL,
234 "DVB2_NONE",
235 AU_DVB2_NONE,
236 },
237 // SE System
238 {
239 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1 + 6,
240 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2 + 6,
241 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3 + 6,
242 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4 + 6,
243 "SE SYSTEM",
244 AU_SE_SYSTEM,
245 },
246 //DDE
247 {
248 MST_CODEC_DDE_PM1_ADDR, MST_CODEC_DDE_PM1_SIZE, mst_codec_dde_pm1 + 6,
249 MST_CODEC_DDE_PM2_ADDR, MST_CODEC_DDE_PM2_SIZE, mst_codec_dde_pm2 + 6,
250 MST_CODEC_DDE_PM3_ADDR, MST_CODEC_DDE_PM3_SIZE, mst_codec_dde_pm3 + 6,
251 MST_CODEC_DDE_PM4_ADDR, MST_CODEC_DDE_PM4_SIZE, mst_codec_dde_pm4 + 6,
252 "dde",
253 AU_DVB2_STANDARD_DDE,
254 },
255 //BTSC
256 {
257 MST_CODEC_SIF_BTSC_PM1_ADDR, MST_CODEC_SIF_BTSC_PM1_SIZE, mst_codec_sif_btsc_pm1 + 6,
258 MST_CODEC_SIF_BTSC_PM2_ADDR, MST_CODEC_SIF_BTSC_PM2_SIZE, mst_codec_sif_btsc_pm2 + 6,
259 MST_CODEC_SIF_BTSC_PM3_ADDR, MST_CODEC_SIF_BTSC_PM3_SIZE, mst_codec_sif_btsc_pm3 + 6,
260 AU_NULL, AU_NULL, AU_NULL,
261 "SIF BTSC",
262 AU_SIF_BTSC,
263 },
264 // PALSUM
265 {
266 MST_CODEC_SIF_PALSUM_PM1_ADDR, MST_CODEC_SIF_PALSUM_PM1_SIZE, mst_codec_sif_palsum_pm1 + 6,
267 MST_CODEC_SIF_PALSUM_PM2_ADDR, MST_CODEC_SIF_PALSUM_PM2_SIZE, mst_codec_sif_palsum_pm2 + 6,
268 MST_CODEC_SIF_PALSUM_PM3_ADDR, MST_CODEC_SIF_PALSUM_PM3_SIZE, mst_codec_sif_palsum_pm3 + 6,
269 AU_NULL, AU_NULL, AU_NULL,
270 "SIF PALSUM",
271 AU_SIF_PALSUM,
272 },
273 // audio_adv_sndeff_info
274 //DBX
275 {
276 MST_CODEC_DBX_PM1_ADDR, MST_CODEC_DBX_PM1_SIZE, mst_codec_dbx_pm1 + 6,
277 AU_NULL, AU_NULL, AU_NULL,
278 AU_NULL, AU_NULL, AU_NULL,
279 AU_NULL, AU_NULL, AU_NULL,
280 "ADVSND DBX",
281 AU_DVB2_ADVSND_DBX,
282 },
283 //PURESND
284 {
285 MST_CODEC_PURESND_PM1_ADDR, MST_CODEC_PURESND_PM1_SIZE, mst_codec_puresnd_pm1 + 6,
286 AU_NULL, AU_NULL, AU_NULL,
287 MST_CODEC_PURESND_PM3_ADDR, MST_CODEC_PURESND_PM3_SIZE, mst_codec_puresnd_pm3 + 6,
288 MST_CODEC_PURESND_PM4_ADDR, MST_CODEC_PURESND_PM4_SIZE, mst_codec_puresnd_pm4 + 6,
289 "ADVSND PURESND",
290 AU_DVB2_ADVSND_PURESND,
291 },
292 //DPS
293 {
294 MST_CODEC_DPS_PM1_ADDR, MST_CODEC_DPS_PM1_SIZE, mst_codec_dps_pm1 + 6,
295 AU_NULL, AU_NULL, AU_NULL,
296 MST_CODEC_DPS_PM3_ADDR, MST_CODEC_DPS_PM3_SIZE, mst_codec_dps_pm3 + 6,
297 AU_NULL, AU_NULL, AU_NULL,
298 "ADVSND BONGIOVI_DPS",
299 AU_DVB2_ADVSND_BONGIOVI_DPS,
300 },
301 //DTSE
302 {
303 AU_NULL, AU_NULL, AU_NULL,
304 AU_NULL, AU_NULL, AU_NULL,
305 AU_NULL, AU_NULL, AU_NULL,
306 AU_NULL, AU_NULL, AU_NULL,
307 "DTSE",
308 AU_DVB2_ENCODE_DTSE,
309 },
310 //DDE
311 {
312 MST_CODEC_DDE_PM1_ADDR, MST_CODEC_DDE_PM1_SIZE, mst_codec_dde_pm1 + 6,
313 MST_CODEC_DDE_PM2_ADDR, MST_CODEC_DDE_PM2_SIZE, mst_codec_dde_pm2 + 6,
314 MST_CODEC_DDE_PM3_ADDR, MST_CODEC_DDE_PM3_SIZE, mst_codec_dde_pm3 + 6,
315 MST_CODEC_DDE_PM4_ADDR, MST_CODEC_DDE_PM4_SIZE, mst_codec_dde_pm4 + 6,
316 "DDE",
317 AU_DVB2_ENCODE_DDE,
318 },
319 //MS10-DDE
320 {
321 MST_CODEC_MS10_DDE_PM1_ADDR, MST_CODEC_MS10_DDE_PM1_SIZE, mst_codec_ms10_dde_pm1 + 6,
322 MST_CODEC_MS10_DDE_PM2_ADDR, MST_CODEC_MS10_DDE_PM2_SIZE, mst_codec_ms10_dde_pm2 + 6,
323 MST_CODEC_MS10_DDE_PM3_ADDR, MST_CODEC_MS10_DDE_PM3_SIZE, mst_codec_ms10_dde_pm3 + 6,
324 MST_CODEC_MS10_DDE_PM4_ADDR, MST_CODEC_MS10_DDE_PM4_SIZE, mst_codec_ms10_dde_pm4 + 6,
325 "MS10-DDE",
326 AU_DVB2_ENCODE_MS10_DDE,
327 },
328
329 };
330 #else //=======================CONFIG_MBOOT=========================================//
331 AUDIO_ALG_INFO dsp_info[]=
332 {
333 // ---------- Decoder2 DSP Code ----------
334 //AU_DVB_SYS_NONE[0]
335 {
336 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
337 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
338 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
339 AU_NULL, AU_NULL, AU_NULL,
340 "DVB2_NONE",
341 AU_DVB2_NONE,
342 },
343 // SE System
344 {
345 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1 + 6,
346 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2 + 6,
347 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3 + 6,
348 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4 + 6,
349 "SE SYSTEM",
350 AU_SE_SYSTEM,
351 },
352 };
353 #endif
354
355
356 #ifndef MSOS_TYPE_NOS
357 void* MDrv_MPool_PA2KSEG1(void* pAddrPhys);
358 #endif
359 //-------------------------------------------------------------------------------------------------
360 // Local Defines
361 //-------------------------------------------------------------------------------------------------
362 #define AUDIO_HAL_ERR(x, args...) //{printf(x, ##args);}
363 #define LOU8(MS_U16Val) ( (MS_U8)(MS_U16Val) )
364 #define HIU8(MS_U16Val) ( (MS_U8)((MS_U16Val) >> 8) )
365
366 //-------------------------------------------------------------------------------------------------
367 // Local Structures
368 //-------------------------------------------------------------------------------------------------
369
370
371 //-------------------------------------------------------------------------------------------------
372 // Global Variables
373 //-------------------------------------------------------------------------------------------------
374 extern MS_BOOL g_bAudio_loadcode_from_dram;
375 extern AUDIO_SHARED_VARS2 * g_AudioVars2;
376
377 extern MS_S32 _s32AUDIOMutexIDMA;
378
379 #ifndef MSOS_TYPE_NUTTX
380 extern AUDIO_TEE_INFO_SHARE_MEM *pAudioTeeInfoShm;
381 #endif
382
383
384 //-------------------------------------------------------------------------------------------------
385 // Local Variables
386 //-------------------------------------------------------------------------------------------------
387 static MS_U8 g_u8DspCodeTypeLoaded = 0;
388
389
390 //-------------------------------------------------------------------------------------------------
391 // Debug Functions
392 //-------------------------------------------------------------------------------------------------
393
394
395 //-------------------------------------------------------------------------------------------------
396 // Local Functions
397 //-------------------------------------------------------------------------------------------------
398
399
400 //-------------------------------------------------------------------------------------------------
401 // Global Functions
402 //-------------------------------------------------------------------------------------------------
403 ////////////////////////////////////////////////////////////////////////////////
404 /// @brief \b Function \b Name: MDrv_AUDIO_DspLoadCodeKernel()
405 /// @brief \b Function \b Description: load CM/PM/cache/prefetch DSP code
406 /// @param <IN> \b \b u8Type : -- DSP load code type
407 /// DSP_segment -- select DSP load code seg
408 /// DSP_select -- select DSP1 or DSP2
409 /// @param <OUT> \b NONE :
410 /// @param <RET> \b NONE :
411 /// @param <GLOBAL> \b NONE :
412 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCode(AUDIO_DSP_CODE_TYPE dspCodeType)413 MS_BOOL HAL_AUDSP_DspLoadCode(AUDIO_DSP_CODE_TYPE dspCodeType)
414 {
415 #ifndef MSOS_TYPE_NUTTX
416 REE_TO_TEE_MBX_MSG_TYPE msg_type = REE_TO_TEE_MBX_MSG_NULL;
417 #endif
418 MS_PHY MIU_addr;
419 AUDIO_ALG_INFO *pau_info=NULL;
420 MS_U8 DSP_select=0;
421 int ii;
422
423 HALAUDSP_CHECK_SHM_INIT;
424
425 DBG_AUDSP_LOAD("@@@@@@@@@@ ====== HAL_AUDSP_DspLoadCode: 0x%x ======\r\n",dspCodeType);
426
427 if (IS_AUDIO_DSP_CODE_TYPE_DEC1_SYSTEM(dspCodeType))
428 {
429 return TRUE; // Decoder in DEC-R2
430 }
431 else if (IS_AUDIO_DSP_CODE_TYPE_DEC_SYSTEM(dspCodeType)) //AU_DEC_SYSTEM
432 {
433 return TRUE; // Decoder in DEC-R2
434 }
435 else if ((IS_AUDIO_DSP_CODE_TYPE_DEC2_SYSTEM(dspCodeType)) ||
436 (IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType)) ||
437 (IS_AUDIO_DSP_CODE_TYPE_SIF(dspCodeType)) ||
438 (IS_AUDIO_DSP_CODE_TYPE_ADVSND(dspCodeType)) ||
439 (IS_AUDIO_DSP_CODE_TYPE_SE_ENC(dspCodeType)))
440 {
441 for (ii=0; ii< sizeof(dsp_info)/sizeof(AUDIO_ALG_INFO);ii++)
442 {
443 if (dspCodeType == dsp_info[ii].dspCodeType)
444 break;
445 }
446 if (ii < (sizeof(dsp_info)/sizeof(AUDIO_ALG_INFO)))
447 {
448 pau_info = &dsp_info[ii];
449 DSP_select = DSP_SE;
450 }
451 else
452 {
453 DBG_AUDSP_LOAD(" [dsp_info]:decoder type not found.\r\n");
454 return FALSE;
455 }
456 }
457 else
458 {
459 DBG_AUDSP_LOAD(" [HAL_AUDSP_DspLoadCode]:====== Loading the wrong DSP code type!======\r\n");
460 return FALSE;
461 }
462
463 #ifndef MSOS_TYPE_NUTTX
464 AUDIO_TEE_INFO_SHM_CHECK_NULL;
465 REE_TO_TEE_MBX_MSG_SET_PARAM(0, (dspCodeType&0xFF));
466 REE_TO_TEE_MBX_MSG_SET_PARAM(1, ((dspCodeType&0xFF00)>>8));
467 REE_TO_TEE_MBX_MSG_SET_PARAM_COUNT(2);
468 msg_type = REE_TO_TEE_MBX_MSG_HAL_AUDSP_DspLoadCode;
469 if (DSP_select == DSP_DEC)
470 {
471 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_DEC;
472 }
473 else if (DSP_select == DSP_SE)
474 {
475 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_SE;
476 }
477
478 if ( TEE_TO_REE_MBX_ACK_MSG_NO_TEE != (mbx_msg_ack_status = HAL_AUDIO_SendMBXMsg(msg_type)))
479 {
480 if (mbx_msg_ack_status != TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS)
481 return FALSE;
482 HAL_AUDSP_SetDspCodeTypeLoaded(dspCodeType);
483 return TRUE;
484 }
485 #endif
486
487 if(pau_info->cm_len == 0)
488 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
489 HAL_AUDSP_SetDspLoadCodeInfo(pau_info, DSP_select);
490
491 if(DSP_select == DSP_DEC) // IDMA switch
492 {
493 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
494 }
495 else
496 {
497 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
498 }
499
500 if (IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType))
501 {
502 pau_info->cm_addr = 0x0008;
503 pau_info->cm_len = (MST_CODEC_PM1_SIZE - 24);
504 pau_info->cm_buf = (mst_codec_pm1+ 30);
505 }
506
507 // Download PM of Algorithm
508 DBG_AUDSP_LOAD(" PM addr: 0x%x\r\n", pau_info->pm_addr);
509 #if defined (__aarch64__)
510 DBG_AUDSP_LOAD(" PM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->pm_buf);
511 #else
512 DBG_AUDSP_LOAD(" PM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->pm_buf);
513 #endif
514 DBG_AUDSP_LOAD(" PM size: 0x%x\r\n",pau_info->pm_len);
515
516 if(!HAL_AUDSP_DspLoadCodeSegment(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select))
517 return FALSE;
518 if(!HAL_AUDSP_DspVerifySegmentCode(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select))
519 return FALSE;
520
521 DBG_AUDSP_LOAD(" CM addr: 0x%x\r\n", pau_info->cm_addr);
522 #if defined (__aarch64__)
523 DBG_AUDSP_LOAD(" CM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->cm_buf);
524 #else
525 DBG_AUDSP_LOAD(" CM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->cm_buf);
526 #endif
527 DBG_AUDSP_LOAD(" CM size: 0x%x\r\n", pau_info->cm_len);
528
529 if(!HAL_AUDSP_DspLoadCodeSegment(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select))
530 return FALSE;
531 if(!HAL_AUDSP_DspVerifySegmentCode(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select))
532 return FALSE;
533
534 // Download PM of PreFetch
535 if(pau_info->prefetch_len != 0)
536 {
537 DBG_AUDSP_LOAD(" PreFetch PM addr: 0x%x\r\n", pau_info->prefetch_addr);
538 #if defined (__aarch64__)
539 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->prefetch_buf);
540 #else
541 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->prefetch_buf);
542 #endif
543 DBG_AUDSP_LOAD(" PreFetch PM size: 0x%x\r\n", pau_info->prefetch_len);
544
545 MIU_addr = pau_info->prefetch_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
546 DBG_AUDSP_LOAD(" MIU of PreFetch: 0x%08X\r\n", MIU_addr);
547 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((pau_info->prefetch_buf)), pau_info->prefetch_len);
548 }
549
550 // Download PM of Cache
551 if(pau_info->cache_len != 0)
552 {
553 DBG_AUDSP_LOAD(" Cache PM addr: 0x%x\r\n", pau_info->cache_addr);
554 #if defined (__aarch64__)
555 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->cache_buf);
556 #else
557 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->cache_buf);
558 #endif
559 DBG_AUDSP_LOAD(" Cache PM size: 0x%x\r\n", pau_info->cache_len);
560
561 MIU_addr = pau_info->cache_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
562 DBG_AUDSP_LOAD(" MIU of Cache: 0x%08X\r\n", MIU_addr);
563 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((pau_info->cache_buf)), pau_info->cache_len);
564 }
565
566 // Load SE-DSP system code
567 if (IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType))
568 {
569 #if ASND_R2_SUPPORT
570 HAL_AUR2_WriteByte(REG_SNDR2_RESET_CTRL, 0x00); // STOP SND-R2
571 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x0000); //clear SND-R2 start cmd register
572 #endif
573 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear SE-DSP start cmd register
574 AUDIO_DELAY1MS(1);
575
576 #ifdef CONFIG_MBOOT
577 //============ Load R2 code ===============
578 // Memory sequence : Mboot-R2(DEC-R2)
579 //====================================
580
581 // Load DEC-R2
582 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
583
584 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
585 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
586 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
587 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
588 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
589 HAL_DEC_R2_init_SHM_param();
590 AUDIO_DELAY1MS(1);
591 MsOS_FlushMemory();
592
593 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
594 #else
595 //============ Load R2 code ===============
596 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
597 //====================================
598
599 // Load DEC-R2
600 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
601
602 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
603 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
604 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
605 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
606 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
607 HAL_DEC_R2_init_SHM_param();
608 AUDIO_DELAY1MS(1);
609 MsOS_FlushMemory();
610 #if ASND_R2_SUPPORT
611 // Load SND-R2
612 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV)+ADEC__R2_DDR_SIZE;
613 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_snd_r2)), SND_R2_SHM_DDR_OFFSET);
614 memset((void*)(MS_PA2KSEG1(MIU_addr)+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE), 0, ASND__R2_DDR_SIZE - SND_R2_SHM_DDR_OFFSET - SND_R2_SHM_DDR_SIZE);
615 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE),
616 (void*)(mst_snd_r2+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE),
617 MST_SND_R2_AUDIO_SIZE - SND_R2_SHM_DDR_OFFSET - SND_R2_SHM_DDR_SIZE);
618 HAL_SND_R2_init_SHM_param();
619 AUDIO_DELAY1MS(1);
620 MsOS_FlushMemory();
621
622 HAL_SND_R2_EnableR2(TRUE); // Enable SND-R2 after load R2 code
623 #endif
624 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
625 #endif
626
627 if(!HAL_AUDSP_DspLoadCodeSegment(0x0001, mst_codec_pm1+6+3, 21, DSP_select)) return FALSE;
628 if(!HAL_AUDSP_DspVerifySegmentCode(0x0001, mst_codec_pm1+6+3, 21, DSP_select)) return FALSE;
629 if(!HAL_AUDSP_DspLoadCodeSegment(0x0000, mst_codec_pm1+6, 3, DSP_select)) return FALSE;
630 if(!HAL_AUDSP_DspVerifySegmentCode(0x0000, mst_codec_pm1+6, 3, DSP_select)) return FALSE;
631 }
632
633 MsOS_FlushMemory();
634
635 HAL_AUDSP_SetDspCodeTypeLoaded(dspCodeType);
636 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadCode finished(type=%s(0x%x))\r\n", pau_info->AlgName, dspCodeType);
637
638 return TRUE;
639 }
640
HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select,void * info)641 MS_BOOL HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select, void * info)
642 {
643 MS_PHY MIU_addr;
644 AUDIO_ALG_INFO * pau_info = (AUDIO_ALG_INFO *) info;
645
646 if ( pau_info->cm_len == 0 )
647 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
648
649 // HALAUDSP_ERROR ("@@@@@@@@@@ ====== %s: %s start ======\r\n", __FUNCTION__, pau_info->AlgName);
650
651 //HAL_AUDSP_SetDspLoadCodeInfo(pau_info, DSP_select);
652
653 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, ((DSP_select == DSP_DEC) ? 0x00 : 0x01));
654
655 /* Download PM of Algorithm */
656 DBG_AUDSP_LOAD(" PM addr: 0x%x\r\n", pau_info->pm_addr);
657 #if defined (__aarch64__)
658 DBG_AUDSP_LOAD(" PM buf addr: 0x%lx\r\n", (MS_VIRT) pau_info->pm_buf);
659 #else
660 DBG_AUDSP_LOAD(" PM buf addr: 0x%x\r\n", (MS_VIRT) pau_info->pm_buf);
661 #endif
662 DBG_AUDSP_LOAD(" PM size: 0x%x\r\n", pau_info->pm_len);
663
664 if ( !HAL_AUDSP_DspLoadCodeSegment(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select) )
665 {
666 HALAUDSP_ERROR ("Dsp ReLoad Code PM Segment Fail !!\r\n");
667 return FALSE;
668 }
669
670 if ( !HAL_AUDSP_DspVerifySegmentCode(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select) )
671 {
672 HALAUDSP_ERROR ("Dsp ReLoad Code PM Segment Verify Fail !!\r\n");
673 return FALSE;
674 }
675
676 DBG_AUDSP_LOAD(" CM addr: 0x%x\r\n", pau_info->cm_addr);
677 #if defined (__aarch64__)
678 DBG_AUDSP_LOAD(" CM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->cm_buf);
679 #else
680 DBG_AUDSP_LOAD(" CM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->cm_buf);
681 #endif
682 DBG_AUDSP_LOAD(" CM size: 0x%x\r\n", pau_info->cm_len);
683
684 if ( !HAL_AUDSP_DspLoadCodeSegment(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select) )
685 {
686 HALAUDSP_ERROR ("Dsp ReLoad Code CM Segment Fail !!\r\n");
687 return FALSE;
688 }
689
690 if ( !HAL_AUDSP_DspVerifySegmentCode(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select) )
691 {
692 HALAUDSP_ERROR ("Dsp ReLoad Code CM Segment Verify Fail !!\r\n");
693 return FALSE;
694 }
695
696 /* Download PM of PreFetch */
697 if ( pau_info->prefetch_len != 0 )
698 {
699 DBG_AUDSP_LOAD(" PreFetch PM addr: 0x%x\r\n", pau_info->prefetch_addr);
700 #if defined (__aarch64__)
701 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->prefetch_buf);
702 #else
703 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->prefetch_buf);
704 #endif
705 DBG_AUDSP_LOAD(" PreFetch PM size: 0x%x\r\n", pau_info->prefetch_len);
706
707 MIU_addr = (MS_PHY) pau_info->prefetch_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
708 HALAUDSP_ERROR (" MIU of PreFetch: 0x%X\r\n", (unsigned int) MIU_addr);
709
710 memcpy((void *)(MS_PA2KSEG1(MIU_addr)), (void *)((pau_info->prefetch_buf)), pau_info->prefetch_len);
711 }
712
713 /* Download PM of Cache */
714 if ( pau_info->cache_len != 0 )
715 {
716 DBG_AUDSP_LOAD(" Cache PM addr: 0x%x\r\n", pau_info->cache_addr);
717 #if defined (__aarch64__)
718 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->cache_buf);
719 #else
720 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->cache_buf);
721 #endif
722 DBG_AUDSP_LOAD(" Cache PM size: 0x%x\r\n", pau_info->cache_len);
723
724 MIU_addr = (MS_U32)pau_info->cache_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
725 DBG_AUDSP_LOAD(" MIU of Cache: 0x%X\r\n", MIU_addr);
726
727 memcpy((void *)(MS_PA2KSEG1(MIU_addr)), (void *)((pau_info->cache_buf)), pau_info->cache_len);
728 }
729
730 MsOS_FlushMemory();
731
732 DBG_AUDSP_LOAD("DSP %s finished (type=%s)\r\n", ((DSP_select == DSP_DEC) ? "DEC" : "SND"), pau_info->AlgName);
733
734 return TRUE;
735 }
736
HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select,AUDIO_ALG_INFO * pau_info)737 MS_BOOL HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select, AUDIO_ALG_INFO * pau_info)
738 {
739 MS_U8 * dsp_bootcode;
740 #ifndef CONFIG_MBOOT
741 MS_PHY MIU_addr;
742 #endif
743
744 if ( pau_info->cm_len == 0 )
745 {
746 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
747 }
748
749 dsp_bootcode = pau_info->cm_buf;
750
751 pau_info->cm_addr = 0x0008;
752 pau_info->cm_len = (MST_CODEC_PM1_SIZE - 24);
753 pau_info->cm_buf = (mst_codec_pm1 + 30);
754
755 if ( !HAL_AUDSP_DspLoadCode2(DSP_select, pau_info) )
756 {
757 return FALSE;
758 }
759
760 if ( DSP_select == DSP_SE )
761 {
762 HAL_AUDIO_WriteMaskReg(0x2E9E, 0xFFFF, 0x0000);
763 HAL_AUDIO_WriteMaskByte(REG_DECR2_RESET_CTRL, 0xFF, 0x00); //Stop R2
764 HAL_AUDIO_WriteMaskReg(0x2E9E, 0xFFFF, 0x0000); //clear R2 & SE-DSP start cmd register
765 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear R2 & SE-DSP start cmd register
766 AUDIO_DELAY1MS(1);
767 #ifndef CONFIG_MBOOT
768 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(2);
769 memcpy((void *) (MS_PA2KSEG1 (MIU_addr)), (void *) ((mst_codec_r2)), MST_CODEC_R2_AUDIO_SIZE);
770 #endif
771 HAL_AUDIO_WriteMaskByte(REG_DECR2_RESET_CTRL, 0xFF, 0x27); //Eanble R2
772 }
773
774
775 if ( !HAL_AUDSP_DspLoadCodeSegment(0x0001, dsp_bootcode + 3, 21, DSP_select) )
776 {
777 return FALSE;
778 }
779
780 if ( !HAL_AUDSP_DspVerifySegmentCode(0x0001, dsp_bootcode + 3, 21, DSP_select) )
781 {
782 return FALSE;
783 }
784
785 if ( !HAL_AUDSP_DspLoadCodeSegment(0x0000, dsp_bootcode, 3, DSP_select) )
786 {
787 return FALSE;
788 }
789
790 if ( !HAL_AUDSP_DspVerifySegmentCode(0x0000, dsp_bootcode, 3, DSP_select) )
791 {
792 return FALSE;
793 }
794
795
796 MsOS_FlushMemory();
797
798 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadSystemCode2 finished(type=%s)\r\n", pau_info->AlgName);
799 printf("HAL_AUDSP_DspLoadSystemCode2 finished(type=%s)\r\n", pau_info->AlgName);
800
801 return TRUE;
802 }
803
804 ////////////////////////////////////////////////////////////////////////////////
805 /// @brief \b Function \b Name: HAL_AUDIO_DspLoadCodeSegment()
806 /// @brief \b Function \b Description: This routine is used to load DSP code
807 /// @param <IN> \b dsp_addr :
808 /// @param <IN> \b dspCode_buf :
809 /// @param <IN> \b dspCode_buflen :
810 /// @param <OUT> \b NONE :
811 /// @param <RET> \b BOOL : TRUE --DSP Load code okay
812 /// FALSE--DSP Load code fail
813 /// @param <GLOBAL> \b NONE :
814 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)815 MS_BOOL HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
816 {
817 MS_U32 i,j;
818 MS_U32 idma_wrbase_addr_l, dsp_brg_data_l, dsp_brg_data_h, bdma_mode_addr;
819
820 HALAUDSP_CHECK_SHM_INIT;
821
822 OS_OBTAIN_MUTEX(_s32AUDIOMutexIDMA, MSOS_WAIT_FOREVER);
823
824 g_bDSPLoadCode = TRUE;
825
826 if(DSP_select == DSP_DEC)
827 {
828 idma_wrbase_addr_l = REG_DEC_IDMA_WRBASE_ADDR_L;
829 dsp_brg_data_l = REG_DEC_DSP_BRG_DATA_L;
830 dsp_brg_data_h = REG_DEC_DSP_BRG_DATA_H;
831 bdma_mode_addr = REG_DEC_BDMA_CFG;
832 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
833 }
834 else
835 {
836 idma_wrbase_addr_l = REG_SE_IDMA_WRBASE_ADDR_L;
837 dsp_brg_data_l = REG_SE_DSP_BRG_DATA_L;
838 dsp_brg_data_h = REG_SE_DSP_BRG_DATA_H;
839 bdma_mode_addr = REG_SE_BDMA_CFG;
840 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
841 }
842
843 HAL_AUDIO_WriteMaskReg(bdma_mode_addr, 0x8080, 0x0000); // disable bdma
844
845 if(dspCode_buflen>0)
846 {
847 /* set iDMA addr */
848
849 HAL_AUDIO_WriteReg(idma_wrbase_addr_l, dsp_addr);
850
851 AUDIO_DELAY1MS(1);
852
853 for( i=0; i<dspCode_buflen; i+=3)
854 {
855 HAL_AUDIO_WriteByte(dsp_brg_data_l,*(dspCode_buf+i+1));
856 HAL_AUDIO_WriteByte(dsp_brg_data_h,*(dspCode_buf+i+2));
857
858 for(j=0;j<2;j++);//for delay only
859
860 HAL_AUDIO_WriteByte(dsp_brg_data_l,*(dspCode_buf+i));
861 HAL_AUDIO_WriteByte(dsp_brg_data_h,0x00);
862
863 if(DSP_select == DSP_DEC)
864 {
865 if (HAL_AUDSP_CheckDecIdmaReady(AUD_CHK_DSP_WRITE_RDY)==FALSE)
866 {
867 g_bDSPLoadCode = FALSE;
868
869 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
870
871 return FALSE;
872 }
873 }
874 else
875 {
876 if (HAL_AUDSP_CheckSeIdmaReady(AUD_CHK_DSP_WRITE_RDY)==FALSE)
877 {
878 g_bDSPLoadCode = FALSE;
879
880 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
881
882 return FALSE;
883 }
884 }
885 }
886 }
887
888 g_bDSPLoadCode = FALSE;
889
890 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
891
892 return TRUE;
893 }
894
HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)895 MS_BOOL HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
896 {
897 MS_U32 i;
898 MS_U8 dat[3];
899 MS_U32 idma_rdbase_addr_l, idma_ctrl0, idma_rddata_h_0, idma_rddata_h_1, idma_rddata_l, bdma_mode_addr;
900
901 #if (DSP_VERIFY_DSP_CODE==0)
902 return TRUE; //don't verify just return;
903 #endif
904
905 HALAUDSP_CHECK_SHM_INIT;
906
907 OS_OBTAIN_MUTEX(_s32AUDIOMutexIDMA, MSOS_WAIT_FOREVER);
908
909 g_bDSPLoadCode = TRUE;
910
911 if ( DSP_select == DSP_DEC )
912 {
913 idma_rdbase_addr_l = REG_DEC_IDMA_RDBASE_ADDR_L;
914 idma_ctrl0 = REG_DEC_IDMA_CTRL0;
915 idma_rddata_h_0 = REG_DEC_IDMA_RDDATA_H_0;
916 idma_rddata_h_1 = REG_DEC_IDMA_RDDATA_H_1;
917 idma_rddata_l = REG_DEC_IDMA_RDDATA_L;
918 bdma_mode_addr = REG_DEC_BDMA_CFG;
919 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
920 }
921 else
922 {
923 idma_rdbase_addr_l = REG_SE_IDMA_RDBASE_ADDR_L;
924 idma_ctrl0 = REG_SE_IDMA_CTRL0;
925 idma_rddata_h_0 = REG_SE_IDMA_RDDATA_H_0;
926 idma_rddata_h_1 = REG_SE_IDMA_RDDATA_H_1;
927 idma_rddata_l = REG_SE_IDMA_RDDATA_L;
928 bdma_mode_addr = REG_SE_BDMA_CFG;
929 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
930 }
931
932 //HAL_AUDIO_WriteMaskByte(0x3CEC, 0x40, 0x00);
933 HAL_AUDIO_WriteMaskReg(bdma_mode_addr, 0x8080, 0x0000); // disable bdma (enable idma)
934 HAL_AUDIO_WriteReg(idma_rdbase_addr_l, dsp_addr);
935 AUDIO_DELAY1MS(1);
936
937 for (i=0; i<dspCode_buflen; i+=3)
938 {
939 HAL_AUDIO_WriteMaskByte(idma_ctrl0, 0x08, 0x08 );
940 #if (DSP_IDMA_CHK_READY == 1)
941 if(DSP_select == DSP_DEC)
942 {
943 if (HAL_AUDSP_CheckDecIdmaReady(AUD_CHK_DSP_READ_RDY)==FALSE)
944 {
945 g_bDSPLoadCode = FALSE;
946
947 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
948
949 return FALSE;
950 }
951 }
952 else
953 {
954 if (HAL_AUDSP_CheckSeIdmaReady(AUD_CHK_DSP_READ_RDY)==FALSE)
955 {
956 g_bDSPLoadCode = FALSE;
957
958 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
959
960 return FALSE;
961 }
962 }
963 #endif
964 dat[1] = HAL_AUDIO_ReadByte(idma_rddata_h_0);
965 dat[2] = HAL_AUDIO_ReadByte(idma_rddata_h_1);
966 dat[0] = HAL_AUDIO_ReadByte(idma_rddata_l);
967
968 //printf("@@%x\n", (dat[2] << 16) | (dat[1] << 8) | (dat[0]));
969
970 if ( (dat[0]!=dspCode_buf[i]) || (dat[1]!=dspCode_buf[i+1]) ||
971 (dat[2]!=dspCode_buf[i+2]))
972 {
973 printf("check data %x\n", (unsigned int)i);
974 printf("dat0 %X <===> ",dspCode_buf[i]);
975 printf("%x \n", dat[0]);
976 printf("dat1 %X <===> ",dspCode_buf[i+1]);
977 printf("%x \n", dat[1]);
978 printf("dat2 %x <===> ",dspCode_buf[i+2]);
979 printf("%X \n", dat[2]);
980 printf(" Dsp code verify error!!\r\n");
981
982 g_bDSPLoadCode = FALSE;
983
984 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
985
986 return FALSE;
987 }
988 }
989
990 DBG_AUDSP(" Dsp code verify ok!!\n\r");
991
992 g_bDSPLoadCode = FALSE;
993
994 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
995
996 return TRUE;
997 }
998
999 ////////////////////////////////////////////////////////////////////////////////
1000 /// @brief \b Function \b Name: HAL_AUDSP_CheckDecIdmaReady()
1001 /// @brief \b Function \b Description: This routine is used to check if the Dec-DSP IDMA is ready or not.
1002 /// @param <IN> \b IdmaChk_type :
1003 /// 0x10 : check write ready
1004 /// 0x80 : check read ready
1005 /// @param <OUT> \b NONE :
1006 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
1007 /// FALSE--IDMA not ready
1008 /// @param <GLOBAL> \b NONE :
1009 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type)1010 MS_BOOL HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type )
1011 {
1012 MS_U8 j = 0;
1013
1014 while(j<200)
1015 {
1016 j++;
1017 if( (HAL_AUDIO_ReadByte(REG_DEC_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
1018 return TRUE;
1019 }
1020
1021 DBG_AUDSP_ERROR("DSP DEC Idma check ready fail!(%d)\r\n",j);
1022 return FALSE;
1023 }
1024
1025 ////////////////////////////////////////////////////////////////////////////////
1026 /// @brief \b Function \b Name: HAL_AUDIO_CheckSeIdmaReady()
1027 /// @brief \b Function \b Description: This routine is used to check if the Se-DSP IDMA is ready or not.
1028 /// @param <IN> \b IdmaChk_type :
1029 /// 0x10 : check write ready
1030 /// 0x80 : check read ready
1031 /// @param <OUT> \b NONE :
1032 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
1033 /// FALSE--IDMA not ready
1034 /// @param <GLOBAL> \b NONE :
1035 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)1036 MS_BOOL HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)
1037 {
1038 MS_U8 j = 0;
1039
1040 while(j<200)
1041 {
1042 j++;
1043 if( (HAL_AUDIO_ReadByte(REG_SE_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
1044 return TRUE;
1045 }
1046
1047 DBG_AUDSP_ERROR("DSP SE Idma check ready fail!(%d)\r\n",j);
1048 return FALSE;
1049 }
1050
1051 ////////////////////////////////////////////////////////////////////////////////
1052 /// @brief \b Function \b Name: HAL_AUDSP_SetDspCodeTypeLoaded()
1053 /// @brief \b Function \b Description: This function is used to set the DSP code type.
1054 /// @param <IN> \b NONE :
1055 /// @param <OUT> \b NONE :
1056 /// @param <RET> \b MS_U8: DSP code type.
1057 /// @param <GLOBAL> \b NONE :
1058 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_SetDspCodeTypeLoaded(MS_U8 u8Type)1059 void HAL_AUDSP_SetDspCodeTypeLoaded(MS_U8 u8Type)
1060 {
1061 g_u8DspCodeTypeLoaded=u8Type;
1062 }
1063
1064 ////////////////////////////////////////////////////////////////////////////////
1065 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
1066 /// @brief \b Function \b Description: This function is used to get the MAD base address.
1067 /// @param <IN> \b NONE :
1068 /// @param <OUT> \b NONE :
1069 /// @param <RET> \b MS_U8: DSP code type.
1070 /// @param <GLOBAL> \b NONE :
1071 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspCodeTypeLoaded(void)1072 MS_U8 HAL_AUDSP_GetDspCodeTypeLoaded(void)
1073 {
1074 return g_u8DspCodeTypeLoaded;
1075 }
1076
HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO * pau_info,MS_U8 DSP_select)1077 void HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO *pau_info, MS_U8 DSP_select)
1078 {
1079 g_loadcodeinfo.pau_info = pau_info;
1080 g_loadcodeinfo.DSP_select= DSP_select;
1081 }
1082
1083 ////////////////////////////////////////////////////////////////////////////////
1084 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
1085 /// @brief \b Function \b Description: This function is used to get the MAD base address.
1086 /// @param <IN> \b NONE :
1087 /// @param <OUT> \b NONE :
1088 /// @param <RET> \b MS_U8: DSP code type.
1089 /// @param <GLOBAL> \b NONE :
1090 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspLoadCodeInfo(void)1091 LOAD_CODE_INFO* HAL_AUDSP_GetDspLoadCodeInfo(void)
1092 {
1093 return &g_loadcodeinfo;
1094 }
1095