1function 1: modify ddr.bin file from ddrbin_param.txt. 2 1) modify "ddrbin_param.txt", set ddr frequency, uart info etc what you want. 3 If want to keep items default, please keep these items blank. 4 2) run "ddrbin_tool" with argument 1: ddrbin_param.txt, argument 2: ddr bin file. 5 like: ./ddrbin_tool ddrbin_param.txt px30_ddr_333MHz_v1.13.bin 6function 2: get ddr.bin file config to gen_param.txt file 7 If want to get ddrbin file config, please run like that: 8 ./ddrbin_tool -g gen_param.txt px30_ddr_333MHz_v1.15.bin 9 The config will show in gen_param.txt. 10 11The detail information as following: 12 13* support ddrbin version 14 The 'X' means not support change those parameters by tool. 15 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 16 | platform | uart info | ddr freq | ssmod | DDR 2T | sr pd | drv, odt, Vref etc| dis print training info | dis CBT | 17 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 18 | RV1108 | V1.08 | V1.08 | V1.10 | V1.08 | V1.08 | X | X | X | 19 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 20 | PX30/RK3326 | V1.11 | X | V1.16 | V1.12 | V1.15 | X | X | X | 21 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 22 | RK1808 | V1.03 | V1.03 | V1.05 | V1.03 | V1.04 | X | X | X | 23 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 24 | RK322x | V1.08 | V1.08 | X | V1.09 | X | X | X | X | 25 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 26 | RK322xh | V1.14 | X | V1.17 | V1.16 | V1.17 | X | X | X | 27 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 28 | RK3288 | V1.11 | X | X | V1.11 | X | X | X | X | 29 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 30 | RK3308 | V1.28 | V1.28 | V1.31 | V1.29 | V1.30 | X | X | X | 31 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 32 | RK3308S | V2.05 | V2.05 | V2.05 | V2.05 | V2.05 | X | X | X | 33 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 34 | RK3368 | V2.04 | V2.04 | X | V2.05 | X | X | X | X | 35 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 36 | RK3328 | V1.14 | X | V1.17 | V1.16 | V1.17 | X | X | X | 37 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 38 | RK3399 | V1.25 | X | V1.25 | X | X | X | X | X | 39 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 40 | RK3399PRO NPU | V1.03 | V1.03 | X | V1.03 | X | X | X | X | 41 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 42 | RV1126/RV1109 | V1.00 | V1.00 | V1.05 | V1.00 | V1.05 | V1.05 | X | X | 43 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 44 | RK3566/RK3568 | V1.00 | V1.00 | V1.06 | V1.00 | V1.00 | V1.06 | V1.07 | X | 45 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 46 | RK3588 | V1.00 | V1.00 | X | V1.00 | V1.00 | V1.00 | X | X | 47 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 48 49* UART info 50 51uart id: uart number. 0 for uart0, 1 for uart1, 2 for uart2..., 0xf will disable uart. 52uart iomux: uart iomux info, 0 for uartn_m0, 1 for uartn_m1, 2 for uartn_m2...(like uart2_m0, uart2_m1,uart2_m2), 53or 1 for uartn_a, 2 for uartn_b, 3 for uartn_c.(like uar2a, uart2b, uart2c). 54uart baudrate: uart baudrate should be 115200 or 1500000. 55 56* disable print training information 57 58dis_printf_training: 1: will disabled print training information; 0: will enable print training information. 59 60* disable Command Bus Training(CBT) for lp4/lp4x 61 62dis_cbt_for_lp4_lp4x: 1: will disbaled CBT for lp4/lp4x; 0: will enable CBT for lp4/lp4x. Reserve function, all platforms are not support. 63 64* DDR (final) freq 65 66For RV1126/RV1109, RK3566/RK3568, RK3588, the frequencies as follows can choose to final freq in loader. 67 68ddr2_freq: ddr2 frequency, unit:MHz. 69lp2_freq: lpddr2 frequency, unit:MHz. 70ddr3_freq: ddr3 frequency, unit:MHz. 71lp3_freq: lpddr3 frequency, unit:MHz. 72ddr4_freq: ddr4 frequency, unit:MHz. 73lp4_freq: lpddr4 frequency, unit:MHz. 74lp4x_freq: lpddr4x frequency, unit:MHz. 75lp5_freq: lpddr5 frequency, unit:MHz. 76 77The 'X' as follows means not support change frequencies by tool. 78+---------------+-----------------------------------------------------------------+ 79| platform | support frequencies | 80+---------------+-----------------------------------------------------------------+ 81| RK1108 | DDR2 fix 400, LP2 not larger than 533, DDR3 not larger than 800 | 82+---------------+-----------------------------------------------------------------+ 83| PX30/RK3326 | X | 84+---------------+-----------------------------------------------------------------+ 85| RK1808 | 333,400,533,666,786,933 | 86+---------------+-----------------------------------------------------------------+ 87| RK322x | DDR2/LP2 not larger than 533, not larger than 800 | 88+---------------+-----------------------------------------------------------------+ 89| RK322xh | X | 90+---------------+-----------------------------------------------------------------+ 91| RK3288 | X | 92+---------------+-----------------------------------------------------------------+ 93| RK3308/RK3308S| DDR2/LP2: 393,451; DDR3: 393,451,589 | 94+---------------+-----------------------------------------------------------------+ 95| RK3368 | DDR3 not larger than 800, LP3 not larger than 666 | 96+---------------+-----------------------------------------------------------------+ 97| RK3328 | X | 98+---------------+-----------------------------------------------------------------+ 99| RK3399 | X | 100+---------------+-----------------------------------------------------------------+ 101| RK3399PRO NPU | 333,400,533,666,786,933 | 102+---------------+-----------------------------------------------------------------+ 103| RV1126/RV1109 | 328,396,528,664,784,924,1056 | 104+---------------+-----------------------------------------------------------------+ 105| RK3566 | 324,396,528,630,780,920,1056 | 106+---------------+-----------------------------------------------------------------+ 107| RK3568 | DDR3/LP3: 324,396,528,630,780,920,1056,1184 | 108| | DDR4/LP4/LP4X: 324,396,528,630,780,920,1056,1184,1332,1560 | 109+---------------+-----------------------------------------------------------------+ 110| RK3588 | LP4/LP4x [306.5MHz - 2133MHz]; LP5: [400MHz - 2750MHz] | 111+---------------+-----------------------------------------------------------------+ 112 113* DDR frequencies(add more) 114 115ddr2_f1_freq_mhz: ddr2 frequency number 1, unit:MHz. 116ddr2_f2_freq_mhz: ddr2 frequency number 2, unit:MHz. 117ddr2_f3_freq_mhz: ddr2 frequency number 3, unit:MHz. 118ddr2_f4_freq_mhz: ddr2 frequency number 4, unit:MHz. 119ddr2_f5_freq_mhz: ddr2 frequency number 5, unit:MHz. 120... 121 122ddr*_f*_freq_mhz/lp*_f*_freq_mhz: ddr*_f*_freq_mhz/lp*_f*_freq_mhz: Only RV1126/RV1109, RK3566/RK3568, RK3588 used. 123The program will initialize dram by following order. 124for example: ddr4_f1_freq_mhz --> ddr4_f2_freq_mhz --> ddr4_f3_freq_mhz --> ddr4_freq. 125And the final frequency is 'ddr4_freq' to boot system. 126So it is better to arrange the frequency values in order as above. That means the max freq is in final freq(lp*/ddr*_freq) and the min freq is in 'ddr*/lp*_f1_freq_mhz'. 127 ddr*/lp*_f1_freq_mhz < ddr*/lp*_f2_freq_mhz < ddr*/lp*_f3_freq_mhz < lp*/ddr*_freq(the final freq) 128For example: 129 ... 130 ddr4_freq=1560 131 ... 132 ddr4_f1_freq_mhz=324 133 ddr4_f2_freq_mhz=528 134 ddr4_f3_freq_mhz=780 135 ... 136 137The ddr frequency table in kernel dts/dtsi file need correspond to these frequencies. 138 139* SR PD idle 140 141sr_idle: auto self-refresh mode delay time. 142pd_idle: auto power-down mode delay time. 143 144* DDR 2T 145 146ddr_2t: ddr 2T timing mode. 1: enable ddr 2T, 0: disable ddr 2T. 147 148* PLL ssmod 149 150These parameters are about Spread Spectrum Modulator(ssmod) for PLL. 151ssmod_downspread: ssmod work mode. 0: down spread, 1: center spread. 152ssmod_div: Divider required to set the modulation frequency. RK3308/RK3308S suggests to ssmod_div=2, others platforms suggest to ssmod_div=5. 153ssmod_spread: spread amplitude % = 0.1 * ssmod_spread; 0: disable ssmod, others will enable ssmod, max to 0x1f. 154 155* driver strength 156 157phy_ddr*_dq_drv_when_odten_ohm: The PHY DQ/DQS driver strength(write direction) when DRAM odt on. unit: ohm. 158phy_ddr*_ca_drv_when_odten_ohm: The PHY CMD/ADDR driver strength when DRAM odt on. unit: ohm. 159phy_ddr*_clk_drv_when_odten_ohm: The PHY clock driver strength when DRAM odt on. unit: ohm. 160ddr*_dq_drv_when_odten_ohm: The DRAM DQ/DQS driver strength(read direction) when PHY odt on. unit: ohm. 161phy_ddr*_dq_drv_when_odtoff_ohm: The PHY DQ/DQS driver strength(write direction) when DRAM odt off. unit: ohm. 162phy_ddr*_ca_drv_when_odtoff_ohm: The PHY CMD/ADDR driver strength when DRAM odt off. unit: ohm. 163phy_ddr*_clk_drv_when_odtoff_ohm: The PHY clock driver strength when DRAM odt off. unit: ohm. 164ddr*_dq_drv_when_odtoff_ohm: The DRAM DQ/DQS driver strength(read direction) when PHY odt off. unit: ohm. 165 166The phy side driver strength support value as follows: 167+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+ 168| platform | DDR3 | DDR4 | LP3 | LP4 | LP4X pull up | LP4X pull down | 169+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+ 170| | 455,230,153,115, | 482,244,162,122, | | 501,253,168,126,| | | 171| | 91,76,65,57,51,46,| 97,81,69,61,54,48,| | 101,84,72,63,56,| | | 172| RV1126/RV1109 | 41,38,35,32,30,28,| 44,40,37,34,32,30,| follow DDR4 | 50,46,42,38,36, | follow LP4 | follow LP4 | 173| | 27,25,24,23,22,21,| 28,27,25,24,23,22,| | 33,31,29,28,26, | | | 174| | 20 | 21 | | 25,24,23,22 | | | 175+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+ 176| | 500,250,167,125, | 556,279,185,139, | | 576,289,192,144,| 646,323,215, | 513,259,172, | 177| | 100,83,71,63,56, | 111,93,79,69,62, | | 115,96,82,72,64,| 162,129,108,92,| 130,104,86,74, | 178| RK3566/RK3568 | 50,45,41,38,36,33,| 55,50,46,42,39,37,| follow DDR4 | 57,52,48,44,41, | 81,72,65,59,54,| 65,58,52,47,43,| 179| | 31,29,28,26,25,24,| 34,32,31,29,27,26,| | 38,36,34,32,30, | 50,46,43,40,38,| 40,37,35,32,30,| 180| | 23,22 | 25,24 | | 28,27,26,25 | 36,34,32,31,29,| 29,27,26,25,24,| 181| | | | | | 28 | 23 | 182+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+ 183 184The DRAM side driver strength support value as follows: 185+---------------+-------------------+-------------------+----------------+----------------------+----------------+ 186| platform | DDR3 | DDR4 | LP3 | LP4 | LP4X | 187+---------------+-------------------+-------------------+----------------+----------------------+----------------+ 188| all | 40,34 | 34,48 | 34,40,48,60,80 | 40,48,60,80,120,240 | follow LP4 | 189+---------------+-------------------+-------------------+----------------+----------------------+----------------+ 190 191* ODT 192phy_ddr*_odt_ohm: The PHY ODT strength(read direction). unit: ohm. 193ddr*_odt_ohm: The DRAM ODT strength(write direction). unit: ohm. 194phy_ddr*_odt_pull_up_en: 1: enable PHY pull up odt. 0: disable 195phy_ddr*_odt_pull_dn_en: 1: enable PHY pull down odt. 0: disable 196phy_ddr*_odten_freq_mhz: The PHY odt enable when larger than this frequency. unit: MHz. 197ddr*_odten_freq_mhz: The DRAM odt(DQ/DQS) enable when larger than this frequency. unit: MHz. 198 199The phy side ODT support value as follows: 200The ODT "0" means disabled ODT. 201+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+ 202| platform | DDR3 | DDR4 | LP3 | LP4 | LP4X pull up | LP4X pull down | 203+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+ 204| | 0,561,282,188,141,| 0,586,294,196,148, | | 0,604,303,202,152,| | | 205| | 113,94,81,72,64, | 118,99,58,76,67,60,| | 122,101,87,78,69, | | | 206| RV1126/RV1109 | 58,52,48,44,41, | 55,50,46,43,40,38, | follow DDR4 | 62,56,52,48,44,41,| follow LP4 | follow LP4 | 207| | 38,37,34,32,31,29,| 36,34,32,31,29,28, | | 39,37,35,33,32,30,| | | 208| | 28,27,25 | 27 | | 29,27 | | | 209+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+ 210| | 0,500,250,167,125,| 0,556,279,185,139, | | 0,576,289,192,144,| 0,646,323,215, | 0,513,259,172, | 211| | 100,83,71,63,56, | 111,93,79,69,62, | | 115,96,82,72,64, | 162,129,108,92,| 130,104,86,74, | 212| RK3566/RK3568 | 50,45,41,38,36,33,| 55,50,46,42,39,37, | follow DDR4 | 57,52,48,44,41, | 81,72,65,59,54,| 65,58,52,47,43,| 213| | 31,29,28,26,25,24,| 34,32,31,29,27,26, | | 38,36,34,32,30, | 50,46,43,40,38,| 40,37,35,32,30,| 214| | 23,22 | 25,24 | | 28,27,26,25 | 36,34,32,31,29,| 29,27,26,25,24,| 215| | | | | | 28 | 23 | 216+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+ 217 218The DRAM side ODT support value as follows: 219+---------------+-------------------+-------------------+--------------+-----------------------+----------------+ 220| platform | DDR3 | DDR4 | LP3 | LP4(include DQ and CA)| LP4X | 221+---------------+-------------------+-------------------+--------------+-----------------------+----------------+ 222| all | 0,40,60,120 | 0,34,40,48,60,120 | 0,60,120,240 | 0,40,48,60,80,120,240 | follow LP4 | 223+---------------+-------------------+-------------------+--------------+-----------------------+----------------+ 224 225* slew rate 226 227phy_ddr*_dq_sr_when_odten: The PHY DQ/DQS slew rate when odt on. 228phy_ddr*_ca_sr_when_odten: The PHY CMD/ADDR slew rate when odt on. 229phy_ddr*_clk_sr_when_odten: The PHY clock slew rate when odt on. 230phy_ddr*_dq_sr_when_odtoff: The PHY DQ/DQS slew rate when odt off. 231phy_ddr*_ca_sr_when_odtoff: The PHY CMD/ADDR slew rate when odt off. 232phy_ddr*_clk_sr_when_odtoff: The PHY clock slew rate when odt off. 233 234* byte map 235 236ddr*_bytes_map: Reserve function. 237 238* dq remap 239 240lp*_dq*_*_map: Reserve function. 241ddr*_cs*_dq*_dq*_map: Reserve function. 242 243* lp4/lp4x more information 244 245lp4*_ca_odten_freq_mhz: The DRAM CMD/ADDR odt enable when larger than this frequency. unit: MHz. 246phy_lp4*_dq_vref_when_odten: The PHY VrefDQ when PHY odt on. uint: parts per thousand. 247lp4*_dq_vref_when_odten: The DRAM VrefDQ when DRAM DQ/DQS odt on. uint: parts per thousand. 248lp4*_ca_vref_when_odten: The DRAM VrefCA when DRAM CA odt on. uint: parts per thousand. 249phy_lp4_dq_vref_when_odtoff: The PHY VrefDQ when PHY odt off. uint: parts per thousand. 250lp4_dq_vref_when_odtoff: The DRAM VrefDQ when DRAM DQ/DQS odt off. uint: parts per thousand. 251lp4_ca_vref_when_odtoff: The DRAM VrefCA when DRAM CA odt off. uint: parts per thousand. 252 253* hash info 254ch/bank/rank_mask*: is used to DDR address hash mask. 255