1function 1: modify ddr.bin file from ddrbin_param.txt. 2 1) modify "ddrbin_param.txt", set ddr frequency, uart info etc what you want. 3 If want to keep items default, please keep these items blank. 4 2) run "ddrbin_tool" with argument 1: ddrbin_param.txt, argument 2: ddr bin file. 5 like: ./ddrbin_tool ddrbin_param.txt px30_ddr_333MHz_v1.13.bin 6function 2: get ddr.bin file config to gen_param.txt file 7 If want to get ddrbin file config, please run like that: 8 ./ddrbin_tool -g gen_param.txt px30_ddr_333MHz_v1.15.bin 9 The config will show in gen_param.txt. 10 11The detail information as following: 12 13* support ddrbin version 14 The 'X' means not support change those parameters by tool. 15 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 16 | platform | uart info | ddr freq | ssmod | DDR 2T | sr pd | drv, odt, Vref etc| dis print training info | dis CBT | 17 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 18 | RV1108 | V1.08 | V1.08 | V1.10 | V1.08 | V1.08 | X | X | X | 19 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 20 | PX30/RK3326 | V1.11 | X | V1.16 | V1.12 | V1.15 | X | X | X | 21 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 22 | RK1808 | V1.03 | V1.03 | V1.05 | V1.03 | V1.04 | X | X | X | 23 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 24 | RK322x | V1.08 | V1.08 | X | V1.09 | X | X | X | X | 25 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 26 | RK322xh | V1.14 | X | V1.17 | V1.16 | V1.17 | X | X | X | 27 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 28 | RK3288 | V1.07 | X | X | V1.08 | X | X | X | X | 29 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 30 | RK3308 | V1.28 | V1.28 | V1.31 | V1.29 | V1.30 | X | X | X | 31 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 32 | RK3368 | V2.04 | V2.04 | X | V2.05 | X | X | X | X | 33 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 34 | RK3328 | V1.14 | X | V1.17 | V1.16 | V1.17 | X | X | X | 35 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 36 | RK3399 | V1.25 | X | V1.25 | X | X | X | X | X | 37 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 38 | RK3399PRO NPU | V1.03 | V1.03 | X | V1.03 | X | X | X | X | 39 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 40 | RV1126/RV1109 | V1.00 | V1.00 | V1.05 | V1.00 | V1.05 | V1.05 | X | X | 41 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 42 | RK3566/RK3568 | V1.00 | V1.00 | V1.06 | V1.00 | V1.00 | V1.06 | V1.07 | X | 43 +---------------+-----------+----------+-------+--------+-------+-------------------+-------------------------+---------+ 44 45* UART info 46 47uart id: uart number. 0 for uart0, 1 for uart1, 2 for uart2..., 0xf will disable uart. 48uart iomux: uart iomux info, 0 for uartn_m0, 1 for uartn_m1, 2 for uartn_m2...(like uart2_m0, uart2_m1,uart2_m2), 49or 1 for uartn_a, 2 for uartn_b, 3 for uartn_c.(like uar2a, uart2b, uart2c). 50uart baudrate: uart baudrate should be 115200 or 1500000. 51 52* disable print training information 53 54dis_printf_training: 1: will disabled print training information; 0: will enable print training information. 55 56* disable Command Bus Training(CBT) for lp4/lp4x 57 58dis_cbt_for_lp4_lp4x: 1: will disbaled CBT for lp4/lp4x; 0: will enable CBT for lp4/lp4x. Reserve function, all platforms are not support. 59 60* DDR (final) freq 61 62For RV1126/RV1109, RK3566/RK3568, the frequencies as follows can choose to final freq in loader. 63 64ddr2_freq: ddr2 frequency, unit:MHz. 65lp2_freq: lpddr2 frequency, unit:MHz. 66ddr3_freq: ddr3 frequency, unit:MHz. 67lp3_freq: lpddr3 frequency, unit:MHz. 68ddr4_freq: ddr4 frequency, unit:MHz. 69lp4_freq: lpddr4 frequency, unit:MHz. 70lp4x_freq: lpddr4x frequency, unit:MHz. 71 72The 'X' as follows means not support change frequencies by tool. 73+---------------+-----------------------------------------------------------------+ 74| platform | support frequencies | 75+---------------+-----------------------------------------------------------------+ 76| RK1108 | DDR2 fix 400, LP2 not larger than 533, DDR3 not larger than 800 | 77+---------------+-----------------------------------------------------------------+ 78| PX30/RK3326 | X | 79+---------------+-----------------------------------------------------------------+ 80| RK1808 | 333,400,533,666,786,933 | 81+---------------+-----------------------------------------------------------------+ 82| RK322x | DDR2/LP2 not larger than 533, not larger than 800 | 83+---------------+-----------------------------------------------------------------+ 84| RK322xh | X | 85+---------------+-----------------------------------------------------------------+ 86| RK3288 | X | 87+---------------+-----------------------------------------------------------------+ 88| RK3308 | 393,451,589 | 89+---------------+-----------------------------------------------------------------+ 90| RK3368 | DDR3 not larger than 800, LP3 not larger than 666 | 91+---------------+-----------------------------------------------------------------+ 92| RK3328 | X | 93+---------------+-----------------------------------------------------------------+ 94| RK3399 | X | 95+---------------+-----------------------------------------------------------------+ 96| RK3399PRO NPU | 333,400,533,666,786,933 | 97+---------------+-----------------------------------------------------------------+ 98| RV1126/RV1109 | 328,396,528,664,784,924,1056 | 99+---------------+-----------------------------------------------------------------+ 100| RK3566/RK3568 | 324,396,528,630,780,920,1056,1184,1332,1560 | 101+---------------+-----------------------------------------------------------------+ 102 103* DDR frequencies(add more) 104 105ddr2_f1_freq_mhz: ddr2 frequency number 1, unit:MHz. 106ddr2_f2_freq_mhz: ddr2 frequency number 2, unit:MHz. 107ddr2_f3_freq_mhz: ddr2 frequency number 3, unit:MHz. 108ddr2_f4_freq_mhz: ddr2 frequency number 4, unit:MHz. 109ddr2_f5_freq_mhz: ddr2 frequency number 5, unit:MHz. 110... 111 112ddr*_f*_freq_mhz/lp*_f*_freq_mhz: Only RV1126/RV1109, RK3566/RK3568 used.The program will initialize dram by following order. 113for example: ddr4_f1_freq_mhz --> ddr4_f2_freq_mhz --> ddr4_f3_freq_mhz --> ddr4_freq. 114And the final frequency is 'ddr4_freq' to boot system. 115So it is better to arrange the frequency values in order as above. That means the max freq is in final freq(lp*/ddr*_freq) and the min freq is in 'ddr*/lp*_f1_freq_mhz'. 116 ddr*/lp*_f1_freq_mhz < ddr*/lp*_f2_freq_mhz < ddr*/lp*_f3_freq_mhz < lp*/ddr*_freq(the final freq) 117For example: 118 ... 119 ddr4_freq=1560 120 ... 121 ddr4_f1_freq_mhz=324 122 ddr4_f2_freq_mhz=528 123 ddr4_f3_freq_mhz=780 124 ... 125 126The ddr frequency table in kernel dts/dtsi file need correspond to these frequencies. 127 128* SR PD idle 129 130sr_idle: auto self-refresh mode delay time. 131pd_idle: auto power-down mode delay time. 132 133* DDR 2T 134 135ddr_2t: ddr 2T timing mode. 1: enable ddr 2T, 0: disable ddr 2T. 136 137* PLL ssmod 138 139These parameters are about Spread Spectrum Modulator(ssmod) for PLL. 140ssmod_downspread: ssmod work mode. 0: down spread, 1: center spread. 141ssmod_div: Divider required to set the modulation frequency. RK3308 suggests to ssmod_div=2, others platforms suggest to ssmod_div=5. 142ssmod_spread: spread amplitude % = 0.1 * ssmod_spread; 0: disable ssmod, others will enable ssmod, max to 0x1f. 143 144* driver strength 145 146phy_ddr*_dq_drv_when_odten_ohm: The PHY DQ/DQS driver strength(write direction) when DRAM odt on. unit: ohm. 147phy_ddr*_ca_drv_when_odten_ohm: The PHY CMD/ADDR driver strength when DRAM odt on. unit: ohm. 148phy_ddr*_clk_drv_when_odten_ohm: The PHY clock driver strength when DRAM odt on. unit: ohm. 149ddr*_dq_drv_when_odten_ohm: The DRAM DQ/DQS driver strength(read direction) when PHY odt on. unit: ohm. 150phy_ddr*_dq_drv_when_odtoff_ohm: The PHY DQ/DQS driver strength(write direction) when DRAM odt off. unit: ohm. 151phy_ddr*_ca_drv_when_odtoff_ohm: The PHY CMD/ADDR driver strength when DRAM odt off. unit: ohm. 152phy_ddr*_clk_drv_when_odtoff_ohm: The PHY clock driver strength when DRAM odt off. unit: ohm. 153ddr*_dq_drv_when_odtoff_ohm: The DRAM DQ/DQS driver strength(read direction) when PHY odt off. unit: ohm. 154 155The phy side driver strength support value as follows: 156+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+ 157| platform | DDR3 | DDR4 | LP3 | LP4 | LP4X pull up | LP4X pull down | 158+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+ 159| | 455,230,153,115, | 482,244,162,122, | | 501,253,168,126,| | | 160| | 91,76,65,57,51,46,| 97,81,69,61,54,48,| | 101,84,72,63,56,| | | 161| RV1126/RV1109 | 41,38,35,32,30,28,| 44,40,37,34,32,30,| follow DDR4 | 50,46,42,38,36, | follow LP4 | follow LP4 | 162| | 27,25,24,23,22,21,| 28,27,25,24,23,22,| | 33,31,29,28,26, | | | 163| | 20 | 21 | | 25,24,23,22 | | | 164+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+ 165| | 500,250,167,125, | 556,279,185,139, | | 576,289,192,144,| 646,323,215, | 513,259,172, | 166| | 100,83,71,63,56, | 111,93,79,69,62, | | 115,96,82,72,64,| 162,129,108,92,| 130,104,86,74, | 167| RK3566/RK3568 | 50,45,41,38,36,33,| 55,50,46,42,39,37,| follow DDR4 | 57,52,48,44,41, | 81,72,65,59,54,| 65,58,52,47,43,| 168| | 31,29,28,26,25,24,| 34,32,31,29,27,26,| | 38,36,34,32,30, | 50,46,43,40,38,| 40,37,35,32,30,| 169| | 23,22 | 25,24 | | 28,27,26,25 | 36,34,32,31,29,| 29,27,26,25,24,| 170| | | | | | 28 | 23 | 171+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+ 172 173The DRAM side driver strength support value as follows: 174+---------------+-------------------+-------------------+----------------+----------------------+----------------+ 175| platform | DDR3 | DDR4 | LP3 | LP4 | LP4X | 176+---------------+-------------------+-------------------+----------------+----------------------+----------------+ 177| all | 40,34 | 34,48 | 34,40,48,60,80 | 40,48,60,80,120,240 | follow LP4 | 178+---------------+-------------------+-------------------+----------------+----------------------+----------------+ 179 180* ODT 181phy_ddr*_odt_ohm: The PHY ODT strength(read direction). unit: ohm. 182ddr*_odt_ohm: The DRAM ODT strength(write direction). unit: ohm. 183phy_ddr*_odt_pull_up_en: 1: enable PHY pull up odt. 0: disable 184phy_ddr*_odt_pull_dn_en: 1: enable PHY pull down odt. 0: disable 185phy_ddr*_odten_freq_mhz: The PHY odt enable when larger than this frequency. unit: MHz. 186ddr*_odten_freq_mhz: The DRAM odt(DQ/DQS) enable when larger than this frequency. unit: MHz. 187 188The phy side ODT support value as follows: 189The ODT "0" means disabled ODT. 190+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+ 191| platform | DDR3 | DDR4 | LP3 | LP4 | LP4X pull up | LP4X pull down | 192+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+ 193| | 0,561,282,188,141,| 0,586,294,196,148, | | 0,604,303,202,152,| | | 194| | 113,94,81,72,64, | 118,99,58,76,67,60,| | 122,101,87,78,69, | | | 195| RV1126/RV1109 | 58,52,48,44,41, | 55,50,46,43,40,38, | follow DDR4 | 62,56,52,48,44,41,| follow LP4 | follow LP4 | 196| | 38,37,34,32,31,29,| 36,34,32,31,29,28, | | 39,37,35,33,32,30,| | | 197| | 28,27,25 | 27 | | 29,27 | | | 198+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+ 199| | 0,500,250,167,125,| 0,556,279,185,139, | | 0,576,289,192,144,| 0,646,323,215, | 0,513,259,172, | 200| | 100,83,71,63,56, | 111,93,79,69,62, | | 115,96,82,72,64, | 162,129,108,92,| 130,104,86,74, | 201| RK3566/RK3568 | 50,45,41,38,36,33,| 55,50,46,42,39,37, | follow DDR4 | 57,52,48,44,41, | 81,72,65,59,54,| 65,58,52,47,43,| 202| | 31,29,28,26,25,24,| 34,32,31,29,27,26, | | 38,36,34,32,30, | 50,46,43,40,38,| 40,37,35,32,30,| 203| | 23,22 | 25,24 | | 28,27,26,25 | 36,34,32,31,29,| 29,27,26,25,24,| 204| | | | | | 28 | 23 | 205+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+ 206 207The DRAM side ODT support value as follows: 208+---------------+-------------------+-------------------+--------------+-----------------------+----------------+ 209| platform | DDR3 | DDR4 | LP3 | LP4(include DQ and CA)| LP4X | 210+---------------+-------------------+-------------------+--------------+-----------------------+----------------+ 211| all | 0,40,60,120 | 0,34,40,48,60,120 | 0,60,120,240 | 0,40,48,60,80,120,240 | follow LP4 | 212+---------------+-------------------+-------------------+--------------+-----------------------+----------------+ 213 214* slew rate 215 216phy_ddr*_dq_sr_when_odten: The PHY DQ/DQS slew rate when odt on. 217phy_ddr*_ca_sr_when_odten: The PHY CMD/ADDR slew rate when odt on. 218phy_ddr*_clk_sr_when_odten: The PHY clock slew rate when odt on. 219phy_ddr*_dq_sr_when_odtoff: The PHY DQ/DQS slew rate when odt off. 220phy_ddr*_ca_sr_when_odtoff: The PHY CMD/ADDR slew rate when odt off. 221phy_ddr*_clk_sr_when_odtoff: The PHY clock slew rate when odt off. 222 223* byte map 224 225ddr*_bytes_map: Reserve function. 226 227* dq remap 228 229lp*_dq*_*_map: Reserve function. 230ddr*_cs*_dq*_dq*_map: Reserve function. 231 232* lp4/lp4x more information 233 234lp4*_ca_odten_freq_mhz: The DRAM CMD/ADDR odt enable when larger than this frequency. unit: MHz. 235phy_lp4*_dq_vref_when_odten: The PHY VrefDQ when PHY odt on. uint: parts per thousand. 236lp4*_dq_vref_when_odten: The DRAM VrefDQ when DRAM DQ/DQS odt on. uint: parts per thousand. 237lp4*_ca_vref_when_odten: The DRAM VrefCA when DRAM CA odt on. uint: parts per thousand. 238phy_lp4_dq_vref_when_odtoff: The PHY VrefDQ when PHY odt off. uint: parts per thousand. 239lp4_dq_vref_when_odtoff: The DRAM VrefDQ when DRAM DQ/DQS odt off. uint: parts per thousand. 240lp4_ca_vref_when_odtoff: The DRAM VrefCA when DRAM CA odt off. uint: parts per thousand. 241