1 /* 2 * linux/include/linux/mtd/nand.h 3 * 4 * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com> 5 * Steven J. Hill <sjhill@cotw.com> 6 * Thomas Gleixner <gleixner@autronix.de> 7 * 8 * $Id: nand.h,v 1.7 2003/07/24 23:30:46 a0384864 Exp $ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 * Info: 15 * Contains standard defines and IDs for NAND flash devices 16 * 17 * Changelog: 18 * 01-31-2000 DMW Created 19 * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers 20 * so it can be used by other NAND flash device 21 * drivers. I also changed the copyright since none 22 * of the original contents of this file are specific 23 * to DoC devices. David can whack me with a baseball 24 * bat later if I did something naughty. 25 * 10-11-2000 SJH Added private NAND flash structure for driver 26 * 10-24-2000 SJH Added prototype for 'nand_scan' function 27 * 10-29-2001 TG changed nand_chip structure to support 28 * hardwarespecific function for accessing control lines 29 * 02-21-2002 TG added support for different read/write adress and 30 * ready/busy line access function 31 * 02-26-2002 TG added chip_delay to nand_chip structure to optimize 32 * command delay times for different chips 33 * 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate 34 * defines in jffs2/wbuf.c 35 */ 36 #ifndef __LINUX_MTD_NAND_H 37 #define __LINUX_MTD_NAND_H 38 39 #ifdef CONFIG_NEW_NAND_CODE 40 #include "nand_new.h" 41 #else 42 /* 43 * Standard NAND flash commands 44 */ 45 #define NAND_CMD_READ0 0 46 #define NAND_CMD_READ1 1 47 #define NAND_CMD_PAGEPROG 0x10 48 #define NAND_CMD_READOOB 0x50 49 #define NAND_CMD_ERASE1 0x60 50 #define NAND_CMD_STATUS 0x70 51 #define NAND_CMD_SEQIN 0x80 52 #define NAND_CMD_READID 0x90 53 #define NAND_CMD_ERASE2 0xd0 54 #define NAND_CMD_RESET 0xff 55 56 /* 57 * Enumeration for NAND flash chip state 58 */ 59 typedef enum { 60 FL_READY, 61 FL_READING, 62 FL_WRITING, 63 FL_ERASING, 64 FL_SYNCING 65 } nand_state_t; 66 67 68 /* 69 * NAND Private Flash Chip Data 70 * 71 * Structure overview: 72 * 73 * IO_ADDR - address to access the 8 I/O lines of the flash device 74 * 75 * hwcontrol - hardwarespecific function for accesing control-lines 76 * 77 * dev_ready - hardwarespecific function for accesing device ready/busy line 78 * 79 * chip_lock - spinlock used to protect access to this structure 80 * 81 * wq - wait queue to sleep on if a NAND operation is in progress 82 * 83 * state - give the current state of the NAND device 84 * 85 * page_shift - number of address bits in a page (column address bits) 86 * 87 * data_buf - data buffer passed to/from MTD user modules 88 * 89 * data_cache - data cache for redundant page access and shadow for 90 * ECC failure 91 * 92 * ecc_code_buf - used only for holding calculated or read ECCs for 93 * a page read or written when ECC is in use 94 * 95 * reserved - padding to make structure fall on word boundary if 96 * when ECC is in use 97 */ 98 struct Nand { 99 char floor, chip; 100 unsigned long curadr; 101 unsigned char curmode; 102 /* Also some erase/write/pipeline info when we get that far */ 103 }; 104 105 struct nand_chip { 106 int page_shift; 107 u_char *data_buf; 108 u_char *data_cache; 109 int cache_page; 110 u_char ecc_code_buf[6]; 111 u_char reserved[2]; 112 char ChipID; /* Type of DiskOnChip */ 113 struct Nand *chips; 114 int chipshift; 115 char* chips_name; 116 unsigned long erasesize; 117 unsigned long mfr; /* Flash IDs - only one type of flash per device */ 118 unsigned long id; 119 char* name; 120 int numchips; 121 char page256; 122 char pageadrlen; 123 unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */ 124 unsigned long totlen; 125 uint oobblock; /* Size of OOB blocks (e.g. 512) */ 126 uint oobsize; /* Amount of OOB data per block (e.g. 16) */ 127 uint eccsize; 128 int bus16; 129 }; 130 131 /* 132 * NAND Flash Manufacturer ID Codes 133 */ 134 #define NAND_MFR_TOSHIBA 0x98 135 #define NAND_MFR_SAMSUNG 0xec 136 137 /* 138 * NAND Flash Device ID Structure 139 * 140 * Structure overview: 141 * 142 * name - Complete name of device 143 * 144 * manufacture_id - manufacturer ID code of device. 145 * 146 * model_id - model ID code of device. 147 * 148 * chipshift - total number of address bits for the device which 149 * is used to calculate address offsets and the total 150 * number of bytes the device is capable of. 151 * 152 * page256 - denotes if flash device has 256 byte pages or not. 153 * 154 * pageadrlen - number of bytes minus one needed to hold the 155 * complete address into the flash array. Keep in 156 * mind that when a read or write is done to a 157 * specific address, the address is input serially 158 * 8 bits at a time. This structure member is used 159 * by the read/write routines as a loop index for 160 * shifting the address out 8 bits at a time. 161 * 162 * erasesize - size of an erase block in the flash device. 163 */ 164 struct nand_flash_dev { 165 char * name; 166 int manufacture_id; 167 int model_id; 168 int chipshift; 169 char page256; 170 char pageadrlen; 171 unsigned long erasesize; 172 int bus16; 173 }; 174 175 /* 176 * Constants for oob configuration 177 */ 178 #define NAND_NOOB_ECCPOS0 0 179 #define NAND_NOOB_ECCPOS1 1 180 #define NAND_NOOB_ECCPOS2 2 181 #define NAND_NOOB_ECCPOS3 3 182 #define NAND_NOOB_ECCPOS4 6 183 #define NAND_NOOB_ECCPOS5 7 184 #define NAND_NOOB_BADBPOS -1 185 #define NAND_NOOB_ECCVPOS -1 186 187 #define NAND_JFFS2_OOB_ECCPOS0 0 188 #define NAND_JFFS2_OOB_ECCPOS1 1 189 #define NAND_JFFS2_OOB_ECCPOS2 2 190 #define NAND_JFFS2_OOB_ECCPOS3 3 191 #define NAND_JFFS2_OOB_ECCPOS4 6 192 #define NAND_JFFS2_OOB_ECCPOS5 7 193 #define NAND_JFFS2_OOB_BADBPOS 5 194 #define NAND_JFFS2_OOB_ECCVPOS 4 195 196 #define NAND_JFFS2_OOB8_FSDAPOS 6 197 #define NAND_JFFS2_OOB16_FSDAPOS 8 198 #define NAND_JFFS2_OOB8_FSDALEN 2 199 #define NAND_JFFS2_OOB16_FSDALEN 8 200 201 unsigned long nand_probe(unsigned long physadr); 202 #endif /* !CONFIG_NEW_NAND_CODE */ 203 #endif /* __LINUX_MTD_NAND_H */ 204