xref: /rk3399_rockchip-uboot/include/irq-generic.h (revision ed837edf989da43204ef4e9b5d8d34b82d38dd8c)
14e6670feSJoseph Chen /*
24e6670feSJoseph Chen  * (C) Copyright 2017 Rockchip Electronics Co., Ltd
34e6670feSJoseph Chen  *
44e6670feSJoseph Chen  * SPDX-License-Identifier:     GPL-2.0+
54e6670feSJoseph Chen  */
64e6670feSJoseph Chen 
74e6670feSJoseph Chen #ifndef _IRQ_GENERIC_H
84e6670feSJoseph Chen #define _IRQ_GENERIC_H
94e6670feSJoseph Chen 
104e6670feSJoseph Chen #include <asm-generic/gpio.h>
114e6670feSJoseph Chen #include <common.h>
124e6670feSJoseph Chen #include <dt-bindings/pinctrl/rockchip.h>
134e6670feSJoseph Chen 
144e6670feSJoseph Chen /*
154e6670feSJoseph Chen  * IRQ line status.
164e6670feSJoseph Chen  *
174e6670feSJoseph Chen  * IRQ_TYPE_NONE		- default, unspecified type
184e6670feSJoseph Chen  * IRQ_TYPE_EDGE_RISING		- rising edge triggered
194e6670feSJoseph Chen  * IRQ_TYPE_EDGE_FALLING	- falling edge triggered
204e6670feSJoseph Chen  * IRQ_TYPE_EDGE_BOTH		- rising and falling edge triggered
214e6670feSJoseph Chen  * IRQ_TYPE_LEVEL_HIGH		- high level triggered
224e6670feSJoseph Chen  * IRQ_TYPE_LEVEL_LOW		- low level triggered
234e6670feSJoseph Chen  * IRQ_TYPE_LEVEL_MASK		- mask to filter out the level bits
244e6670feSJoseph Chen  * IRQ_TYPE_SENSE_MASK		- mask for all the above bits
254e6670feSJoseph Chen  */
264e6670feSJoseph Chen enum {
274e6670feSJoseph Chen 	IRQ_TYPE_NONE		= 0x00000000,
284e6670feSJoseph Chen 	IRQ_TYPE_EDGE_RISING	= 0x00000001,
294e6670feSJoseph Chen 	IRQ_TYPE_EDGE_FALLING	= 0x00000002,
304e6670feSJoseph Chen 	IRQ_TYPE_EDGE_BOTH	= (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING),
314e6670feSJoseph Chen 	IRQ_TYPE_LEVEL_HIGH	= 0x00000004,
324e6670feSJoseph Chen 	IRQ_TYPE_LEVEL_LOW	= 0x00000008,
334e6670feSJoseph Chen 	IRQ_TYPE_LEVEL_MASK	= (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH),
344e6670feSJoseph Chen 	IRQ_TYPE_SENSE_MASK	= 0x0000000f,
354e6670feSJoseph Chen };
364e6670feSJoseph Chen 
374e6670feSJoseph Chen /*
384e6670feSJoseph Chen  * struct irq_chip - hardware interrupt chip descriptor
394e6670feSJoseph Chen  *
404e6670feSJoseph Chen  * @name:		name for irq chip
414e6670feSJoseph Chen  * @irq_enable:		enable the interrupt (defaults to chip->unmask if NULL)
424e6670feSJoseph Chen  * @irq_disable:	disable the interrupt
434e6670feSJoseph Chen  * @irq_ack:		start of a new interrupt
444e6670feSJoseph Chen  * @irq_eoi:		end of interrupt
454e6670feSJoseph Chen  * @irq_set_type:	set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
464e6670feSJoseph Chen  */
474e6670feSJoseph Chen struct irq_chip {
484e6670feSJoseph Chen 	const char	*name;
494e6670feSJoseph Chen 	int		(*irq_init)(void);
50*ed837edfSJoseph Chen 	int		(*irq_suspend)(void);
51*ed837edfSJoseph Chen 	int		(*irq_resume)(void);
524e6670feSJoseph Chen 	int		(*irq_get)(void);
534e6670feSJoseph Chen 	int		(*irq_enable)(int irq);
544e6670feSJoseph Chen 	int		(*irq_disable)(int irq);
554e6670feSJoseph Chen 	void		(*irq_ack)(int irq);
564e6670feSJoseph Chen 	void		(*irq_eoi)(int irq);
574e6670feSJoseph Chen 	int		(*irq_set_type)(int irq, unsigned int flow_type);
584e6670feSJoseph Chen };
594e6670feSJoseph Chen 
604e6670feSJoseph Chen /* APIs for irqs */
614e6670feSJoseph Chen void irq_install_handler(int irq, interrupt_handler_t *handler, void *data);
624e6670feSJoseph Chen void irq_free_handler(int irq);
634e6670feSJoseph Chen int irq_set_irq_type(int irq, unsigned int type);
644e6670feSJoseph Chen int irq_handler_enable(int irq);
654e6670feSJoseph Chen int irq_handler_disable(int irq);
66*ed837edfSJoseph Chen int irqs_suspend(void);
67*ed837edfSJoseph Chen int irqs_resume(void);
684e6670feSJoseph Chen int gpio_to_irq(struct gpio_desc *gpio);
694e6670feSJoseph Chen 
704e6670feSJoseph Chen /*
714e6670feSJoseph Chen  * Assign gpio to irq directly. Don't use it without special reasons.
724e6670feSJoseph Chen  *
734e6670feSJoseph Chen  * Usage example:
744e6670feSJoseph Chen  *	int gpio0_a0, irq;
754e6670feSJoseph Chen  *
764e6670feSJoseph Chen  *	gpio = RK_IRQ_GPIO(RK_GPIO0, RK_PA0);
774e6670feSJoseph Chen  *	irq = hard_gpio_to_irq(gpio0_a0);
784e6670feSJoseph Chen  *	irq_install_handler(irq, ...);
794e6670feSJoseph Chen  */
804e6670feSJoseph Chen #define GPIO_BANK_SHIFT			8
814e6670feSJoseph Chen #define RK_IRQ_GPIO(bank, pin) 		(((bank) << GPIO_BANK_SHIFT) | (pin))
824e6670feSJoseph Chen int hard_gpio_to_irq(unsigned gpio);
835db1153eSJoseph Chen int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin);
844e6670feSJoseph Chen 
854e6670feSJoseph Chen /* only irq-gpio.c can use it */
8642865eb5SJoseph Chen void _generic_gpio_handle_irq(int irq);
874e6670feSJoseph Chen 
884e6670feSJoseph Chen #endif /* _IRQ_GENERIC_H */
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