xref: /rk3399_rockchip-uboot/include/dwc3-uboot.h (revision 73ec4e0398125f41aa20c70f6316416e96a4e8d2)
1 /* include/dwc3-uboot.h
2  *
3  * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
4  *
5  * Designware SuperSpeed USB uboot init
6  *
7  * SPDX-License-Identifier:     GPL-2.0
8  */
9 
10 #ifndef __DWC3_UBOOT_H_
11 #define __DWC3_UBOOT_H_
12 
13 #include <linux/usb/otg.h>
14 #include <linux/usb/phy.h>
15 
16 struct dwc3_device {
17 	unsigned long base;
18 	enum usb_dr_mode dr_mode;
19 	enum usb_phy_interface hsphy_mode;
20 	u32 maximum_speed;
21 	unsigned tx_fifo_resize:1;
22 	unsigned has_lpm_erratum;
23 	u8 lpm_nyet_threshold;
24 	unsigned is_utmi_l1_suspend;
25 	u8 hird_threshold;
26 	unsigned disable_scramble_quirk;
27 	unsigned u2exit_lfps_quirk;
28 	unsigned u2ss_inp3_quirk;
29 	unsigned req_p1p2p3_quirk;
30 	unsigned del_p1p2p3_quirk;
31 	unsigned del_phy_power_chg_quirk;
32 	unsigned lfps_filter_quirk;
33 	unsigned rx_detect_poll_quirk;
34 	unsigned dis_u3_susphy_quirk;
35 	unsigned dis_u2_susphy_quirk;
36 	unsigned tx_de_emphasis_quirk;
37 	unsigned tx_de_emphasis;
38 	unsigned usb2_phyif_utmi_width;
39 	int index;
40 };
41 
42 int dwc3_uboot_init(struct dwc3_device *dev);
43 void dwc3_uboot_exit(int index);
44 void dwc3_uboot_handle_interrupt(int index);
45 
46 struct phy;
47 #if CONFIG_IS_ENABLED(PHY) && CONFIG_IS_ENABLED(DM_USB)
48 int dwc3_setup_phy(struct udevice *dev, struct phy **array, int *num_phys);
49 int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, int num_phys);
50 #else
51 static inline int dwc3_setup_phy(struct udevice *dev, struct phy **array,
52 				 int *num_phys)
53 {
54 	return -ENOTSUPP;
55 }
56 
57 static inline int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys,
58 				    int num_phys)
59 {
60 	return -ENOTSUPP;
61 }
62 #endif
63 
64 #endif /* __DWC3_UBOOT_H_ */
65