1d977d6f7STinghui Wang /* 2d977d6f7STinghui Wang * (C) Copyright 2012 Xilinx 3d977d6f7STinghui Wang * (C) Copyright 2014 Digilent Inc. 4d977d6f7STinghui Wang * 5d977d6f7STinghui Wang * Configuration for Zynq Development Board - ZYBO 6d977d6f7STinghui Wang * See zynq-common.h for Zynq common configs 7d977d6f7STinghui Wang * 8d977d6f7STinghui Wang * SPDX-License-Identifier: GPL-2.0+ 9d977d6f7STinghui Wang */ 10d977d6f7STinghui Wang 11d977d6f7STinghui Wang #ifndef __CONFIG_ZYNQ_ZYBO_H 12d977d6f7STinghui Wang #define __CONFIG_ZYNQ_ZYBO_H 13d977d6f7STinghui Wang 14d977d6f7STinghui Wang #define CONFIG_SYS_NO_FLASH 15d977d6f7STinghui Wang 167bbf8254SNathan Rossi #define CONFIG_ZYNQ_USB 17*fdcdde56SMichal Simek #define CONFIG_ZYNQ_I2C0 18*fdcdde56SMichal Simek #define CONFIG_ZYNQ_I2C1 19*fdcdde56SMichal Simek #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 20*fdcdde56SMichal Simek #define CONFIG_DISPLAY 21*fdcdde56SMichal Simek #define CONFIG_I2C_EDID 22d977d6f7STinghui Wang 23d977d6f7STinghui Wang /* Define ZYBO PS Clock Frequency to 50MHz */ 24d977d6f7STinghui Wang #define CONFIG_ZYNQ_PS_CLK_FREQ 50000000UL 25d977d6f7STinghui Wang 26d977d6f7STinghui Wang #include <configs/zynq-common.h> 27d977d6f7STinghui Wang 28d977d6f7STinghui Wang #endif /* __CONFIG_ZYNQ_ZYBO_H */ 29