xref: /rk3399_rockchip-uboot/include/configs/rv1106_common.h (revision fc82950350d93323a662ea75c421c754d9138436)
1 /*
2  * (C) Copyright 2022 Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #ifndef __CONFIG_RV1106_COMMON_H
8 #define __CONFIG_RV1106_COMMON_H
9 
10 #include "rockchip-common.h"
11 
12 #define COUNTER_FREQUENCY		24000000
13 #define CONFIG_SYS_MALLOC_LEN		(16 << 20)
14 #define CONFIG_SYS_CBSIZE		1024
15 #define CONFIG_SKIP_LOWLEVEL_INIT
16 #define CONFIG_SYS_NS16550_MEM32
17 
18 #define CONFIG_SYS_TEXT_BASE		0x00200000
19 #define CONFIG_SYS_INIT_SP_ADDR		0x00400000
20 #define CONFIG_SYS_LOAD_ADDR		0x00e00800
21 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)
22 #define GICD_BASE			0xff1f1000
23 #define GICC_BASE			0xff1f2000
24 #define CONFIG_SYS_SDRAM_BASE		0
25 #define SDRAM_MAX_SIZE			0xff000000
26 #define CONFIG_SYS_NONCACHED_MEMORY    (1 << 20)       /* 1 MiB */
27 #define CONFIG_PERIPH_DEVICE_START_ADDR	(CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE)
28 #define CONFIG_PERIPH_DEVICE_END_ADDR	SZ_4G
29 
30 /* SPL */
31 #define CONFIG_SPL_FRAMEWORK
32 #define CONFIG_SPL_TEXT_BASE		0x00000000
33 #define CONFIG_SPL_MAX_SIZE		0x30000
34 #define CONFIG_SPL_BSS_START_ADDR	0x001fe000
35 #define CONFIG_SPL_BSS_MAX_SIZE		0x20000
36 #define CONFIG_SPL_STACK		0x001fe000
37 
38 /* secure otp */
39 #define OTP_UBOOT_ROLLBACK_OFFSET	0xe0
40 #define OTP_UBOOT_ROLLBACK_WORDS	2	/* 64 bits, 2 words */
41 #define OTP_ALL_ONES_NUM_BITS		32
42 #define OTP_SECURE_BOOT_ENABLE_ADDR	0x80
43 #define OTP_SECURE_BOOT_ENABLE_SIZE	2
44 #define OTP_RSA_HASH_ADDR		0x90
45 #define OTP_RSA_HASH_SIZE		32
46 
47 /* MMC/SD IP block */
48 #define CONFIG_BOUNCE_BUFFER
49 
50 #ifndef CONFIG_SPL_BUILD
51 /* usb mass storage */
52 #define CONFIG_USB_FUNCTION_MASS_STORAGE
53 #define CONFIG_ROCKUSB_G_DNL_PID	0x110c
54 
55 #define CONFIG_LIB_HW_RAND
56 #define CONFIG_PREBOOT
57 
58 #if CONFIG_USB_FUNCTION_DFU
59 #define CONFIG_SET_DFU_ALT_INFO
60 #endif
61 
62 /*
63  *   Image:  0 - 8M
64  *  zImage:  8 - 12M
65  *     fdt: 12 - 13M
66  * ramdisk: 14 ...
67  */
68 #define ENV_MEM_LAYOUT_SETTINGS		\
69 	"scriptaddr=0x00b00000\0"	\
70 	"pxefile_addr_r=0x00c00000\0"	\
71 	"fdt_addr_r=0x00c00000\0"	\
72 	"kernel_addr_c=0x00808000\0"	\
73 	"kernel_addr_r=0x00008000\0"	\
74 	"ramdisk_addr_r=0x000e00000\0"
75 
76 #define CONFIG_EXTRA_ENV_SETTINGS	\
77 	ENV_MEM_LAYOUT_SETTINGS		\
78 	ROCKCHIP_DEVICE_SETTINGS	\
79 	RKIMG_DET_BOOTDEV
80 
81 #undef RKIMG_BOOTCOMMAND
82 #ifdef CONFIG_FIT_SIGNATURE
83 #define RKIMG_BOOTCOMMAND		\
84 	"boot_fit;"
85 #else
86 #define RKIMG_BOOTCOMMAND		\
87 	"boot_fit;"			\
88 	"boot_android ${devtype} ${devnum};"
89 #endif
90 
91 /* Update define for tiny image */
92 #ifdef CONFIG_ROCKCHIP_IMAGE_TINY
93 #undef RKIMG_BOOTCOMMAND
94 #undef RKIMG_DET_BOOTDEV
95 #undef CONFIG_EXTRA_ENV_SETTINGS
96 #undef CONFIG_AUTO_COMPLETE
97 #undef CONFIG_SYS_LONGHELP
98 #undef CONFIG_ZLIB
99 #undef CONFIG_GZIP
100 /* TODO: #define CONFIG_LIB_HW_RAND */
101 
102 #define RKIMG_BOOTCOMMAND		"boot_fit;"
103 #define CONFIG_EXTRA_ENV_SETTINGS	ENV_MEM_LAYOUT_SETTINGS
104 #endif
105 #endif	/* !CONFIG_SPL_BUILD */
106 
107 #endif
108