| #
feb2c9de |
| 16-Jun-2025 |
Xuhui Lin <xuhui.lin@rock-chips.com> |
rockchip: rv1106: Add CONFIG_SPL_CHECK_SIZE
Enable spl size check.
Change-Id: I8c572a78a2250f6c278ab696ed58906d83d3ed96
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
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| #
4a715642 |
| 14-Oct-2024 |
Xuhui Lin <xuhui.lin@rock-chips.com> |
include: configs: rv1106: Reserve last 3M space to avoid conflict with OPTEE
When DRAM size is 128M or larger, it will still waste 3M space in U-Boot
stage. Because U-Boot doesn't have enough flexib
include: configs: rv1106: Reserve last 3M space to avoid conflict with OPTEE
When DRAM size is 128M or larger, it will still waste 3M space in U-Boot
stage. Because U-Boot doesn't have enough flexible memory management.
Change-Id: Idd5ea2fcdf78ca3996b43d51d9fdcfb1aa656376
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
show more ...
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| #
6c92d3a9 |
| 08-Dec-2023 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
usbplug: add support for rv1106
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Change-Id: I5c18463c1145a135138da9177dfc81bac4caa845
|
| #
423b089a |
| 29-Nov-2023 |
Xuhui Lin <xuhui.lin@rock-chips.com> |
rockchip: rv1106: Fix spl-nodtb bin size limit to 160K
Bootrom can't load more than 168K spl-dtb bin. (Reserve 8K for spl dtb)
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
Change-Id: Ibbd661
rockchip: rv1106: Fix spl-nodtb bin size limit to 160K
Bootrom can't load more than 168K spl-dtb bin. (Reserve 8K for spl dtb)
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
Change-Id: Ibbd661bee5cd96f27d0b5cf937a7af51e1545982
show more ...
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| #
f7cc982c |
| 20-Nov-2023 |
Sugar Zhang <sugar.zhang@rock-chips.com> |
rockchip: rv1106: Fix otp cpuid offset
The cpuid on RV1106 is located at 0xa instead of 0x7.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ice7c5c0da87c5bd35429f918632b4d6edd4e
rockchip: rv1106: Fix otp cpuid offset
The cpuid on RV1106 is located at 0xa instead of 0x7.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ice7c5c0da87c5bd35429f918632b4d6edd4ef569
(cherry picked from commit 69e1691f0333196df26713c275b7bfec54e99bcd)
show more ...
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| #
10283f05 |
| 11-Aug-2023 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: rv1106: Add CONFIG_ENV_MEM_LAYOUT_SETTINGS support
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Id6355001274fce37de348ea7186521bfa2b5486f
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| #
dbfa16e5 |
| 23-Mar-2023 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: rv1106: Enable lowlevel init in order to enable Icache
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I5754debdd4384361fdbdb5e8c9a636a46c0841e0
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| #
7a93cfc7 |
| 29-Apr-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: rv1106: Add dfu alt enable control
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: If43d4e8264084db726a1c3bc0a4b0d89521a82be
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| #
731db449 |
| 24-Apr-2022 |
Jason Zhu <jason.zhu@rock-chips.com> |
rockchip: rv1106: add CONFIG_PERIPH_DEVICE START & END ADDRESS
These macros are used in thunderboot to set less mmu map table to
reduce bring-up time.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips
rockchip: rv1106: add CONFIG_PERIPH_DEVICE START & END ADDRESS
These macros are used in thunderboot to set less mmu map table to
reduce bring-up time.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I346179000f001b2a5fd8280cb1e69ef0f29c2ae4
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| #
d8396f6f |
| 08-Apr-2022 |
Jason Zhu <jason.zhu@rock-chips.com> |
rockchip: rv1106: change the uboot and spl execution & sp address
For supporting thunderboot. The RV1106 memory distribution:
SPL: 0 ~ 256KB
RTOS: 256KB ~ 512KB
SPL S & H: 512KB ~ (2MB -
rockchip: rv1106: change the uboot and spl execution & sp address
For supporting thunderboot. The RV1106 memory distribution:
SPL: 0 ~ 256KB
RTOS: 256KB ~ 512KB
SPL S & H: 512KB ~ (2MB - 8KB)
ATAGS: (2MB - 8KB) ~ 2MB
UBOOT: 2MB ~
KERNEL_R: (2MB + 0x8000) ~ (10MB - 128KB)
DTB: (10MB - 128KB) ~ 10MB
RAMDISK_R: 10MB ~ 20MB
KERNEL_C: 20MB ~ 25MB
RAMDISK_C: 25MB ~ 30MB
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Ied6440da650ad663cca55e7febe0b71169d153ad
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| #
395f02ef |
| 02-Apr-2022 |
Jason Zhu <jason.zhu@rock-chips.com> |
rockchip: rv1106: change the uboot execution & sp address
Same as rv1126.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I99c6f96aee02a3118216002edf46a205aa079da2
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| #
19b0168a |
| 28-Mar-2022 |
Jason Zhu <jason.zhu@rock-chips.com> |
rockchip: rv1106: add some defination of secure otp
Include secure boot enable add rsa hash.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I42fdfac796cc3d3b3256521dfdc81bca47cab27c
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| #
392b70de |
| 25-Mar-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: rv1106: Enable CONFIG_LIB_HW_RAND
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I06f71320566f0fa8a28fd20768d4ce25c65047e2
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| #
05a547d2 |
| 23-Mar-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: rv1106: Add tiny image config
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ia3e1011d3786477ab67e127aee8e00ee22b2e4b2
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| #
197c3ff1 |
| 21-Mar-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: rv1106: update image load address
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I26792443426c1940af9cc44e8f47f73ff9c4a052
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| #
04e2aa7f |
| 11-Jan-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: Add rv1106 support
Sync dts from develop-5.10:
(465c41218f8e pinctrl: rockchip: build depends on CPU config).
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Jason Zhu <
rockchip: Add rv1106 support
Sync dts from develop-5.10:
(465c41218f8e pinctrl: rockchip: build depends on CPU config).
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I72e5b5172bfdc1686403a606e0f3559f71467ecf
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|