1 /* 2 * (C) Copyright 2022 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RV1106_COMMON_H 8 #define __CONFIG_RV1106_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define COUNTER_FREQUENCY 24000000 13 #define CONFIG_SYS_MALLOC_LEN (16 << 20) 14 #define CONFIG_SYS_CBSIZE 1024 15 #define CONFIG_SYS_NS16550_MEM32 16 17 #define CONFIG_SYS_TEXT_BASE 0x00200000 18 #define CONFIG_SYS_INIT_SP_ADDR 0x00400000 19 #define CONFIG_SYS_LOAD_ADDR 0x00e00800 20 #define CONFIG_SYS_BOOTM_LEN (64 << 20) 21 #define GICD_BASE 0xff1f1000 22 #define GICC_BASE 0xff1f2000 23 #define CONFIG_SYS_SDRAM_BASE 0 24 #define SDRAM_MAX_SIZE 0xff000000 25 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 26 #define CONFIG_PERIPH_DEVICE_START_ADDR (CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE) 27 #define CONFIG_PERIPH_DEVICE_END_ADDR SZ_4G 28 29 /* SPL */ 30 #define CONFIG_SPL_FRAMEWORK 31 #define CONFIG_SPL_TEXT_BASE 0x00000000 32 #define CONFIG_SPL_MAX_SIZE 0x30000 33 #define CONFIG_SPL_BSS_START_ADDR 0x001fe000 34 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 35 #define CONFIG_SPL_STACK 0x001fe000 36 37 /* secure otp */ 38 #define OTP_UBOOT_ROLLBACK_OFFSET 0xe0 39 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 40 #define OTP_ALL_ONES_NUM_BITS 32 41 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x80 42 #define OTP_SECURE_BOOT_ENABLE_SIZE 2 43 #define OTP_RSA_HASH_ADDR 0x90 44 #define OTP_RSA_HASH_SIZE 32 45 46 /* MMC/SD IP block */ 47 #define CONFIG_BOUNCE_BUFFER 48 49 #ifndef CONFIG_SPL_BUILD 50 /* usb mass storage */ 51 #define CONFIG_USB_FUNCTION_MASS_STORAGE 52 #define CONFIG_ROCKUSB_G_DNL_PID 0x110c 53 54 #define CONFIG_LIB_HW_RAND 55 #define CONFIG_PREBOOT 56 57 #if CONFIG_USB_FUNCTION_DFU 58 #define CONFIG_SET_DFU_ALT_INFO 59 #endif 60 61 #ifdef CONFIG_ENV_MEM_LAYOUT 62 #define ENV_MEM_LAYOUT_SETTINGS CONFIG_ENV_MEM_LAYOUT_SETTINGS 63 #else 64 /* 65 * Image: 0 - 8M 66 * zImage: 8 - 12M 67 * fdt: 12 - 13M 68 * ramdisk: 14 ... 69 */ 70 #define ENV_MEM_LAYOUT_SETTINGS \ 71 "scriptaddr=0x00b00000\0" \ 72 "pxefile_addr_r=0x00c00000\0" \ 73 "fdt_addr_r=0x00c00000\0" \ 74 "kernel_addr_c=0x00808000\0" \ 75 "kernel_addr_r=0x00008000\0" \ 76 "ramdisk_addr_r=0x000e00000\0" 77 #endif 78 79 #define CONFIG_EXTRA_ENV_SETTINGS \ 80 ENV_MEM_LAYOUT_SETTINGS \ 81 ROCKCHIP_DEVICE_SETTINGS \ 82 RKIMG_DET_BOOTDEV 83 84 #undef RKIMG_BOOTCOMMAND 85 #ifdef CONFIG_FIT_SIGNATURE 86 #define RKIMG_BOOTCOMMAND \ 87 "boot_fit;" 88 #else 89 #define RKIMG_BOOTCOMMAND \ 90 "boot_fit;" \ 91 "boot_android ${devtype} ${devnum};" 92 #endif 93 94 /* Update define for tiny image */ 95 #ifdef CONFIG_ROCKCHIP_IMAGE_TINY 96 #undef RKIMG_BOOTCOMMAND 97 #undef RKIMG_DET_BOOTDEV 98 #undef CONFIG_EXTRA_ENV_SETTINGS 99 #undef CONFIG_AUTO_COMPLETE 100 #undef CONFIG_SYS_LONGHELP 101 #undef CONFIG_ZLIB 102 #undef CONFIG_GZIP 103 /* TODO: #define CONFIG_LIB_HW_RAND */ 104 105 #define RKIMG_BOOTCOMMAND "boot_fit;" 106 #define CONFIG_EXTRA_ENV_SETTINGS ENV_MEM_LAYOUT_SETTINGS 107 #endif 108 #endif /* !CONFIG_SPL_BUILD */ 109 110 #endif 111