xref: /rk3399_rockchip-uboot/include/configs/rv1106_common.h (revision 4474bc1daa676d583b87fbb3c2ee98b7cea01c93)
1 /*
2  * (C) Copyright 2022 Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #ifndef __CONFIG_RV1106_COMMON_H
8 #define __CONFIG_RV1106_COMMON_H
9 
10 #include "rockchip-common.h"
11 
12 #define COUNTER_FREQUENCY		24000000
13 #define CONFIG_SYS_MALLOC_LEN		(16 << 20)
14 #define CONFIG_SYS_CBSIZE		1024
15 #define CONFIG_SKIP_LOWLEVEL_INIT
16 #define CONFIG_SYS_NS16550_MEM32
17 
18 #define CONFIG_SYS_TEXT_BASE		0x00200000
19 #define CONFIG_SYS_INIT_SP_ADDR		0x00400000
20 #define CONFIG_SYS_LOAD_ADDR		0x00e00800
21 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)
22 #define GICD_BASE			0xff1f1000
23 #define GICC_BASE			0xff1f2000
24 #define CONFIG_SYS_SDRAM_BASE		0
25 #define SDRAM_MAX_SIZE			0xff000000
26 #define CONFIG_SYS_NONCACHED_MEMORY    (1 << 20)       /* 1 MiB */
27 #define CONFIG_PERIPH_DEVICE_START_ADDR	(CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE)
28 #define CONFIG_PERIPH_DEVICE_END_ADDR	SZ_4G
29 
30 /* SPL */
31 #define CONFIG_SPL_FRAMEWORK
32 #define CONFIG_SPL_TEXT_BASE		0x00000000
33 #define CONFIG_SPL_MAX_SIZE		0x30000
34 #define CONFIG_SPL_BSS_START_ADDR	0x001fe000
35 #define CONFIG_SPL_BSS_MAX_SIZE		0x20000
36 #define CONFIG_SPL_STACK		0x001fe000
37 
38 /* secure otp */
39 #define OTP_UBOOT_ROLLBACK_OFFSET	0xe0
40 #define OTP_UBOOT_ROLLBACK_WORDS	2	/* 64 bits, 2 words */
41 #define OTP_ALL_ONES_NUM_BITS		32
42 #define OTP_SECURE_BOOT_ENABLE_ADDR	0x80
43 #define OTP_SECURE_BOOT_ENABLE_SIZE	2
44 #define OTP_RSA_HASH_ADDR		0x90
45 #define OTP_RSA_HASH_SIZE		32
46 
47 /* MMC/SD IP block */
48 #define CONFIG_BOUNCE_BUFFER
49 
50 #ifndef CONFIG_SPL_BUILD
51 /* usb mass storage */
52 #define CONFIG_USB_FUNCTION_MASS_STORAGE
53 #define CONFIG_ROCKUSB_G_DNL_PID	0x110c
54 
55 #define CONFIG_LIB_HW_RAND
56 #define CONFIG_PREBOOT
57 
58 /*
59  *   Image:  0 - 8M
60  *  zImage:  8 - 12M
61  *     fdt: 12 - 13M
62  * ramdisk: 14 ...
63  */
64 #define ENV_MEM_LAYOUT_SETTINGS		\
65 	"scriptaddr=0x00b00000\0"	\
66 	"pxefile_addr_r=0x00c00000\0"	\
67 	"fdt_addr_r=0x00c00000\0"	\
68 	"kernel_addr_c=0x00808000\0"	\
69 	"kernel_addr_r=0x00008000\0"	\
70 	"ramdisk_addr_r=0x000e00000\0"
71 
72 #define CONFIG_EXTRA_ENV_SETTINGS	\
73 	ENV_MEM_LAYOUT_SETTINGS		\
74 	ROCKCHIP_DEVICE_SETTINGS	\
75 	RKIMG_DET_BOOTDEV
76 
77 #undef RKIMG_BOOTCOMMAND
78 #ifdef CONFIG_FIT_SIGNATURE
79 #define RKIMG_BOOTCOMMAND		\
80 	"boot_fit;"
81 #else
82 #define RKIMG_BOOTCOMMAND		\
83 	"boot_fit;"			\
84 	"boot_android ${devtype} ${devnum};"
85 #endif
86 
87 /* Update define for tiny image */
88 #ifdef CONFIG_ROCKCHIP_IMAGE_TINY
89 #undef RKIMG_BOOTCOMMAND
90 #undef RKIMG_DET_BOOTDEV
91 #undef CONFIG_EXTRA_ENV_SETTINGS
92 #undef CONFIG_AUTO_COMPLETE
93 #undef CONFIG_SYS_LONGHELP
94 #undef CONFIG_ZLIB
95 #undef CONFIG_GZIP
96 /* TODO: #define CONFIG_LIB_HW_RAND */
97 
98 #define RKIMG_BOOTCOMMAND		"boot_fit;"
99 #define CONFIG_EXTRA_ENV_SETTINGS	ENV_MEM_LAYOUT_SETTINGS
100 #endif
101 #endif	/* !CONFIG_SPL_BUILD */
102 
103 #endif
104