1 /* 2 * (C) Copyright 2022 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RV1106_COMMON_H 8 #define __CONFIG_RV1106_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define COUNTER_FREQUENCY 24000000 13 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 14 #define CONFIG_SYS_CBSIZE 1024 15 #define CONFIG_SKIP_LOWLEVEL_INIT 16 #define CONFIG_SYS_NS16550_MEM32 17 18 #define CONFIG_SYS_TEXT_BASE 0x00200000 19 #define CONFIG_SYS_INIT_SP_ADDR 0x00400000 20 #define CONFIG_SYS_LOAD_ADDR 0x00e00800 21 #define CONFIG_SYS_BOOTM_LEN (64 << 20) 22 #define GICD_BASE 0xff1f1000 23 #define GICC_BASE 0xff1f2000 24 #define CONFIG_SYS_SDRAM_BASE 0 25 #define SDRAM_MAX_SIZE 0xfd000000 26 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 27 28 /* SPL */ 29 #define CONFIG_SPL_FRAMEWORK 30 #define CONFIG_SPL_TEXT_BASE 0x00000000 31 #define CONFIG_SPL_MAX_SIZE 0x30000 32 #define CONFIG_SPL_BSS_START_ADDR 0x00600000 33 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 34 #define CONFIG_SPL_STACK 0x00600000 35 36 /* MMC/SD IP block */ 37 #define CONFIG_BOUNCE_BUFFER 38 39 #ifndef CONFIG_SPL_BUILD 40 /* usb mass storage */ 41 #define CONFIG_USB_FUNCTION_MASS_STORAGE 42 #define CONFIG_ROCKUSB_G_DNL_PID 0x110c 43 44 #define ENV_MEM_LAYOUT_SETTINGS \ 45 "scriptaddr=0x00b00000\0" \ 46 "pxefile_addr_r=0x00c00000\0" \ 47 "fdt_addr_r=0x00a00000\0" \ 48 "kernel_addr_c=0x00808000\0" \ 49 "kernel_addr_r=0x00008000\0" \ 50 "ramdisk_addr_r=0x00d00000\0" 51 52 #define CONFIG_EXTRA_ENV_SETTINGS \ 53 ENV_MEM_LAYOUT_SETTINGS \ 54 ROCKCHIP_DEVICE_SETTINGS \ 55 RKIMG_DET_BOOTDEV 56 57 #undef RKIMG_BOOTCOMMAND 58 #ifdef CONFIG_FIT_SIGNATURE 59 #define RKIMG_BOOTCOMMAND \ 60 "boot_fit;" 61 #else 62 #define RKIMG_BOOTCOMMAND \ 63 "boot_fit;" \ 64 "boot_android ${devtype} ${devnum};" 65 #endif 66 #endif 67 #define CONFIG_PREBOOT 68 69 #endif 70