1*04e2aa7fSJoseph Chen /* 2*04e2aa7fSJoseph Chen * (C) Copyright 2022 Rockchip Electronics Co., Ltd 3*04e2aa7fSJoseph Chen * 4*04e2aa7fSJoseph Chen * SPDX-License-Identifier: GPL-2.0+ 5*04e2aa7fSJoseph Chen */ 6*04e2aa7fSJoseph Chen 7*04e2aa7fSJoseph Chen #ifndef __CONFIG_RV1106_COMMON_H 8*04e2aa7fSJoseph Chen #define __CONFIG_RV1106_COMMON_H 9*04e2aa7fSJoseph Chen 10*04e2aa7fSJoseph Chen #include "rockchip-common.h" 11*04e2aa7fSJoseph Chen 12*04e2aa7fSJoseph Chen #define COUNTER_FREQUENCY 24000000 13*04e2aa7fSJoseph Chen #define CONFIG_SYS_MALLOC_LEN (32 << 20) 14*04e2aa7fSJoseph Chen #define CONFIG_SYS_CBSIZE 1024 15*04e2aa7fSJoseph Chen #define CONFIG_SKIP_LOWLEVEL_INIT 16*04e2aa7fSJoseph Chen #define CONFIG_SYS_NS16550_MEM32 17*04e2aa7fSJoseph Chen 18*04e2aa7fSJoseph Chen #define CONFIG_SYS_TEXT_BASE 0x00200000 19*04e2aa7fSJoseph Chen #define CONFIG_SYS_INIT_SP_ADDR 0x00400000 20*04e2aa7fSJoseph Chen #define CONFIG_SYS_LOAD_ADDR 0x00e00800 21*04e2aa7fSJoseph Chen #define CONFIG_SYS_BOOTM_LEN (64 << 20) 22*04e2aa7fSJoseph Chen #define GICD_BASE 0xff1f1000 23*04e2aa7fSJoseph Chen #define GICC_BASE 0xff1f2000 24*04e2aa7fSJoseph Chen #define CONFIG_SYS_SDRAM_BASE 0 25*04e2aa7fSJoseph Chen #define SDRAM_MAX_SIZE 0xfd000000 26*04e2aa7fSJoseph Chen #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 27*04e2aa7fSJoseph Chen 28*04e2aa7fSJoseph Chen /* SPL */ 29*04e2aa7fSJoseph Chen #define CONFIG_SPL_FRAMEWORK 30*04e2aa7fSJoseph Chen #define CONFIG_SPL_TEXT_BASE 0x00000000 31*04e2aa7fSJoseph Chen #define CONFIG_SPL_MAX_SIZE 0x30000 32*04e2aa7fSJoseph Chen #define CONFIG_SPL_BSS_START_ADDR 0x00600000 33*04e2aa7fSJoseph Chen #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 34*04e2aa7fSJoseph Chen #define CONFIG_SPL_STACK 0x00600000 35*04e2aa7fSJoseph Chen 36*04e2aa7fSJoseph Chen /* MMC/SD IP block */ 37*04e2aa7fSJoseph Chen #define CONFIG_BOUNCE_BUFFER 38*04e2aa7fSJoseph Chen 39*04e2aa7fSJoseph Chen #ifndef CONFIG_SPL_BUILD 40*04e2aa7fSJoseph Chen /* usb mass storage */ 41*04e2aa7fSJoseph Chen #define CONFIG_USB_FUNCTION_MASS_STORAGE 42*04e2aa7fSJoseph Chen #define CONFIG_ROCKUSB_G_DNL_PID 0x110c 43*04e2aa7fSJoseph Chen 44*04e2aa7fSJoseph Chen #define ENV_MEM_LAYOUT_SETTINGS \ 45*04e2aa7fSJoseph Chen "scriptaddr=0x00b00000\0" \ 46*04e2aa7fSJoseph Chen "pxefile_addr_r=0x00c00000\0" \ 47*04e2aa7fSJoseph Chen "fdt_addr_r=0x00a00000\0" \ 48*04e2aa7fSJoseph Chen "kernel_addr_c=0x00808000\0" \ 49*04e2aa7fSJoseph Chen "kernel_addr_r=0x00008000\0" \ 50*04e2aa7fSJoseph Chen "ramdisk_addr_r=0x00d00000\0" 51*04e2aa7fSJoseph Chen 52*04e2aa7fSJoseph Chen #define CONFIG_EXTRA_ENV_SETTINGS \ 53*04e2aa7fSJoseph Chen ENV_MEM_LAYOUT_SETTINGS \ 54*04e2aa7fSJoseph Chen ROCKCHIP_DEVICE_SETTINGS \ 55*04e2aa7fSJoseph Chen RKIMG_DET_BOOTDEV 56*04e2aa7fSJoseph Chen 57*04e2aa7fSJoseph Chen #undef RKIMG_BOOTCOMMAND 58*04e2aa7fSJoseph Chen #ifdef CONFIG_FIT_SIGNATURE 59*04e2aa7fSJoseph Chen #define RKIMG_BOOTCOMMAND \ 60*04e2aa7fSJoseph Chen "boot_fit;" 61*04e2aa7fSJoseph Chen #else 62*04e2aa7fSJoseph Chen #define RKIMG_BOOTCOMMAND \ 63*04e2aa7fSJoseph Chen "boot_fit;" \ 64*04e2aa7fSJoseph Chen "boot_android ${devtype} ${devnum};" 65*04e2aa7fSJoseph Chen #endif 66*04e2aa7fSJoseph Chen #endif 67*04e2aa7fSJoseph Chen #define CONFIG_PREBOOT 68*04e2aa7fSJoseph Chen 69*04e2aa7fSJoseph Chen #endif 70