1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2020 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef __CONFIG_RK3568_COMMON_H 8 #define __CONFIG_RK3568_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_SPL_FRAMEWORK 13 #define CONFIG_SPL_TEXT_BASE 0x00000000 14 #define CONFIG_SPL_MAX_SIZE 0x00038000 15 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000 16 #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000 17 #define CONFIG_SPL_STACK 0x03fe0000 18 19 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 20 #define CONFIG_SYS_CBSIZE 1024 21 #define CONFIG_SKIP_LOWLEVEL_INIT 22 #define CONFIG_SYS_TEXT_BASE 0x00a00000 23 #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 24 #define CONFIG_SYS_LOAD_ADDR 0x00c00800 25 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 26 #define COUNTER_FREQUENCY 24000000 27 28 #define GICD_BASE 0xfd400000 29 #define GICR_BASE 0xfd460000 30 #define GICC_BASE 0xfd800000 31 32 /* secure otp */ 33 #define OTP_UBOOT_ROLLBACK_OFFSET 0xe0 34 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 35 #define OTP_ALL_ONES_NUM_BITS 32 36 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x80 37 #define OTP_SECURE_BOOT_ENABLE_SIZE 2 38 #define OTP_RSA_HASH_ADDR 0x90 39 #define OTP_RSA_HASH_SIZE 32 40 41 /* MMC/SD IP block */ 42 #define CONFIG_BOUNCE_BUFFER 43 44 /* Nand */ 45 #define CONFIG_SYS_MAX_NAND_DEVICE 1 46 #define CONFIG_SYS_NAND_ONFI_DETECTION 47 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 48 #define CONFIG_SYS_NAND_PAGE_COUNT 64 49 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 50 51 #define CONFIG_SUPPORT_EMMC_RPMB 52 53 #define CONFIG_SYS_SDRAM_BASE 0 54 #define SDRAM_MAX_SIZE 0xf0000000 55 #define CONFIG_PREBOOT 56 57 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 58 59 #ifndef CONFIG_SPL_BUILD 60 /* usb mass storage */ 61 #define CONFIG_USB_FUNCTION_MASS_STORAGE 62 #define CONFIG_ROCKUSB_G_DNL_PID 0x350a 63 64 #define ENV_MEM_LAYOUT_SETTINGS \ 65 "scriptaddr=0x00b00000\0" \ 66 "pxefile_addr_r=0x00a00000\0" \ 67 "fdt_addr_r=0x0a100000\0" \ 68 "kernel_addr_no_bl32_r=0x00280000\0" \ 69 "kernel_addr_r=0x00a80000\0" \ 70 "kernel_addr_c=0x04080000\0" \ 71 "ramdisk_addr_r=0x0a200000\0" 72 73 #include <config_distro_bootcmd.h> 74 75 #define CONFIG_EXTRA_ENV_SETTINGS \ 76 ENV_MEM_LAYOUT_SETTINGS \ 77 "partitions=" PARTS_DEFAULT \ 78 ROCKCHIP_DEVICE_SETTINGS \ 79 RKIMG_DET_BOOTDEV \ 80 BOOTENV 81 82 #undef RKIMG_BOOTCOMMAND 83 #define RKIMG_BOOTCOMMAND \ 84 "boot_fit;" \ 85 "boot_android ${devtype} ${devnum};" 86 #endif 87 88 /* rockchip ohci host driver */ 89 #define CONFIG_USB_OHCI_NEW 90 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 91 92 #endif 93