History log of /rk3399_rockchip-uboot/include/configs/rk3568_common.h (Results 1 – 24 of 24)
Revision Date Author Comments
# 8e379471 01-Apr-2024 Xuhui Lin <xuhui.lin@rock-chips.com>

include: configs: Add burn secure-otp rsa4096 flag support

For rk3568, rsa4096 flag and secureboot flag should be
burned together because of ecc enable.

Change-Id: I75e6171d37abc589f433462d0f055df0

include: configs: Add burn secure-otp rsa4096 flag support

For rk3568, rsa4096 flag and secureboot flag should be
burned together because of ecc enable.

Change-Id: I75e6171d37abc589f433462d0f055df01e604799
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>

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# 2a0111cd 03-Apr-2024 William Wu <william.wu@rock-chips.com>

rockchip: rk3568: Set ROCKUSB_FSG_BUFLEN to 4MB

Change-Id: Ic1b79ee80d98916ab5265b57bec0f54c07716695
Signed-off-by: William Wu <william.wu@rock-chips.com>


# 468ac886 19-Dec-2023 Jon Lin <jon.lin@rock-chips.com>

config: Add rk3568 pcie ep config

Change-Id: I233d99542b5dba96fbde3eaeb97a451819fb9c20
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>


# 59eb0619 20-Nov-2023 Sugar Zhang <sugar.zhang@rock-chips.com>

rockchip: rk3568: Fix otp cpuid offset

The cpuid on RK3568 is located at 0xa instead of 0x7.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I57d236d5117a3364e885b82f05b3998f3846

rockchip: rk3568: Fix otp cpuid offset

The cpuid on RK3568 is located at 0xa instead of 0x7.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I57d236d5117a3364e885b82f05b3998f38462945
(cherry picked from commit 222597b291cbe9f01bc9e01cf3469067918022e0)

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# 20ca5a7e 11-Jul-2023 Jon Lin <jon.lin@rock-chips.com>

rockchip: rk3568: Define CONFIG_SPL_LOAD_FIT_ADDRESS

Change-Id: I635d0ac6259406e5a4146e19302b24845fe27c2e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>


# 9a0ff0a8 27-Sep-2022 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3568: Update fdt_addr_r

Avoid override by OPTEE from 0x8400000 - 0xa200000(max).

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4c94c1efe4e21d6aeccbad1d53ecda9b502d8e3f


# ee6a3c94 28-Apr-2022 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3568: Update "kernel_addr_r" as 0x00280000

"kernel_addr_no_low_bl32_r=0x00280000\0" is legacy config to
compatible the old image memory layout which BL32 stays in
0x00280000, by updating

rockchip: rk3568: Update "kernel_addr_r" as 0x00280000

"kernel_addr_no_low_bl32_r=0x00280000\0" is legacy config to
compatible the old image memory layout which BL32 stays in
0x00280000, by updating "kernel_addr_r" as "kernel_addr_no_low_bl32_r"
dynamically when runtime.

It has been long time that BL32 stays in 0x8400000, so it's safe
to remove "kernel_addr_no_low_bl32_r" and set "kernel_addr_r"
as 0x00280000.

Without this patch, verified-boot recovery/boot.img entry will be
assigned as 0x00a80000 and loaded in. But final kernel relocation
will be: "== DO RELOCATE == Kernel from 0x00280000 to 0x00a00000"
which results in a jump abort.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ide042dc798d8f287cde47811759426980f8bf568

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# 34ce33c4 01-Dec-2021 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3568: use default RKIMG_BOOTCOMMAND

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I667e253cf458a3128a08c0197a4675b54379c19e


# da465681 08-May-2021 Jason Zhu <jason.zhu@rock-chips.com>

rockchip: rk3568: fix compile error

Compile error when enable FIT_SIGNATURE.

error log:
u-boot-spl section `.u_boot_list' will not fit in region `.sram'
region `.sram' overflowed by 496 bytes scrip

rockchip: rk3568: fix compile error

Compile error when enable FIT_SIGNATURE.

error log:
u-boot-spl section `.u_boot_list' will not fit in region `.sram'
region `.sram' overflowed by 496 bytes scripts/Makefile.spl:357:
recipe for target 'spl/u-boot-spl' failed

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I5705287227ef7263005c94e9501a49513fc9e1f0

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# 49e18ddb 20-Apr-2021 Joseph Chen <chenjh@rock-chips.com>

rockchip: board: refactor kernel address update logic

Move kernel to "kernel_addr_no_low_bl32_r" address if possbile.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I9907ef6fba52afd9

rockchip: board: refactor kernel address update logic

Move kernel to "kernel_addr_no_low_bl32_r" address if possbile.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I9907ef6fba52afd9d68552ae54da487cf76175af

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# e20fb212 07-Apr-2021 Jason Zhu <jason.zhu@rock-chips.com>

include: rockchip: remove CONFIG_SUPPORT_EMMC_RPMB

The macro is default selected.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I6966779ca63119cd210cd04268f2481ef795fcbf


# 5d68fdf1 26-Feb-2021 Yifeng Zhao <yifeng.zhao@rock-chips.com>

rockchip: support sata device boot

The loader stage does not support SATA, and the boot device
can only be other storage. Therefore, it is necessary to
initialize the SATA device before judging the

rockchip: support sata device boot

The loader stage does not support SATA, and the boot device
can only be other storage. Therefore, it is necessary to
initialize the SATA device before judging the initialization
of atag boot device.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I31a215d6e56480a4f42b04efb735ad101dea537c

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# 94519358 03-Mar-2021 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3568: update scriptaddr and pxefile_addr_r

Set scriptaddr and pxefile_addr_r at a safe address.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I5cb618ba173cd9d59ae9fc3076

rockchip: rk3568: update scriptaddr and pxefile_addr_r

Set scriptaddr and pxefile_addr_r at a safe address.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I5cb618ba173cd9d59ae9fc3076ece9b64f494831

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# 5f73fdb1 28-Jan-2021 Yifeng Zhao <yifeng.zhao@rock-chips.com>

rockchip: rk3568: support usbplug

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If2c56d1db774f79689cfbe87bcae7cfcadacae82


# 3ae4136e 29-Jan-2021 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3568: enable hardware rand library

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ib537ad840d81fe152969166d6a37c4ddb64f1de7


# e3a5bc90 17-Jan-2021 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3568: add distro boot support

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Id1edbf251a363698f07b2b9c069fd0890c7c55ff


# 33a014bd 17-Dec-2020 David Wu <david.wu@rock-chips.com>

net: gmac_rockchip: Add rk3568 gmac support

Change-Id: I3de9899a27160f5acccc04cd1ac03b406e4b3296
Signed-off-by: David Wu <david.wu@rock-chips.com>


# 219085f0 23-Dec-2020 Jason Zhu <jason.zhu@rock-chips.com>

rockchip: rk3568: add some defination of secure otp

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I493e409a447e48111674683fd24746c5a2cc6553


# 5d96bba9 26-Nov-2020 Yifeng Zhao <yifeng.zhao@rock-chips.com>

rk3568: add nand support for spl and uboot

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I3b849db025ae15dde22636ae17ac2d19c5484dd6


# 186b0010 25-Nov-2020 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3568: place U-Boot at 10MB offset

2~10MB region is for OP-TEE.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic4d4beb9e42a2b17665102c811e59b5864cbc888


# 69b42cae 09-Nov-2020 Jon Lin <jon.lin@rock-chips.com>

rockchip: rk3568: Support nand devices

Change-Id: If8433d63e7f101f2f1837b6f613705b0ba18f72a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>


# 5033f049 02-Nov-2020 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3568: add irq definitions

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I13b662eff5a86b8fe021612130e50b9c3e783105


# 858bd926 31-Oct-2020 Ren Jianing <jianing.ren@rock-chips.com>

configs: rk3568: add USB support

Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: Id49e056ad30c4cef2eea22a7eb4ea4992318b9c4


# 7e26af38 22-Oct-2020 Joseph Chen <chenjh@rock-chips.com>

rockchip: add rk3568 SoC support

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I2e163b93d4ec5a60f1ff9c589626d3ccd994f854