1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2020 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef __CONFIG_RK3568_COMMON_H 8 #define __CONFIG_RK3568_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_SPL_FRAMEWORK 13 #define CONFIG_SPL_TEXT_BASE 0x00000000 14 #define CONFIG_SPL_MAX_SIZE 0x00020000 15 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000 16 #define CONFIG_SPL_BSS_MAX_SIZE 0x00002000 17 #define CONFIG_SPL_STACK 0x03fe0000 18 19 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 20 #define CONFIG_SYS_CBSIZE 1024 21 #define CONFIG_SKIP_LOWLEVEL_INIT 22 #define CONFIG_SYS_TEXT_BASE 0x00600000 23 #define CONFIG_SYS_INIT_SP_ADDR 0x00800000 24 #define CONFIG_SYS_LOAD_ADDR 0x00800800 25 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 26 #define COUNTER_FREQUENCY 24000000 27 28 #define GICD_BASE 0xfd400000 29 #define GICR_BASE 0xfd460000 30 31 /* MMC/SD IP block */ 32 #define CONFIG_BOUNCE_BUFFER 33 #define CONFIG_SUPPORT_EMMC_RPMB 34 35 #define CONFIG_SYS_SDRAM_BASE 0 36 #define SDRAM_MAX_SIZE 0xf0000000 37 #define CONFIG_PREBOOT 38 39 #ifndef CONFIG_SPL_BUILD 40 /* usb mass storage */ 41 #define CONFIG_USB_FUNCTION_MASS_STORAGE 42 #define CONFIG_ROCKUSB_G_DNL_PID 0x350a 43 44 #define ENV_MEM_LAYOUT_SETTINGS \ 45 "scriptaddr=0x00500000\0" \ 46 "pxefile_addr_r=0x00600000\0" \ 47 "fdt_addr_r=0x01f00000\0" \ 48 "kernel_addr_no_bl32_r=0x00280000\0" \ 49 "kernel_addr_r=0x00680000\0" \ 50 "kernel_addr_c=0x04080000\0" \ 51 "ramdisk_addr_r=0x0a200000\0" 52 53 #include <config_distro_bootcmd.h> 54 55 #define CONFIG_EXTRA_ENV_SETTINGS \ 56 ENV_MEM_LAYOUT_SETTINGS \ 57 "partitions=" PARTS_DEFAULT \ 58 ROCKCHIP_DEVICE_SETTINGS \ 59 RKIMG_DET_BOOTDEV \ 60 BOOTENV 61 #endif 62 63 #endif 64