1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2022 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef __CONFIG_RK3562_COMMON_H 8 #define __CONFIG_RK3562_COMMON_H 9 10 #define CFG_CPUID_OFFSET 0xa 11 12 #include "rockchip-common.h" 13 14 #define CONFIG_SPL_FRAMEWORK 15 #define CONFIG_SPL_TEXT_BASE 0x00000000 16 #define CONFIG_SPL_MAX_SIZE 0x00040000 17 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000 18 #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000 19 #define CONFIG_SPL_STACK 0x03fe0000 20 21 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 22 #define CONFIG_SYS_CBSIZE 1024 23 #define CONFIG_SKIP_LOWLEVEL_INIT 24 25 #ifdef CONFIG_SUPPORT_USBPLUG 26 #define CONFIG_SYS_TEXT_BASE 0x00000000 27 #else 28 #define CONFIG_SYS_TEXT_BASE 0x00200000 29 #endif 30 31 #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 32 #define CONFIG_SYS_LOAD_ADDR 0x00c00800 33 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 34 #define COUNTER_FREQUENCY 24000000 35 36 #define GICD_BASE 0xfe901000 37 #define GICC_BASE 0xfe902000 38 39 /* secure otp */ 40 #define OTP_UBOOT_ROLLBACK_OFFSET 0x350 41 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 42 #define OTP_ALL_ONES_NUM_BITS 32 43 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x20 44 #define OTP_SECURE_BOOT_ENABLE_SIZE 1 45 #define OTP_RSA_HASH_ADDR 0x180 46 #define OTP_RSA_HASH_SIZE 32 47 48 /* MMC/SD IP block */ 49 #define CONFIG_BOUNCE_BUFFER 50 51 #define CONFIG_SYS_SDRAM_BASE 0 52 #define SDRAM_MAX_SIZE 0xfc000000 53 #define CONFIG_PREBOOT 54 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 55 56 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x2000000 57 58 #ifndef CONFIG_SPL_BUILD 59 /* usb mass storage */ 60 #define CONFIG_USB_FUNCTION_MASS_STORAGE 61 #define CONFIG_ROCKUSB_G_DNL_PID 0x350d 62 63 #define ENV_MEM_LAYOUT_SETTINGS \ 64 "scriptaddr=0x00c00000\0" \ 65 "pxefile_addr_r=0x00e00000\0" \ 66 "fdt_addr_r=0x08300000\0" \ 67 "kernel_addr_r=0x00400000\0" \ 68 "kernel_addr_c=0x04080000\0" \ 69 "ramdisk_addr_r=0x0a200000\0" 70 71 #include <config_distro_bootcmd.h> 72 73 #define CONFIG_EXTRA_ENV_SETTINGS \ 74 ENV_MEM_LAYOUT_SETTINGS \ 75 "partitions=" PARTS_RKIMG \ 76 ROCKCHIP_DEVICE_SETTINGS \ 77 RKIMG_DET_BOOTDEV \ 78 BOOTENV 79 #endif 80 81 /* rockchip ohci host driver */ 82 #define CONFIG_USB_OHCI_NEW 83 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 84 #define CONFIG_LIB_HW_RAND 85 86 #endif 87