1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2020 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef __CONFIG_RK3528_COMMON_H 8 #define __CONFIG_RK3528_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_SPL_FRAMEWORK 13 #define CONFIG_SPL_TEXT_BASE 0x00000000 14 #define CONFIG_SPL_MAX_SIZE 0x00040000 15 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000 16 #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000 17 #define CONFIG_SPL_STACK 0x03fe0000 18 19 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 20 #define CONFIG_SYS_CBSIZE 1024 21 #define CONFIG_SKIP_LOWLEVEL_INIT 22 23 #ifdef CONFIG_SUPPORT_USBPLUG 24 #define CONFIG_SYS_TEXT_BASE 0x00000000 25 #else 26 #define CONFIG_SYS_TEXT_BASE 0x00200000 27 #endif 28 29 #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 30 #define CONFIG_SYS_LOAD_ADDR 0x00c00800 31 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 32 #define COUNTER_FREQUENCY 24000000 33 34 #define GICD_BASE 0xfed01000 35 #define GICC_BASE 0xfed02000 36 37 /* MMC/SD IP block */ 38 #define CONFIG_BOUNCE_BUFFER 39 40 #define CONFIG_SYS_SDRAM_BASE 0 41 #define SDRAM_MAX_SIZE 0xfc000000 42 #define CONFIG_PREBOOT 43 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 44 45 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x2000000 46 47 #ifndef CONFIG_SPL_BUILD 48 /* usb mass storage */ 49 #define CONFIG_USB_FUNCTION_MASS_STORAGE 50 #define CONFIG_ROCKUSB_G_DNL_PID 0x350d 51 52 #ifdef CONFIG_ARM64 53 #define ENV_MEM_LAYOUT_SETTINGS \ 54 "scriptaddr=0x00c00000\0" \ 55 "pxefile_addr_r=0x00e00000\0" \ 56 "fdt_addr_r=0x08300000\0" \ 57 "kernel_addr_r=0x00280000\0" \ 58 "kernel_addr_c=0x04080000\0" \ 59 "ramdisk_addr_r=0x0a200000\0" 60 #else 61 #define ENV_MEM_LAYOUT_SETTINGS \ 62 "scriptaddr=0x00000000\0" \ 63 "pxefile_addr_r=0x00100000\0" \ 64 "fdt_addr_r=0x08300000\0" \ 65 "kernel_addr_c=0x02008000\0" \ 66 "kernel_addr_r=0x00208000\0" \ 67 "ramdisk_addr_r=0x0a200000\0" 68 #endif 69 70 #include <config_distro_bootcmd.h> 71 72 #define CONFIG_EXTRA_ENV_SETTINGS \ 73 ENV_MEM_LAYOUT_SETTINGS \ 74 "partitions=" PARTS_RKIMG \ 75 ROCKCHIP_DEVICE_SETTINGS \ 76 RKIMG_DET_BOOTDEV \ 77 BOOTENV 78 #endif 79 80 /* rockchip ohci host driver */ 81 #define CONFIG_USB_OHCI_NEW 82 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 83 84 #endif 85