1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2020 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef __CONFIG_RK3528_COMMON_H 8 #define __CONFIG_RK3528_COMMON_H 9 10 #define CFG_CPUID_OFFSET 0xa 11 12 #include "rockchip-common.h" 13 14 #define CONFIG_SPL_FRAMEWORK 15 #define CONFIG_SPL_TEXT_BASE 0x00000000 16 #define CONFIG_SPL_MAX_SIZE 0x00040000 17 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000 18 #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000 19 #define CONFIG_SPL_STACK 0x03fe0000 20 21 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 22 #define CONFIG_SYS_CBSIZE 1024 23 #define CONFIG_SKIP_LOWLEVEL_INIT 24 25 #ifdef CONFIG_SUPPORT_USBPLUG 26 #define CONFIG_SYS_TEXT_BASE 0x00000000 27 #else 28 #define CONFIG_SYS_TEXT_BASE 0x00200000 29 #endif 30 31 #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 32 #define CONFIG_SYS_LOAD_ADDR 0x00c00800 33 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 34 #define COUNTER_FREQUENCY 24000000 35 36 #define GICD_BASE 0xfed01000 37 #define GICC_BASE 0xfed02000 38 39 #ifdef CONFIG_SPL_DM_VIDEO 40 #undef CONFIG_SPL_MAX_SIZE 41 #undef CONFIG_SPL_BSS_MAX_SIZE 42 #define CONFIG_SPL_MAX_SIZE 0x00140000 43 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 44 #endif 45 46 #ifdef CONFIG_ARM_SMP 47 #define SMP_CPU1 0x1 48 #define SMP_CPU1_STACK 0x04fe0000 49 #define SMP_CPU2 0x2 50 #define SMP_CPU2_STACK 0x05fe0000 51 #endif 52 53 /* secure otp */ 54 #define OTP_UBOOT_ROLLBACK_OFFSET 0x350 55 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 56 #define OTP_ALL_ONES_NUM_BITS 32 57 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x20 58 #define OTP_SECURE_BOOT_ENABLE_SIZE 1 59 #define OTP_RSA_HASH_ADDR 0x180 60 #define OTP_RSA_HASH_SIZE 32 61 62 /* MMC/SD IP block */ 63 #define CONFIG_BOUNCE_BUFFER 64 65 #define CONFIG_SYS_SDRAM_BASE 0 66 #define SDRAM_MAX_SIZE 0xfc000000 67 #define CONFIG_PREBOOT 68 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 69 70 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x2000000 71 72 #ifndef CONFIG_SPL_BUILD 73 /* usb mass storage */ 74 #define CONFIG_USB_FUNCTION_MASS_STORAGE 75 #define CONFIG_ROCKUSB_G_DNL_PID 0x350c 76 #define ROCKUSB_FSG_BUFLEN 0x400000 77 78 #ifdef CONFIG_ARM64 79 #define ENV_MEM_LAYOUT_SETTINGS \ 80 "scriptaddr=0x00c00000\0" \ 81 "pxefile_addr_r=0x00e00000\0" \ 82 "fdt_addr_r=0x08300000\0" \ 83 "kernel_addr_r=0x00280000\0" \ 84 "kernel_addr_c=0x04080000\0" \ 85 "ramdisk_addr_r=0x0a200000\0" 86 #else 87 #define ENV_MEM_LAYOUT_SETTINGS \ 88 "scriptaddr=0x00000000\0" \ 89 "pxefile_addr_r=0x00100000\0" \ 90 "fdt_addr_r=0x08300000\0" \ 91 "kernel_addr_c=0x02008000\0" \ 92 "kernel_addr_r=0x00208000\0" \ 93 "ramdisk_addr_r=0x0a200000\0" 94 #endif 95 96 #include <config_distro_bootcmd.h> 97 98 #define CONFIG_EXTRA_ENV_SETTINGS \ 99 ENV_MEM_LAYOUT_SETTINGS \ 100 "partitions=" PARTS_RKIMG \ 101 ROCKCHIP_DEVICE_SETTINGS \ 102 RKIMG_DET_BOOTDEV \ 103 BOOTENV 104 #endif 105 106 /* rockchip ohci host driver */ 107 #define CONFIG_USB_OHCI_NEW 108 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 109 110 #define CONFIG_LIB_HW_RAND 111 112 #endif 113