1c6f7c1a3SJoseph Chen /* SPDX-License-Identifier: GPL-2.0+ */ 2c6f7c1a3SJoseph Chen /* 3c6f7c1a3SJoseph Chen * (C) Copyright 2020 Rockchip Electronics Co., Ltd 4c6f7c1a3SJoseph Chen * 5c6f7c1a3SJoseph Chen */ 6c6f7c1a3SJoseph Chen 7c6f7c1a3SJoseph Chen #ifndef __CONFIG_RK3528_COMMON_H 8c6f7c1a3SJoseph Chen #define __CONFIG_RK3528_COMMON_H 9c6f7c1a3SJoseph Chen 104ed68146SSugar Zhang #define CFG_CPUID_OFFSET 0xa 114ed68146SSugar Zhang 12c6f7c1a3SJoseph Chen #include "rockchip-common.h" 13c6f7c1a3SJoseph Chen 14c6f7c1a3SJoseph Chen #define CONFIG_SPL_FRAMEWORK 15c6f7c1a3SJoseph Chen #define CONFIG_SPL_TEXT_BASE 0x00000000 16c6f7c1a3SJoseph Chen #define CONFIG_SPL_MAX_SIZE 0x00040000 17c6f7c1a3SJoseph Chen #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000 18c6f7c1a3SJoseph Chen #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000 19c6f7c1a3SJoseph Chen #define CONFIG_SPL_STACK 0x03fe0000 20c6f7c1a3SJoseph Chen 21c6f7c1a3SJoseph Chen #define CONFIG_SYS_MALLOC_LEN (32 << 20) 22c6f7c1a3SJoseph Chen #define CONFIG_SYS_CBSIZE 1024 23c6f7c1a3SJoseph Chen #define CONFIG_SKIP_LOWLEVEL_INIT 24c6f7c1a3SJoseph Chen 25c6f7c1a3SJoseph Chen #ifdef CONFIG_SUPPORT_USBPLUG 26c6f7c1a3SJoseph Chen #define CONFIG_SYS_TEXT_BASE 0x00000000 27c6f7c1a3SJoseph Chen #else 28c6f7c1a3SJoseph Chen #define CONFIG_SYS_TEXT_BASE 0x00200000 29c6f7c1a3SJoseph Chen #endif 30c6f7c1a3SJoseph Chen 31c6f7c1a3SJoseph Chen #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 32c6f7c1a3SJoseph Chen #define CONFIG_SYS_LOAD_ADDR 0x00c00800 33c6f7c1a3SJoseph Chen #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 34c6f7c1a3SJoseph Chen #define COUNTER_FREQUENCY 24000000 35c6f7c1a3SJoseph Chen 36c6f7c1a3SJoseph Chen #define GICD_BASE 0xfed01000 37c6f7c1a3SJoseph Chen #define GICC_BASE 0xfed02000 38c6f7c1a3SJoseph Chen 393407147bSJoseph Chen #ifdef CONFIG_SPL_DM_VIDEO 403407147bSJoseph Chen #undef CONFIG_SPL_MAX_SIZE 413407147bSJoseph Chen #undef CONFIG_SPL_BSS_MAX_SIZE 423407147bSJoseph Chen #define CONFIG_SPL_MAX_SIZE 0x00140000 433407147bSJoseph Chen #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 443407147bSJoseph Chen #endif 453407147bSJoseph Chen 463407147bSJoseph Chen #ifdef CONFIG_ARM_SMP 473407147bSJoseph Chen #define SMP_CPU1 0x1 483407147bSJoseph Chen #define SMP_CPU1_STACK 0x04fe0000 493407147bSJoseph Chen #define SMP_CPU2 0x2 503407147bSJoseph Chen #define SMP_CPU2_STACK 0x05fe0000 513407147bSJoseph Chen #endif 523407147bSJoseph Chen 53adafcdeaSXuhui Lin /* secure otp */ 54adafcdeaSXuhui Lin #define OTP_UBOOT_ROLLBACK_OFFSET 0x350 55adafcdeaSXuhui Lin #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 56adafcdeaSXuhui Lin #define OTP_ALL_ONES_NUM_BITS 32 57adafcdeaSXuhui Lin #define OTP_SECURE_BOOT_ENABLE_ADDR 0x20 58adafcdeaSXuhui Lin #define OTP_SECURE_BOOT_ENABLE_SIZE 1 59adafcdeaSXuhui Lin #define OTP_RSA_HASH_ADDR 0x180 60adafcdeaSXuhui Lin #define OTP_RSA_HASH_SIZE 32 61adafcdeaSXuhui Lin 62c6f7c1a3SJoseph Chen /* MMC/SD IP block */ 63c6f7c1a3SJoseph Chen #define CONFIG_BOUNCE_BUFFER 64c6f7c1a3SJoseph Chen 65c6f7c1a3SJoseph Chen #define CONFIG_SYS_SDRAM_BASE 0 66c6f7c1a3SJoseph Chen #define SDRAM_MAX_SIZE 0xfc000000 67c6f7c1a3SJoseph Chen #define CONFIG_PREBOOT 68c6f7c1a3SJoseph Chen #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 69c6f7c1a3SJoseph Chen 70c6f7c1a3SJoseph Chen #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x2000000 71c6f7c1a3SJoseph Chen 72c6f7c1a3SJoseph Chen #ifndef CONFIG_SPL_BUILD 73c6f7c1a3SJoseph Chen /* usb mass storage */ 74c6f7c1a3SJoseph Chen #define CONFIG_USB_FUNCTION_MASS_STORAGE 755286fa5eSJoseph Chen #define CONFIG_ROCKUSB_G_DNL_PID 0x350c 76*bb2bec72SWilliam Wu #define ROCKUSB_FSG_BUFLEN 0x400000 77c6f7c1a3SJoseph Chen 78c6f7c1a3SJoseph Chen #ifdef CONFIG_ARM64 79c6f7c1a3SJoseph Chen #define ENV_MEM_LAYOUT_SETTINGS \ 80c6f7c1a3SJoseph Chen "scriptaddr=0x00c00000\0" \ 81c6f7c1a3SJoseph Chen "pxefile_addr_r=0x00e00000\0" \ 82c6f7c1a3SJoseph Chen "fdt_addr_r=0x08300000\0" \ 83c6f7c1a3SJoseph Chen "kernel_addr_r=0x00280000\0" \ 84c6f7c1a3SJoseph Chen "kernel_addr_c=0x04080000\0" \ 85c6f7c1a3SJoseph Chen "ramdisk_addr_r=0x0a200000\0" 86c6f7c1a3SJoseph Chen #else 87c6f7c1a3SJoseph Chen #define ENV_MEM_LAYOUT_SETTINGS \ 88c6f7c1a3SJoseph Chen "scriptaddr=0x00000000\0" \ 89c6f7c1a3SJoseph Chen "pxefile_addr_r=0x00100000\0" \ 90c6f7c1a3SJoseph Chen "fdt_addr_r=0x08300000\0" \ 91c6f7c1a3SJoseph Chen "kernel_addr_c=0x02008000\0" \ 92c6f7c1a3SJoseph Chen "kernel_addr_r=0x00208000\0" \ 93c6f7c1a3SJoseph Chen "ramdisk_addr_r=0x0a200000\0" 94c6f7c1a3SJoseph Chen #endif 95c6f7c1a3SJoseph Chen 96c6f7c1a3SJoseph Chen #include <config_distro_bootcmd.h> 97c6f7c1a3SJoseph Chen 98c6f7c1a3SJoseph Chen #define CONFIG_EXTRA_ENV_SETTINGS \ 99c6f7c1a3SJoseph Chen ENV_MEM_LAYOUT_SETTINGS \ 100c6f7c1a3SJoseph Chen "partitions=" PARTS_RKIMG \ 101c6f7c1a3SJoseph Chen ROCKCHIP_DEVICE_SETTINGS \ 102c6f7c1a3SJoseph Chen RKIMG_DET_BOOTDEV \ 103c6f7c1a3SJoseph Chen BOOTENV 104c6f7c1a3SJoseph Chen #endif 105c6f7c1a3SJoseph Chen 106c6f7c1a3SJoseph Chen /* rockchip ohci host driver */ 107c6f7c1a3SJoseph Chen #define CONFIG_USB_OHCI_NEW 108c6f7c1a3SJoseph Chen #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 109c6f7c1a3SJoseph Chen 1109c74bf7cSJoseph Chen #define CONFIG_LIB_HW_RAND 1119c74bf7cSJoseph Chen 112c6f7c1a3SJoseph Chen #endif 113