13d78ac3eSAndy Yan /* 23d78ac3eSAndy Yan * (C) Copyright 2017 Rockchip Electronics Co., Ltd 33d78ac3eSAndy Yan * 43d78ac3eSAndy Yan * SPDX-License-Identifier: GPL-2.0+ 53d78ac3eSAndy Yan */ 63d78ac3eSAndy Yan 73d78ac3eSAndy Yan #ifndef __CONFIG_RK3308_COMMON_H 83d78ac3eSAndy Yan #define __CONFIG_RK3308_COMMON_H 93d78ac3eSAndy Yan 103d78ac3eSAndy Yan #include "rockchip-common.h" 113d78ac3eSAndy Yan 123d78ac3eSAndy Yan #define CONFIG_SYS_MALLOC_LEN (32 << 20) 133d78ac3eSAndy Yan #define CONFIG_SYS_CBSIZE 1024 143d78ac3eSAndy Yan #define CONFIG_SKIP_LOWLEVEL_INIT 153d78ac3eSAndy Yan 163d78ac3eSAndy Yan #define CONFIG_SPL_FRAMEWORK 173d78ac3eSAndy Yan 183d78ac3eSAndy Yan #define CONFIG_SYS_NS16550_MEM32 193d78ac3eSAndy Yan 203d78ac3eSAndy Yan #define CONFIG_SYS_TEXT_BASE 0x00200000 213d78ac3eSAndy Yan #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 223d78ac3eSAndy Yan #define CONFIG_SYS_LOAD_ADDR 0x00800800 233d78ac3eSAndy Yan #define CONFIG_SPL_STACK 0x00400000 243d78ac3eSAndy Yan #define CONFIG_SPL_TEXT_BASE 0x00000000 253d78ac3eSAndy Yan #define CONFIG_SPL_MAX_SIZE 0x10000 263d78ac3eSAndy Yan #define CONFIG_SPL_BSS_START_ADDR 0x2000000 273d78ac3eSAndy Yan #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 283d78ac3eSAndy Yan #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 293d78ac3eSAndy Yan 303d78ac3eSAndy Yan #define COUNTER_FREQUENCY 24000000 313d78ac3eSAndy Yan 323d78ac3eSAndy Yan #define GICD_BASE 0xff131000 333d78ac3eSAndy Yan #define GICC_BASE 0xff132000 343d78ac3eSAndy Yan 353d78ac3eSAndy Yan #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 363d78ac3eSAndy Yan 373d78ac3eSAndy Yan /* MMC/SD IP block */ 383d78ac3eSAndy Yan #define CONFIG_BOUNCE_BUFFER 393d78ac3eSAndy Yan 403d78ac3eSAndy Yan #define CONFIG_SYS_SDRAM_BASE 0 413d78ac3eSAndy Yan #define SDRAM_MAX_SIZE 0xff000000 423d78ac3eSAndy Yan #define SDRAM_BANK_SIZE (2UL << 30) 433d78ac3eSAndy Yan #define CONFIG_PREBOOT 443d78ac3eSAndy Yan 453d78ac3eSAndy Yan #ifndef CONFIG_SPL_BUILD 463d78ac3eSAndy Yan 473d78ac3eSAndy Yan /* usb mass storage */ 483d78ac3eSAndy Yan #define CONFIG_USB_FUNCTION_MASS_STORAGE 493d78ac3eSAndy Yan #define CONFIG_ROCKUSB_G_DNL_PID 0x330d 503d78ac3eSAndy Yan 513d78ac3eSAndy Yan #define ENV_MEM_LAYOUT_SETTINGS \ 523d78ac3eSAndy Yan "scriptaddr=0x00500000\0" \ 533d78ac3eSAndy Yan "pxefile_addr_r=0x00600000\0" \ 543d78ac3eSAndy Yan "fdt_addr_r=0x01f00000\0" \ 553d78ac3eSAndy Yan "kernel_addr_r=0x02080000\0" \ 563d78ac3eSAndy Yan "ramdisk_addr_r=0x04000000\0" 573d78ac3eSAndy Yan 583d78ac3eSAndy Yan #include <config_distro_bootcmd.h> 593d78ac3eSAndy Yan #define CONFIG_EXTRA_ENV_SETTINGS \ 603d78ac3eSAndy Yan ENV_MEM_LAYOUT_SETTINGS \ 613d78ac3eSAndy Yan "partitions=" PARTS_DEFAULT \ 62*5c651246SSandy Huang ROCKCHIP_DEVICE_SETTINGS \ 633d78ac3eSAndy Yan BOOTENV 643d78ac3eSAndy Yan 653d78ac3eSAndy Yan #endif 663d78ac3eSAndy Yan 673d78ac3eSAndy Yan #endif 68