13d78ac3eSAndy Yan /* 23d78ac3eSAndy Yan * (C) Copyright 2017 Rockchip Electronics Co., Ltd 33d78ac3eSAndy Yan * 43d78ac3eSAndy Yan * SPDX-License-Identifier: GPL-2.0+ 53d78ac3eSAndy Yan */ 63d78ac3eSAndy Yan 73d78ac3eSAndy Yan #ifndef __CONFIG_RK3308_COMMON_H 83d78ac3eSAndy Yan #define __CONFIG_RK3308_COMMON_H 93d78ac3eSAndy Yan 103d78ac3eSAndy Yan #include "rockchip-common.h" 113d78ac3eSAndy Yan 12b4bed602SAndy Yan #define CONFIG_SYS_MALLOC_LEN (10 << 20) 133d78ac3eSAndy Yan #define CONFIG_SYS_CBSIZE 1024 143d78ac3eSAndy Yan #define CONFIG_SKIP_LOWLEVEL_INIT 15fa935894SYifeng Zhao #define CONFIG_SYS_MAX_NAND_DEVICE 1 165adc7dedSYifeng Zhao #define CONFIG_SYS_NAND_ONFI_DETECTION 17fa935894SYifeng Zhao #define CONFIG_SYS_NAND_PAGE_SIZE 2048 18fa935894SYifeng Zhao #define CONFIG_SYS_NAND_PAGE_COUNT 64 1977496606SYifeng Zhao #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 203d78ac3eSAndy Yan #define CONFIG_SPL_FRAMEWORK 21951488b0SAndy Yan #define CONFIG_SPL_TEXT_BASE 0x00000000 22951488b0SAndy Yan #define CONFIG_SPL_MAX_SIZE 0x20000 23951488b0SAndy Yan #define CONFIG_SPL_BSS_START_ADDR 0x00400000 24951488b0SAndy Yan #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 25*4dbf7962SJason Zhu #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 263d78ac3eSAndy Yan 273d78ac3eSAndy Yan #define CONFIG_SYS_NS16550_MEM32 283d78ac3eSAndy Yan 29c791e8a8SAndy Yan #define CONFIG_SYS_TEXT_BASE 0x00600000 30a25a7031SJoseph Chen #define CONFIG_SYS_INIT_SP_ADDR 0x00800000 31c791e8a8SAndy Yan #define CONFIG_SYS_LOAD_ADDR 0x00C00800 323d78ac3eSAndy Yan #define CONFIG_SPL_STACK 0x00400000 333d78ac3eSAndy Yan #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 343d78ac3eSAndy Yan 353d78ac3eSAndy Yan #define COUNTER_FREQUENCY 24000000 363d78ac3eSAndy Yan 370b4bf976SJoseph Chen #define GICD_BASE 0xff581000 380b4bf976SJoseph Chen #define GICC_BASE 0xff582000 393d78ac3eSAndy Yan 403d78ac3eSAndy Yan #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 413d78ac3eSAndy Yan 423d78ac3eSAndy Yan /* MMC/SD IP block */ 433d78ac3eSAndy Yan #define CONFIG_BOUNCE_BUFFER 443d78ac3eSAndy Yan 453d78ac3eSAndy Yan #define CONFIG_SYS_SDRAM_BASE 0 463d78ac3eSAndy Yan #define SDRAM_MAX_SIZE 0xff000000 473d78ac3eSAndy Yan #define SDRAM_BANK_SIZE (2UL << 30) 4860137d81SJoseph Chen #ifdef CONFIG_DM_DVFS 4960137d81SJoseph Chen #define CONFIG_PREBOOT "dvfs repeat" 5060137d81SJoseph Chen #else 513d78ac3eSAndy Yan #define CONFIG_PREBOOT 5260137d81SJoseph Chen #endif 533d78ac3eSAndy Yan 543d78ac3eSAndy Yan #ifndef CONFIG_SPL_BUILD 553d78ac3eSAndy Yan 563d78ac3eSAndy Yan /* usb mass storage */ 573d78ac3eSAndy Yan #define CONFIG_USB_FUNCTION_MASS_STORAGE 583d78ac3eSAndy Yan #define CONFIG_ROCKUSB_G_DNL_PID 0x330d 593d78ac3eSAndy Yan 60b4bed602SAndy Yan #ifdef CONFIG_ARM64 613d78ac3eSAndy Yan #define ENV_MEM_LAYOUT_SETTINGS \ 623d78ac3eSAndy Yan "scriptaddr=0x00500000\0" \ 633d78ac3eSAndy Yan "pxefile_addr_r=0x00600000\0" \ 643d78ac3eSAndy Yan "fdt_addr_r=0x01f00000\0" \ 65f90a7d86SJoseph Chen "kernel_addr_no_bl32_r=0x00280000\0" \ 66203b897eSAndy Yan "kernel_addr_r=0x00680000\0" \ 67203b897eSAndy Yan "kernel_addr_c=0x02480000\0" \ 683d78ac3eSAndy Yan "ramdisk_addr_r=0x04000000\0" 69b4bed602SAndy Yan #else 70b4bed602SAndy Yan #define ENV_MEM_LAYOUT_SETTINGS \ 71b4bed602SAndy Yan "scriptaddr=0x00500000\0" \ 72b4bed602SAndy Yan "pxefile_addr_r=0x00600000\0" \ 73f9ca6757SJoseph Chen "fdt_addr_r=0x02f00000\0" \ 740958c00cSAndy Yan "kernel_addr_r=0x00058000\0" \ 750958c00cSAndy Yan "kernel_addr_c=0x2008000\0" \ 760b84b74aSJoseph Chen "ramdisk_addr_r=0x02880000\0" 77b4bed602SAndy Yan #endif 783d78ac3eSAndy Yan 793d78ac3eSAndy Yan #include <config_distro_bootcmd.h> 803d78ac3eSAndy Yan #define CONFIG_EXTRA_ENV_SETTINGS \ 813d78ac3eSAndy Yan ENV_MEM_LAYOUT_SETTINGS \ 823d78ac3eSAndy Yan "partitions=" PARTS_DEFAULT \ 835c651246SSandy Huang ROCKCHIP_DEVICE_SETTINGS \ 8431c3ca32SKever Yang RKIMG_DET_BOOTDEV \ 85eb01a124SCody Xie BOOTENV_SHARED_RKNAND \ 863d78ac3eSAndy Yan BOOTENV 873d78ac3eSAndy Yan 883d78ac3eSAndy Yan #endif 893d78ac3eSAndy Yan 903d78ac3eSAndy Yan #endif 91