1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RK3128_COMMON_H 8 #define __CONFIG_RK3128_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_ENV_SIZE 0x2000 13 #define CONFIG_SYS_MAXARGS 16 14 #define CONFIG_BAUDRATE 115200 15 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 16 #define CONFIG_SYS_CBSIZE 1024 17 #define CONFIG_SKIP_LOWLEVEL_INIT 18 19 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) 20 #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ 21 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) 22 23 #define CONFIG_SYS_NS16550_MEM32 24 25 #define CONFIG_SYS_TEXT_BASE 0x60000000 26 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 27 #define CONFIG_SYS_LOAD_ADDR 0x60800800 28 29 30 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 31 32 /* MMC/SD IP block */ 33 #define CONFIG_BOUNCE_BUFFER 34 35 #define CONFIG_SUPPORT_VFAT 36 #define CONFIG_FS_EXT4 37 38 /* RAW SD card / eMMC locations. */ 39 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) 40 41 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 42 #define CONFIG_SYS_SDRAM_BASE 0x60000000 43 #define CONFIG_NR_DRAM_BANKS 2 44 #define SDRAM_MAX_SIZE 0x80000000 45 46 #define CONFIG_SPI_FLASH 47 #define CONFIG_SPI 48 #define CONFIG_SF_DEFAULT_SPEED 20000000 49 50 #ifndef CONFIG_SPL_BUILD 51 52 /* usb mass storage */ 53 #define CONFIG_USB_FUNCTION_MASS_STORAGE 54 55 #define ENV_MEM_LAYOUT_SETTINGS \ 56 "scriptaddr=0x60500000\0" \ 57 "pxefile_addr_r=0x60600000\0" \ 58 "fdt_addr_r=0x61f00000\0" \ 59 "kernel_addr_r=0x62000000\0" \ 60 "ramdisk_addr_r=0x64000000\0" 61 62 #include <config_distro_bootcmd.h> 63 #define CONFIG_EXTRA_ENV_SETTINGS \ 64 ENV_MEM_LAYOUT_SETTINGS \ 65 "partitions=" PARTS_DEFAULT \ 66 BOOTENV 67 68 #endif 69 70 #endif 71