1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RK3128_COMMON_H 8 #define __CONFIG_RK3128_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_SYS_MAXARGS 16 13 #define CONFIG_BAUDRATE 115200 14 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 15 #define CONFIG_SYS_CBSIZE 1024 16 #define CONFIG_SKIP_LOWLEVEL_INIT 17 18 #define CONFIG_SYS_TEXT_BASE 0x60000000 19 #define CONFIG_SYS_INIT_SP_ADDR 0x60300000 20 #define CONFIG_SYS_LOAD_ADDR 0x60800800 21 22 #define GICC_BASE 0x1013A000 23 #define GICD_BASE 0x10139000 24 25 #define CONFIG_SUPPORT_EMMC_RPMB 26 27 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 28 29 #define CONFIG_ROCKUSB_G_DNL_PID 0x310C 30 #define TEST_NUM_G 31 32 /* MMC/SD IP block */ 33 #define CONFIG_BOUNCE_BUFFER 34 35 #define CONFIG_SUPPORT_VFAT 36 #define CONFIG_FS_EXT4 37 38 /* RAW SD card / eMMC locations. */ 39 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) 40 41 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 42 #define CONFIG_SYS_SDRAM_BASE 0x60000000 43 #define SDRAM_MAX_SIZE 0x80000000 44 45 #ifndef CONFIG_SPL_BUILD 46 #define CONFIG_PREBOOT 47 48 /* usb mass storage */ 49 #define CONFIG_USB_FUNCTION_MASS_STORAGE 50 51 #define ENV_MEM_LAYOUT_SETTINGS1 \ 52 "scriptaddr1=0x60500000\0" \ 53 "pxefile_addr1_r=0x60600000\0" \ 54 "fdt_addr1_r=0x61700000\0" \ 55 "kernel_addr1_r=0x62008000\0" \ 56 "ramdisk_addr1_r=0x63000000\0" 57 58 #define ENV_MEM_LAYOUT_SETTINGS \ 59 "scriptaddr=0x60500000\0" \ 60 "pxefile_addr_r=0x60600000\0" \ 61 "fdt_addr_r=0x68300000\0" \ 62 "kernel_addr_r=0x62008000\0" \ 63 "ramdisk_addr_r=0x6a200000\0" 64 65 #include <config_distro_bootcmd.h> 66 #define CONFIG_EXTRA_ENV_SETTINGS \ 67 ENV_MEM_LAYOUT_SETTINGS \ 68 ENV_MEM_LAYOUT_SETTINGS1 \ 69 "partitions=" PARTS_DEFAULT \ 70 ROCKCHIP_DEVICE_SETTINGS \ 71 RKIMG_DET_BOOTDEV \ 72 BOOTENV 73 74 #endif 75 76 /* rockchip ohci host driver */ 77 #define CONFIG_USB_OHCI_NEW 78 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 79 80 #endif 81