1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd 4 * 5 * Author: Guochun Huang <hero.huang@rock-chips.com> 6 */ 7 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <dm.h> 12 #include <div64.h> 13 #include <asm/io.h> 14 #include <asm/arch-rockchip/clock.h> 15 #include <linux/ioport.h> 16 #include <linux/iopoll.h> 17 #include <linux/math64.h> 18 #include <reset.h> 19 #include <regmap.h> 20 #include <syscon.h> 21 22 #include "rockchip_phy.h" 23 24 #define MSEC_PER_SEC 1000L 25 #define USEC_PER_SEC 1000000LL 26 #define PSEC_PER_SEC 1000000000000LL 27 28 #define UPDATE(x, h, l) (((x) << (l)) & GENMASK((h), (l))) 29 #define HIWORD_UPDATE(v, h, l) (((v) << (l)) | (GENMASK((h), (l)) << 16)) 30 31 #define BIAS_CON0 0x0000 32 #define BIAS_CON1 0x0004 33 #define BIAS_CON2 0x0008 34 #define BIAS_CON4 0x0010 35 #define I_MUX_SEL_MASK GENMASK(6, 5) 36 #define I_MUX_SEL(x) UPDATE(x, 6, 5) 37 38 #define PLL_CON0 0x0100 39 #define PLL_EN BIT(12) 40 #define S_MASK GENMASK(10, 8) 41 #define S(x) UPDATE(x, 10, 8) 42 #define P_MASK GENMASK(5, 0) 43 #define P(x) UPDATE(x, 5, 0) 44 #define PLL_CON1 0x0104 45 #define PLL_CON2 0x0108 46 #define M_MASK GENMASK(9, 0) 47 #define M(x) UPDATE(x, 9, 0) 48 #define PLL_CON3 0x010c 49 #define MRR_MASK GENMASK(13, 8) 50 #define MRR(x) UPDATE(x, 13, 8) 51 #define MFR_MASK GENMASK(7, 0) 52 #define MFR(x) UPDATE(x, 7, 0) 53 #define PLL_CON4 0x0110 54 #define SSCG_EN BIT(11) 55 #define PLL_CON5 0x0114 56 #define RESET_N_SEL BIT(10) 57 #define PLL_ENABLE_SEL BIT(8) 58 #define PLL_CON6 0x0118 59 #define PLL_CON7 0x011c 60 #define PLL_LOCK_CNT(x) UPDATE(x, 15, 0) 61 #define PLL_CON8 0x0120 62 #define PLL_STB_CNT(x) UPDATE(x, 15, 0) 63 #define PLL_STAT0 0x0140 64 #define PLL_LOCK BIT(0) 65 66 #define DPHY_MC_GNR_CON0 0x0300 67 #define PHY_READY BIT(1) 68 #define PHY_ENABLE BIT(0) 69 #define DPHY_MC_GNR_CON1 0x0304 70 #define T_PHY_READY(x) UPDATE(x, 15, 0) 71 #define DPHY_MC_ANA_CON0 0x0308 72 #define DPHY_MC_ANA_CON1 0x030c 73 #define DPHY_MC_ANA_CON2 0x0310 74 #define HS_VREG_AMP_ICON(x) UPDATE(x, 1, 0) 75 #define DPHY_MC_TIME_CON0 0x0330 76 #define HSTX_CLK_SEL BIT(12) 77 #define T_LPX(x) UPDATE(x, 11, 4) 78 #define DPHY_MC_TIME_CON1 0x0334 79 #define T_CLK_ZERO(x) UPDATE(x, 15, 8) 80 #define T_CLK_PREPARE(x) UPDATE(x, 7, 0) 81 #define DPHY_MC_TIME_CON2 0x0338 82 #define T_HS_EXIT(x) UPDATE(x, 15, 8) 83 #define T_CLK_TRAIL(x) UPDATE(x, 7, 0) 84 #define DPHY_MC_TIME_CON3 0x033c 85 #define T_CLK_POST(x) UPDATE(x, 7, 0) 86 #define DPHY_MC_TIME_CON4 0x0340 87 #define T_ULPS_EXIT(x) UPDATE(x, 9, 0) 88 #define DPHY_MC_DESKEW_CON0 0x0350 89 #define SKEW_CAL_RUN_TIME(x) UPDATE(x, 15, 12) 90 91 #define SKEW_CAL_INIT_RUN_TIME(x) UPDATE(x, 11, 8) 92 #define SKEW_CAL_INIT_WAIT_TIME(x) UPDATE(x, 7, 4) 93 #define SKEW_CAL_EN BIT(0) 94 95 #define COMBO_MD0_GNR_CON0 0x0400 96 #define COMBO_MD0_GNR_CON1 0x0404 97 #define COMBO_MD0_ANA_CON0 0x0408 98 #define COMBO_MD0_ANA_CON1 0x040C 99 #define COMBO_MD0_ANA_CON2 0x0410 100 101 #define COMBO_MD0_TIME_CON0 0x0430 102 #define COMBO_MD0_TIME_CON1 0x0434 103 #define COMBO_MD0_TIME_CON2 0x0438 104 #define COMBO_MD0_TIME_CON3 0x043C 105 #define COMBO_MD0_TIME_CON4 0x0440 106 #define COMBO_MD0_DATA_CON0 0x0444 107 108 #define COMBO_MD1_GNR_CON0 0x0500 109 #define COMBO_MD1_GNR_CON1 0x0504 110 #define COMBO_MD1_ANA_CON0 0x0508 111 #define COMBO_MD1_ANA_CON1 0x050c 112 #define COMBO_MD1_ANA_CON2 0x0510 113 #define COMBO_MD1_TIME_CON0 0x0530 114 #define COMBO_MD1_TIME_CON1 0x0534 115 #define COMBO_MD1_TIME_CON2 0x0538 116 #define COMBO_MD1_TIME_CON3 0x053C 117 #define COMBO_MD1_TIME_CON4 0x0540 118 #define COMBO_MD1_DATA_CON0 0x0544 119 120 #define COMBO_MD2_GNR_CON0 0x0600 121 #define COMBO_MD2_GNR_CON1 0x0604 122 #define COMBO_MD2_ANA_CON0 0X0608 123 #define COMBO_MD2_ANA_CON1 0X060C 124 #define COMBO_MD2_ANA_CON2 0X0610 125 #define COMBO_MD2_TIME_CON0 0x0630 126 #define COMBO_MD2_TIME_CON1 0x0634 127 #define COMBO_MD2_TIME_CON2 0x0638 128 #define COMBO_MD2_TIME_CON3 0x063C 129 #define COMBO_MD2_TIME_CON4 0x0640 130 #define COMBO_MD2_DATA_CON0 0x0644 131 132 #define DPHY_MD3_GNR_CON0 0x0700 133 #define DPHY_MD3_GNR_CON1 0x0704 134 #define DPHY_MD3_ANA_CON0 0X0708 135 #define DPHY_MD3_ANA_CON1 0X070C 136 #define DPHY_MD3_ANA_CON2 0X0710 137 #define DPHY_MD3_TIME_CON0 0x0730 138 #define DPHY_MD3_TIME_CON1 0x0734 139 #define DPHY_MD3_TIME_CON2 0x0738 140 #define DPHY_MD3_TIME_CON3 0x073C 141 #define DPHY_MD3_TIME_CON4 0x0740 142 #define DPHY_MD3_DATA_CON0 0x0744 143 144 #define T_LP_EXIT_SKEW(x) UPDATE(x, 3, 2) 145 #define T_LP_ENTRY_SKEW(x) UPDATE(x, 1, 0) 146 #define T_HS_ZERO(x) UPDATE(x, 15, 8) 147 #define T_HS_PREPARE(x) UPDATE(x, 7, 0) 148 #define T_HS_EXIT(x) UPDATE(x, 15, 8) 149 #define T_HS_TRAIL(x) UPDATE(x, 7, 0) 150 #define T_TA_GET(x) UPDATE(x, 7, 4) 151 #define T_TA_GO(x) UPDATE(x, 3, 0) 152 153 /* MIPI_CDPHY_GRF registers */ 154 #define MIPI_DCPHY_GRF_CON0 0x0000 155 #define S_CPHY_MODE HIWORD_UPDATE(1, 3, 3) 156 #define M_CPHY_MODE HIWORD_UPDATE(1, 0, 0) 157 158 struct samsung_mipi_dphy_timing { 159 unsigned int max_lane_mbps; 160 u8 clk_prepare; 161 u8 clk_zero; 162 u8 clk_post; 163 u8 clk_trail_eot; 164 u8 hs_prepare; 165 u8 hs_zero; 166 u8 hs_trail_eot; 167 u8 lpx; 168 u8 hs_exit; 169 u8 hs_settle; 170 }; 171 172 struct samsung_mipi_cphy_timing { 173 unsigned int max_lane_msps; 174 u8 prepare_3; 175 u8 prebegin_3; 176 u8 post_3; 177 u8 lpx; 178 u8 hs_exit; 179 u8 settle_3; 180 }; 181 182 struct samsung_mipi_dcphy_plat_data { 183 u32 dphy_tx_max_kbps_per_lane; 184 u32 cphy_tx_max_ksps_per_lane; 185 }; 186 187 struct samsung_mipi_dcphy { 188 enum phy_mode mode; 189 void *base; 190 void *grf; 191 int lanes; 192 bool c_option; 193 struct reset_ctl m_phy_rst; 194 195 const struct samsung_mipi_dcphy_plat_data *pdata; 196 struct { 197 unsigned long long rate; 198 u8 prediv; 199 u16 fbdiv; 200 long dsm; 201 u8 scaler; 202 203 bool ssc_en; 204 u8 mfr; 205 u8 mrr; 206 } pll; 207 }; 208 209 static const 210 struct samsung_mipi_dphy_timing samsung_mipi_dphy_timing_table[] = { 211 {6500, 32, 117, 31, 28, 30, 56, 27, 24, 44, 37}, 212 {6490, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37}, 213 {6480, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37}, 214 {6470, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37}, 215 {6460, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37}, 216 {6450, 32, 115, 31, 28, 30, 56, 27, 24, 44, 37}, 217 {6440, 32, 115, 31, 28, 30, 56, 27, 24, 44, 37}, 218 {6430, 31, 116, 31, 28, 30, 55, 27, 24, 44, 37}, 219 {6420, 31, 116, 31, 28, 30, 55, 27, 24, 44, 37}, 220 {6410, 31, 116, 31, 27, 30, 55, 27, 24, 44, 37}, 221 {6400, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36}, 222 {6390, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36}, 223 {6380, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36}, 224 {6370, 31, 115, 30, 27, 30, 55, 26, 23, 43, 36}, 225 {6360, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36}, 226 {6350, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36}, 227 {6340, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36}, 228 {6330, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36}, 229 {6320, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36}, 230 {6310, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36}, 231 {6300, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36}, 232 {6290, 31, 113, 30, 27, 29, 54, 26, 23, 43, 36}, 233 {6280, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36}, 234 {6270, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36}, 235 {6260, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36}, 236 {6250, 31, 112, 30, 27, 29, 54, 26, 23, 42, 36}, 237 {6240, 30, 113, 30, 27, 29, 54, 26, 23, 42, 36}, 238 {6230, 30, 112, 30, 27, 29, 54, 26, 23, 42, 35}, 239 {6220, 30, 112, 30, 27, 29, 53, 26, 23, 42, 35}, 240 {6210, 30, 112, 30, 27, 29, 53, 26, 23, 42, 35}, 241 {6200, 30, 112, 29, 27, 29, 53, 26, 23, 42, 35}, 242 {6190, 30, 111, 29, 27, 29, 53, 26, 23, 42, 35}, 243 {6180, 30, 111, 29, 27, 29, 53, 26, 23, 42, 35}, 244 {6170, 30, 111, 29, 26, 29, 53, 26, 23, 42, 35}, 245 {6160, 30, 111, 29, 26, 29, 53, 26, 23, 42, 35}, 246 {6150, 30, 110, 29, 26, 29, 53, 26, 23, 42, 35}, 247 {6140, 30, 110, 29, 26, 29, 52, 26, 23, 42, 35}, 248 {6130, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35}, 249 {6120, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35}, 250 {6110, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35}, 251 {6100, 30, 109, 29, 26, 29, 52, 25, 22, 41, 35}, 252 {6090, 30, 109, 29, 26, 29, 52, 25, 22, 41, 35}, 253 {6080, 30, 109, 29, 26, 28, 53, 25, 22, 41, 35}, 254 {6070, 30, 109, 29, 26, 28, 52, 25, 22, 41, 34}, 255 {6060, 30, 108, 29, 26, 28, 52, 25, 22, 41, 34}, 256 {6050, 30, 108, 29, 26, 28, 52, 25, 22, 41, 34}, 257 {6040, 29, 109, 29, 26, 28, 52, 25, 22, 41, 34}, 258 {6030, 29, 109, 29, 26, 28, 52, 25, 22, 41, 34}, 259 {6020, 29, 108, 29, 26, 28, 52, 25, 22, 41, 34}, 260 {6010, 29, 108, 29, 26, 28, 52, 25, 22, 41, 34}, 261 {6000, 29, 108, 28, 26, 28, 51, 25, 22, 41, 34}, 262 {5990, 29, 108, 28, 26, 28, 51, 25, 22, 41, 34}, 263 {5980, 29, 107, 28, 26, 28, 51, 25, 22, 41, 34}, 264 {5970, 29, 107, 28, 26, 28, 51, 25, 22, 41, 34}, 265 {5960, 29, 107, 28, 26, 28, 51, 25, 22, 40, 34}, 266 {5950, 29, 107, 28, 26, 28, 51, 25, 22, 40, 34}, 267 {5940, 29, 107, 28, 25, 28, 51, 25, 22, 40, 34}, 268 {5930, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34}, 269 {5920, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34}, 270 {5910, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34}, 271 {5900, 29, 106, 28, 25, 28, 50, 24, 22, 40, 33}, 272 {5890, 29, 105, 28, 25, 28, 50, 24, 22, 40, 33}, 273 {5880, 29, 105, 28, 25, 28, 50, 24, 22, 40, 33}, 274 {5870, 29, 105, 28, 25, 27, 51, 24, 22, 40, 33}, 275 {5860, 29, 105, 28, 25, 27, 51, 24, 21, 40, 33}, 276 {5850, 29, 104, 28, 25, 27, 50, 24, 21, 40, 33}, 277 {5840, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33}, 278 {5830, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33}, 279 {5820, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33}, 280 {5810, 28, 104, 28, 25, 27, 50, 24, 21, 39, 33}, 281 {5800, 28, 104, 27, 25, 27, 50, 24, 21, 39, 33}, 282 {5790, 28, 104, 27, 25, 27, 50, 24, 21, 39, 33}, 283 {5780, 28, 104, 27, 25, 27, 49, 24, 21, 39, 33}, 284 {5770, 28, 104, 27, 25, 27, 49, 24, 21, 39, 33}, 285 {5760, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33}, 286 {5750, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33}, 287 {5740, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33}, 288 {5730, 28, 103, 27, 25, 27, 49, 24, 21, 39, 32}, 289 {5720, 28, 102, 27, 25, 27, 49, 24, 21, 39, 32}, 290 {5710, 28, 102, 27, 25, 27, 48, 24, 21, 39, 32}, 291 {5700, 28, 102, 27, 24, 27, 48, 24, 21, 39, 32}, 292 {5690, 28, 102, 27, 24, 27, 48, 24, 21, 39, 32}, 293 {5680, 28, 101, 27, 24, 27, 48, 24, 21, 39, 32}, 294 {5670, 28, 101, 27, 24, 27, 48, 23, 21, 38, 32}, 295 {5660, 28, 101, 27, 24, 26, 49, 23, 21, 38, 32}, 296 {5650, 28, 101, 27, 24, 26, 49, 23, 21, 38, 32}, 297 {5640, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32}, 298 {5630, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32}, 299 {5620, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32}, 300 {5610, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32}, 301 {5600, 27, 101, 26, 24, 26, 48, 23, 20, 38, 32}, 302 {5590, 27, 100, 26, 24, 26, 48, 23, 20, 38, 32}, 303 {5580, 27, 100, 26, 24, 26, 48, 23, 20, 38, 32}, 304 {5570, 27, 100, 26, 24, 26, 48, 23, 20, 38, 31}, 305 {5560, 27, 100, 26, 24, 26, 47, 23, 20, 38, 31}, 306 {5550, 27, 99, 26, 24, 26, 47, 23, 20, 38, 31}, 307 {5540, 27, 99, 26, 24, 26, 47, 23, 20, 38, 31}, 308 {5530, 27, 99, 26, 24, 26, 47, 23, 20, 38, 31}, 309 {5520, 27, 99, 26, 24, 26, 47, 23, 20, 37, 31}, 310 {5510, 27, 98, 26, 24, 26, 47, 23, 20, 37, 31}, 311 {5500, 27, 98, 26, 24, 26, 47, 23, 20, 37, 31}, 312 {5490, 27, 98, 26, 24, 26, 46, 23, 20, 37, 31}, 313 {5480, 27, 98, 26, 24, 26, 46, 23, 20, 37, 31}, 314 {5470, 27, 97, 26, 23, 26, 46, 23, 20, 37, 31}, 315 {5460, 27, 97, 26, 23, 26, 46, 23, 20, 37, 31}, 316 {5450, 27, 97, 26, 23, 25, 47, 23, 20, 37, 31}, 317 {5440, 26, 98, 26, 23, 25, 47, 23, 20, 37, 31}, 318 {5430, 26, 98, 26, 23, 25, 47, 22, 20, 37, 31}, 319 {5420, 26, 97, 26, 23, 25, 46, 22, 20, 37, 31}, 320 {5410, 26, 97, 26, 23, 25, 46, 22, 20, 37, 31}, 321 {5400, 26, 97, 25, 23, 25, 46, 22, 20, 37, 30}, 322 {5390, 26, 97, 25, 23, 25, 46, 22, 20, 37, 30}, 323 {5380, 26, 96, 25, 23, 25, 46, 22, 20, 36, 30}, 324 {5370, 26, 96, 25, 23, 25, 46, 22, 20, 36, 30}, 325 {5360, 26, 96, 25, 23, 25, 46, 22, 20, 36, 30}, 326 {5350, 26, 96, 25, 23, 25, 46, 22, 20, 36, 30}, 327 {5340, 26, 95, 25, 23, 25, 45, 22, 20, 36, 30}, 328 {5330, 26, 95, 25, 23, 25, 45, 22, 19, 36, 30}, 329 {5320, 26, 95, 25, 23, 25, 45, 22, 19, 36, 30}, 330 {5310, 26, 95, 25, 23, 25, 45, 22, 19, 36, 30}, 331 {5300, 26, 95, 25, 23, 25, 45, 22, 19, 36, 30}, 332 {5290, 26, 94, 25, 23, 25, 45, 22, 19, 36, 30}, 333 {5280, 26, 94, 25, 23, 25, 45, 22, 19, 36, 30}, 334 {5270, 26, 94, 25, 23, 25, 44, 22, 19, 36, 30}, 335 {5260, 26, 94, 25, 23, 25, 44, 22, 19, 36, 30}, 336 {5250, 25, 94, 25, 23, 24, 45, 22, 19, 36, 30}, 337 {5240, 25, 94, 25, 23, 24, 45, 22, 19, 36, 29}, 338 {5230, 25, 94, 25, 22, 24, 45, 22, 19, 35, 29}, 339 {5220, 25, 94, 25, 22, 24, 45, 22, 19, 35, 29}, 340 {5210, 25, 93, 25, 22, 24, 45, 22, 19, 35, 29}, 341 {5200, 25, 93, 24, 22, 24, 44, 21, 19, 35, 29}, 342 {5190, 25, 93, 24, 22, 24, 44, 21, 19, 35, 29}, 343 {5180, 25, 93, 24, 22, 24, 44, 21, 19, 35, 29}, 344 {5170, 25, 92, 24, 22, 24, 44, 21, 19, 35, 29}, 345 {5160, 25, 92, 24, 22, 24, 44, 21, 19, 35, 29}, 346 {5150, 25, 92, 24, 22, 24, 44, 21, 19, 35, 29}, 347 {5140, 25, 92, 24, 22, 24, 44, 21, 19, 35, 29}, 348 {5130, 25, 92, 24, 22, 24, 43, 21, 19, 35, 29}, 349 {5120, 25, 91, 24, 22, 24, 43, 21, 19, 35, 29}, 350 {5110, 25, 91, 24, 22, 24, 43, 21, 19, 35, 29}, 351 {5100, 25, 91, 24, 22, 24, 43, 21, 19, 35, 29}, 352 {5090, 25, 91, 24, 22, 24, 43, 21, 19, 34, 29}, 353 {5080, 25, 90, 24, 22, 24, 43, 21, 19, 34, 29}, 354 {5070, 25, 90, 24, 22, 24, 43, 21, 19, 34, 28}, 355 {5060, 25, 90, 24, 22, 24, 43, 21, 18, 34, 28}, 356 {5050, 24, 91, 24, 22, 24, 42, 21, 18, 34, 28}, 357 {5040, 24, 90, 24, 22, 23, 43, 21, 18, 34, 28}, 358 {5030, 24, 90, 24, 22, 23, 43, 21, 18, 34, 28}, 359 {5020, 24, 90, 24, 22, 23, 43, 21, 18, 34, 28}, 360 {5010, 24, 90, 24, 22, 23, 43, 21, 18, 34, 28}, 361 {5000, 24, 89, 23, 21, 23, 43, 21, 18, 34, 28}, 362 {4990, 24, 89, 23, 21, 23, 43, 21, 18, 34, 28}, 363 {4980, 24, 89, 23, 21, 23, 42, 21, 18, 34, 28}, 364 {4970, 24, 89, 23, 21, 23, 42, 21, 18, 34, 28}, 365 {4960, 24, 89, 23, 21, 23, 42, 20, 18, 34, 28}, 366 {4950, 24, 88, 23, 21, 23, 42, 20, 18, 34, 28}, 367 {4940, 24, 88, 23, 21, 23, 42, 20, 18, 33, 28}, 368 {4930, 24, 88, 23, 21, 23, 42, 20, 18, 33, 28}, 369 {4920, 24, 88, 23, 21, 23, 42, 20, 18, 33, 28}, 370 {4910, 24, 87, 23, 21, 23, 41, 20, 18, 33, 28}, 371 {4900, 24, 87, 23, 21, 23, 41, 20, 18, 33, 27}, 372 {4890, 24, 87, 23, 21, 23, 41, 20, 18, 33, 27}, 373 {4880, 24, 87, 23, 21, 23, 41, 20, 18, 33, 27}, 374 {4870, 24, 86, 23, 21, 23, 41, 20, 18, 33, 27}, 375 {4860, 24, 86, 23, 21, 23, 41, 20, 18, 33, 27}, 376 {4850, 23, 87, 23, 21, 23, 41, 20, 18, 33, 27}, 377 {4840, 23, 87, 23, 21, 23, 40, 20, 18, 33, 27}, 378 {4830, 23, 86, 23, 21, 22, 41, 20, 18, 33, 27}, 379 {4820, 23, 86, 23, 21, 22, 41, 20, 18, 33, 27}, 380 {4810, 23, 86, 23, 21, 22, 41, 20, 18, 33, 27}, 381 {4800, 23, 86, 22, 21, 22, 41, 20, 17, 32, 27}, 382 {4790, 23, 86, 22, 21, 22, 41, 20, 17, 32, 27}, 383 {4780, 23, 85, 22, 21, 22, 41, 20, 17, 32, 27}, 384 {4770, 23, 85, 22, 21, 22, 41, 20, 17, 32, 27}, 385 {4760, 23, 85, 22, 20, 22, 40, 20, 17, 32, 27}, 386 {4750, 23, 85, 22, 20, 22, 40, 20, 17, 32, 27}, 387 {4740, 23, 84, 22, 20, 22, 40, 20, 17, 32, 26}, 388 {4730, 23, 84, 22, 20, 22, 40, 19, 17, 32, 26}, 389 {4720, 23, 84, 22, 20, 22, 40, 19, 17, 32, 26}, 390 {4710, 23, 84, 22, 20, 22, 40, 19, 17, 32, 26}, 391 {4700, 23, 83, 22, 20, 22, 40, 19, 17, 32, 26}, 392 {4690, 23, 83, 22, 20, 22, 39, 19, 17, 32, 26}, 393 {4680, 23, 83, 22, 20, 22, 39, 19, 17, 32, 26}, 394 {4670, 23, 83, 22, 20, 22, 39, 19, 17, 32, 26}, 395 {4660, 23, 82, 22, 20, 22, 39, 19, 17, 32, 26}, 396 {4650, 22, 83, 22, 20, 22, 39, 19, 17, 31, 26}, 397 {4640, 22, 83, 22, 20, 22, 39, 19, 17, 31, 26}, 398 {4630, 22, 83, 22, 20, 22, 39, 19, 17, 31, 26}, 399 {4620, 22, 83, 22, 20, 21, 39, 19, 17, 31, 26}, 400 {4610, 22, 82, 22, 20, 21, 39, 19, 17, 31, 26}, 401 {4600, 22, 82, 21, 20, 21, 39, 19, 17, 31, 26}, 402 {4590, 22, 82, 21, 20, 21, 39, 19, 17, 31, 26}, 403 {4580, 22, 82, 21, 20, 21, 39, 19, 17, 31, 26}, 404 {4570, 22, 81, 21, 20, 21, 39, 19, 17, 31, 25}, 405 {4560, 22, 81, 21, 20, 21, 39, 19, 17, 31, 25}, 406 {4550, 22, 81, 21, 20, 21, 38, 19, 17, 31, 25}, 407 {4540, 22, 81, 21, 20, 21, 38, 19, 17, 31, 25}, 408 {4530, 22, 80, 21, 19, 21, 38, 19, 16, 31, 25}, 409 {4520, 22, 80, 21, 19, 21, 38, 19, 16, 31, 25}, 410 {4510, 22, 80, 21, 19, 21, 38, 19, 16, 31, 25}, 411 {4500, 22, 80, 21, 19, 21, 38, 19, 16, 30, 25}, 412 {4490, 22, 80, 21, 19, 21, 38, 18, 16, 30, 25}, 413 {4480, 22, 79, 21, 19, 21, 38, 18, 16, 30, 25}, 414 {4470, 22, 79, 21, 19, 21, 37, 18, 16, 30, 25}, 415 {4460, 22, 79, 21, 19, 21, 37, 18, 16, 30, 25}, 416 {4450, 21, 80, 21, 19, 21, 37, 18, 16, 30, 25}, 417 {4440, 21, 79, 21, 19, 21, 37, 18, 16, 30, 25}, 418 {4430, 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11}, 651 {2100, 10, 35, 9, 9, 9, 17, 8, 7, 14, 11}, 652 {2090, 10, 35, 9, 9, 9, 17, 8, 7, 14, 11}, 653 {2080, 9, 36, 9, 9, 9, 16, 8, 7, 14, 11}, 654 {2070, 9, 36, 9, 9, 9, 16, 8, 7, 14, 10}, 655 {2060, 9, 35, 9, 9, 9, 16, 8, 7, 14, 10}, 656 {2050, 9, 35, 9, 9, 9, 16, 8, 7, 14, 10}, 657 {2040, 9, 35, 9, 9, 9, 16, 8, 7, 14, 10}, 658 {2030, 9, 35, 9, 9, 9, 16, 8, 7, 13, 10}, 659 {2020, 9, 35, 9, 9, 9, 16, 8, 7, 13, 10}, 660 {2010, 9, 34, 9, 9, 9, 15, 8, 7, 13, 10}, 661 {2000, 9, 34, 8, 9, 9, 15, 8, 7, 13, 10}, 662 {1990, 9, 34, 8, 9, 9, 15, 8, 7, 13, 10}, 663 {1980, 9, 34, 8, 9, 9, 15, 8, 7, 13, 10}, 664 {1970, 9, 33, 8, 9, 9, 15, 8, 7, 13, 10}, 665 {1960, 9, 33, 8, 9, 9, 15, 8, 7, 13, 10}, 666 {1950, 9, 33, 8, 8, 9, 15, 8, 7, 13, 10}, 667 {1940, 9, 33, 8, 8, 9, 15, 8, 7, 13, 10}, 668 {1930, 9, 32, 8, 8, 9, 14, 8, 7, 13, 10}, 669 {1920, 9, 32, 8, 8, 9, 14, 8, 7, 13, 10}, 670 {1910, 9, 32, 8, 8, 8, 15, 7, 7, 13, 9}, 671 {1900, 9, 32, 8, 8, 8, 15, 7, 7, 13, 9}, 672 {1890, 9, 31, 8, 8, 8, 15, 7, 7, 12, 9}, 673 {1880, 8, 32, 8, 8, 8, 15, 7, 7, 12, 9}, 674 {1870, 8, 32, 8, 8, 8, 15, 7, 7, 12, 9}, 675 {1860, 8, 32, 8, 8, 8, 14, 7, 6, 12, 9}, 676 {1850, 8, 32, 8, 8, 8, 14, 7, 6, 12, 9}, 677 {1840, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9}, 678 {1830, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9}, 679 {1820, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9}, 680 {1810, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9}, 681 {1800, 8, 30, 7, 8, 8, 14, 7, 6, 12, 9}, 682 {1790, 8, 30, 7, 8, 8, 13, 7, 6, 12, 9}, 683 {1780, 8, 30, 7, 8, 8, 13, 7, 6, 12, 9}, 684 {1770, 8, 30, 7, 8, 8, 13, 7, 6, 12, 9}, 685 {1760, 8, 29, 7, 8, 8, 13, 7, 6, 12, 9}, 686 {1750, 8, 29, 7, 8, 8, 13, 7, 6, 12, 9}, 687 {1740, 8, 29, 7, 8, 8, 13, 7, 6, 11, 8}, 688 {1730, 8, 29, 7, 8, 8, 13, 7, 6, 11, 8}, 689 {1720, 8, 29, 7, 7, 8, 13, 7, 6, 11, 8}, 690 {1710, 8, 28, 7, 7, 8, 12, 7, 6, 11, 8}, 691 {1700, 8, 28, 7, 7, 7, 13, 7, 6, 11, 8}, 692 {1690, 8, 28, 7, 7, 7, 13, 7, 6, 11, 8}, 693 {1680, 7, 29, 7, 7, 7, 13, 6, 6, 11, 8}, 694 {1670, 7, 28, 7, 7, 7, 13, 6, 6, 11, 8}, 695 {1660, 7, 28, 7, 7, 7, 13, 6, 6, 11, 8}, 696 {1650, 7, 28, 7, 7, 7, 13, 6, 6, 11, 8}, 697 {1640, 7, 28, 7, 7, 7, 12, 6, 6, 11, 8}, 698 {1630, 7, 27, 7, 7, 7, 12, 6, 6, 11, 8}, 699 {1620, 7, 27, 7, 7, 7, 12, 6, 6, 11, 8}, 700 {1610, 7, 27, 7, 7, 7, 12, 6, 6, 11, 8}, 701 {1600, 7, 27, 6, 7, 7, 12, 6, 5, 10, 8}, 702 {1590, 7, 26, 6, 7, 7, 12, 6, 5, 10, 8}, 703 {1580, 7, 26, 6, 7, 7, 12, 6, 5, 10, 7}, 704 {1570, 7, 26, 6, 7, 7, 11, 6, 5, 10, 7}, 705 {1560, 7, 26, 6, 7, 7, 11, 6, 5, 10, 7}, 706 {1550, 7, 26, 6, 7, 7, 11, 6, 5, 10, 7}, 707 {1540, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7}, 708 {1530, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7}, 709 {1520, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7}, 710 {1510, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7}, 711 {1500, 7, 24, 6, 7, 7, 10, 6, 5, 10, 7}, 712 {1490, 59, 25, 6, 77, 59, 10, 70, 44, 9, 73}, 713 {1480, 59, 24, 6, 76, 58, 10, 70, 44, 9, 73}, 714 {1470, 58, 24, 6, 76, 58, 10, 69, 44, 9, 72}, 715 {1460, 58, 24, 6, 76, 58, 10, 69, 43, 9, 72}, 716 {1450, 58, 24, 6, 75, 57, 10, 68, 43, 9, 71}, 717 {1440, 57, 24, 6, 75, 57, 10, 68, 43, 9, 71}, 718 {1430, 57, 23, 6, 75, 57, 10, 68, 43, 8, 70}, 719 {1420, 56, 23, 6, 74, 57, 9, 67, 43, 8, 70}, 720 {1410, 56, 23, 6, 74, 57, 9, 67, 43, 8, 69}, 721 {1400, 56, 23, 5, 74, 55, 9, 67, 41, 8, 69}, 722 {1390, 55, 23, 5, 73, 55, 9, 66, 41, 8, 68}, 723 {1380, 55, 23, 5, 73, 54, 9, 66, 41, 8, 68}, 724 {1370, 54, 22, 5, 72, 54, 9, 66, 41, 8, 67}, 725 {1360, 54, 22, 5, 72, 54, 9, 65, 40, 8, 67}, 726 {1350, 54, 22, 5, 72, 53, 9, 65, 40, 8, 66}, 727 {1340, 53, 22, 5, 71, 53, 9, 65, 40, 8, 66}, 728 {1330, 53, 22, 5, 71, 53, 9, 64, 39, 8, 65}, 729 {1320, 52, 22, 5, 71, 53, 8, 64, 40, 8, 65}, 730 {1310, 52, 21, 5, 70, 53, 8, 64, 40, 8, 64}, 731 {1300, 51, 21, 5, 70, 51, 8, 63, 38, 8, 64}, 732 {1290, 51, 21, 5, 70, 51, 8, 63, 38, 7, 64}, 733 {1280, 51, 21, 5, 69, 51, 8, 63, 38, 7, 63}, 734 {1270, 50, 21, 5, 69, 50, 8, 62, 38, 7, 63}, 735 {1260, 50, 20, 5, 69, 50, 8, 62, 37, 7, 62}, 736 {1250, 49, 20, 5, 68, 49, 8, 62, 37, 7, 62}, 737 {1240, 49, 20, 5, 68, 49, 8, 61, 37, 7, 61}, 738 {1230, 49, 20, 5, 68, 49, 8, 61, 36, 7, 61}, 739 {1220, 48, 20, 5, 67, 48, 8, 61, 36, 7, 60}, 740 {1210, 48, 19, 5, 67, 48, 7, 60, 36, 7, 60}, 741 {1200, 49, 19, 4, 67, 49, 7, 60, 36, 7, 59}, 742 {1190, 48, 19, 4, 66, 48, 7, 60, 36, 7, 59}, 743 {1180, 48, 19, 4, 66, 48, 7, 59, 36, 7, 58}, 744 {1170, 46, 19, 4, 66, 46, 7, 59, 35, 7, 58}, 745 {1160, 46, 18, 4, 65, 46, 7, 59, 34, 7, 57}, 746 {1150, 45, 18, 4, 65, 46, 7, 58, 34, 7, 57}, 747 {1140, 45, 18, 4, 65, 45, 7, 58, 34, 6, 56}, 748 {1130, 45, 18, 4, 64, 45, 7, 58, 33, 6, 56}, 749 {1120, 44, 18, 4, 64, 44, 7, 57, 33, 6, 55}, 750 {1110, 44, 18, 4, 64, 44, 7, 57, 33, 6, 55}, 751 {1100, 43, 17, 4, 63, 44, 6, 57, 32, 6, 54}, 752 {1090, 43, 17, 4, 63, 44, 6, 56, 33, 6, 54}, 753 {1080, 43, 17, 4, 63, 44, 6, 56, 33, 6, 53}, 754 {1070, 42, 17, 4, 62, 44, 6, 56, 33, 6, 53}, 755 {1060, 42, 17, 4, 62, 42, 6, 55, 31, 6, 52}, 756 {1050, 41, 17, 4, 62, 42, 6, 55, 31, 6, 52}, 757 {1040, 41, 16, 4, 61, 41, 6, 54, 31, 6, 52}, 758 {1030, 41, 16, 4, 61, 41, 6, 54, 30, 6, 51}, 759 {1020, 40, 16, 4, 61, 41, 6, 54, 30, 6, 51}, 760 {1010, 40, 16, 4, 60, 40, 6, 53, 30, 6, 50}, 761 {1000, 39, 16, 3, 60, 40, 6, 53, 29, 5, 50}, 762 { 990, 39, 15, 3, 60, 39, 6, 53, 29, 5, 49}, 763 { 980, 39, 15, 3, 59, 39, 5, 52, 29, 5, 49}, 764 { 970, 38, 15, 3, 59, 39, 5, 52, 29, 5, 48}, 765 { 960, 38, 15, 3, 59, 39, 5, 52, 29, 5, 48}, 766 { 950, 37, 15, 3, 58, 39, 5, 51, 29, 5, 47}, 767 { 940, 37, 14, 3, 58, 39, 5, 51, 29, 5, 47}, 768 { 930, 37, 14, 3, 57, 37, 5, 51, 27, 5, 46}, 769 { 920, 36, 14, 3, 57, 37, 5, 50, 27, 5, 46}, 770 { 910, 36, 14, 3, 57, 36, 5, 50, 27, 5, 45}, 771 { 900, 35, 14, 3, 56, 36, 5, 50, 26, 5, 45}, 772 { 890, 35, 14, 3, 56, 36, 5, 49, 26, 5, 44}, 773 { 880, 35, 13, 3, 56, 35, 5, 49, 26, 5, 44}, 774 { 870, 34, 13, 3, 55, 35, 4, 49, 26, 5, 43}, 775 { 860, 34, 13, 3, 55, 35, 4, 48, 25, 5, 43}, 776 { 850, 33, 13, 3, 55, 35, 4, 48, 26, 4, 42}, 777 { 840, 33, 13, 3, 54, 35, 4, 48, 26, 4, 42}, 778 { 830, 33, 12, 3, 54, 33, 4, 47, 24, 4, 41}, 779 { 820, 32, 12, 3, 54, 33, 4, 47, 24, 4, 41}, 780 { 810, 32, 12, 3, 53, 33, 4, 47, 24, 4, 40}, 781 { 800, 31, 12, 2, 53, 32, 4, 46, 23, 4, 40}, 782 { 790, 31, 12, 2, 53, 32, 4, 46, 23, 4, 39}, 783 { 780, 30, 12, 2, 52, 31, 4, 46, 23, 4, 39}, 784 { 770, 30, 11, 2, 52, 31, 4, 45, 23, 4, 39}, 785 { 760, 30, 11, 2, 52, 31, 3, 45, 22, 4, 38}, 786 { 750, 29, 11, 2, 51, 30, 3, 45, 22, 4, 38}, 787 { 740, 29, 11, 2, 51, 30, 3, 44, 22, 4, 37}, 788 { 730, 28, 11, 2, 51, 31, 3, 44, 22, 4, 37}, 789 { 720, 28, 10, 2, 50, 30, 3, 44, 22, 4, 36}, 790 { 710, 28, 10, 2, 50, 30, 3, 43, 22, 4, 36}, 791 { 700, 27, 10, 2, 50, 28, 3, 43, 20, 3, 35}, 792 { 690, 27, 10, 2, 49, 28, 3, 43, 20, 3, 35}, 793 { 680, 26, 10, 2, 49, 28, 3, 42, 20, 3, 34}, 794 { 670, 26, 10, 2, 49, 27, 3, 42, 20, 3, 34}, 795 { 660, 26, 9, 2, 48, 27, 3, 42, 19, 3, 33}, 796 { 650, 25, 9, 2, 48, 26, 3, 41, 19, 3, 33}, 797 { 640, 25, 9, 2, 48, 26, 2, 41, 19, 3, 32}, 798 { 630, 24, 9, 2, 47, 26, 2, 40, 18, 3, 32}, 799 { 620, 24, 9, 2, 47, 26, 2, 40, 19, 3, 31}, 800 { 610, 24, 8, 2, 47, 26, 2, 40, 19, 3, 31}, 801 { 600, 23, 8, 1, 46, 26, 2, 39, 18, 3, 30}, 802 { 590, 23, 8, 1, 46, 24, 2, 39, 17, 3, 30}, 803 { 580, 22, 8, 1, 46, 24, 2, 39, 17, 3, 29}, 804 { 570, 22, 8, 1, 45, 23, 2, 38, 17, 3, 29}, 805 { 560, 22, 7, 1, 45, 23, 2, 38, 16, 2, 28}, 806 { 550, 21, 7, 1, 45, 23, 2, 38, 16, 2, 28}, 807 { 540, 21, 7, 1, 44, 22, 2, 37, 16, 2, 27}, 808 { 530, 20, 7, 1, 44, 22, 1, 37, 15, 2, 27}, 809 { 520, 20, 7, 1, 43, 21, 1, 37, 15, 2, 27}, 810 { 510, 20, 6, 1, 43, 21, 1, 36, 15, 2, 26}, 811 { 500, 19, 6, 1, 43, 22, 1, 36, 15, 2, 26}, 812 { 490, 19, 6, 1, 42, 21, 1, 36, 15, 2, 25}, 813 { 480, 18, 6, 1, 42, 21, 1, 35, 15, 2, 25}, 814 { 470, 18, 6, 1, 42, 21, 1, 35, 15, 2, 24}, 815 { 460, 18, 6, 1, 41, 19, 1, 35, 13, 2, 24}, 816 { 450, 17, 5, 1, 41, 19, 1, 34, 13, 2, 23}, 817 { 440, 17, 5, 1, 41, 18, 1, 34, 13, 2, 23}, 818 { 430, 16, 5, 1, 40, 18, 0, 34, 12, 2, 22}, 819 { 420, 16, 5, 1, 40, 18, 0, 33, 12, 2, 22}, 820 { 410, 16, 5, 1, 40, 17, 0, 33, 12, 1, 21}, 821 { 400, 15, 5, 0, 39, 17, 0, 33, 11, 1, 21}, 822 { 390, 15, 4, 0, 39, 17, 0, 32, 12, 1, 20}, 823 { 380, 14, 4, 0, 39, 17, 0, 32, 12, 1, 20}, 824 { 370, 14, 4, 0, 38, 17, 0, 32, 12, 1, 19}, 825 { 360, 14, 4, 0, 38, 15, 0, 31, 10, 1, 19}, 826 { 350, 13, 4, 0, 38, 15, 0, 31, 10, 1, 18}, 827 { 340, 13, 3, 0, 37, 15, 0, 31, 10, 1, 18}, 828 { 330, 12, 3, 0, 37, 14, 0, 30, 9, 1, 17}, 829 { 320, 12, 3, 0, 37, 14, 0, 30, 9, 1, 17}, 830 { 310, 12, 3, 0, 36, 13, 0, 30, 9, 1, 16}, 831 { 300, 11, 3, 0, 36, 13, 0, 29, 8, 1, 16}, 832 { 290, 11, 2, 0, 36, 13, 0, 29, 8, 1, 15}, 833 { 280, 10, 2, 0, 35, 12, 0, 29, 8, 1, 15}, 834 { 270, 10, 2, 0, 35, 12, 0, 28, 8, 0, 14}, 835 { 260, 9, 2, 0, 35, 12, 0, 28, 8, 0, 14}, 836 { 250, 9, 2, 0, 34, 12, 0, 28, 8, 0, 14}, 837 { 240, 9, 2, 0, 34, 12, 0, 27, 8, 0, 13}, 838 { 230, 8, 1, 0, 34, 10, 0, 27, 6, 0, 13}, 839 { 220, 8, 1, 0, 33, 10, 0, 27, 6, 0, 12}, 840 { 210, 7, 1, 0, 33, 10, 0, 26, 6, 0, 12}, 841 { 200, 7, 1, 0, 33, 9, 0, 26, 5, 0, 11}, 842 { 190, 7, 1, 0, 32, 9, 0, 25, 5, 0, 11}, 843 { 180, 6, 1, 0, 32, 8, 0, 25, 5, 0, 10}, 844 { 170, 6, 0, 0, 32, 8, 0, 25, 5, 0, 10}, 845 { 160, 5, 0, 0, 31, 8, 0, 24, 4, 0, 9}, 846 { 150, 5, 0, 0, 31, 8, 0, 24, 5, 0, 9}, 847 { 140, 5, 0, 0, 31, 8, 0, 24, 5, 0, 8}, 848 { 130, 4, 0, 0, 30, 6, 0, 23, 3, 0, 8}, 849 { 120, 4, 0, 0, 30, 6, 0, 23, 3, 0, 7}, 850 { 110, 3, 0, 0, 30, 6, 0, 23, 3, 0, 7}, 851 { 100, 3, 0, 0, 29, 5, 0, 22, 2, 0, 6}, 852 { 90, 3, 0, 0, 29, 5, 0, 22, 2, 0, 6}, 853 { 80, 2, 0, 0, 28, 5, 0, 22, 2, 0, 5}, 854 }; 855 856 static const 857 struct samsung_mipi_cphy_timing samsung_mipi_cphy_timing_table[] = { 858 { 3500, 39, 50, 25, 29, 54, 1 }, 859 { 3490, 39, 50, 25, 29, 54, 1 }, 860 { 3480, 39, 50, 25, 29, 54, 1 }, 861 { 3470, 39, 50, 25, 29, 54, 1 }, 862 { 3460, 39, 50, 25, 29, 54, 1 }, 863 { 3450, 39, 50, 25, 29, 54, 1 }, 864 { 3440, 38, 50, 25, 29, 54, 1 }, 865 { 3430, 38, 50, 25, 29, 53, 1 }, 866 { 3420, 38, 50, 25, 29, 53, 1 }, 867 { 3410, 38, 50, 25, 29, 53, 1 }, 868 { 3400, 38, 50, 25, 29, 53, 1 }, 869 { 3390, 38, 50, 25, 29, 53, 1 }, 870 { 3380, 38, 50, 25, 28, 53, 1 }, 871 { 3370, 38, 50, 25, 28, 52, 1 }, 872 { 3360, 37, 50, 25, 28, 52, 1 }, 873 { 3350, 37, 50, 25, 28, 52, 1 }, 874 { 3340, 37, 50, 25, 28, 52, 1 }, 875 { 3330, 37, 50, 25, 28, 52, 1 }, 876 { 3320, 37, 50, 25, 28, 52, 1 }, 877 { 3310, 37, 50, 25, 28, 52, 1 }, 878 { 3300, 37, 50, 25, 28, 51, 1 }, 879 { 3290, 37, 50, 25, 28, 51, 1 }, 880 { 3280, 37, 50, 25, 28, 51, 1 }, 881 { 3270, 36, 50, 25, 28, 51, 1 }, 882 { 3260, 36, 50, 25, 27, 51, 1 }, 883 { 3250, 36, 50, 25, 27, 51, 1 }, 884 { 3240, 36, 50, 25, 27, 50, 1 }, 885 { 3230, 36, 50, 25, 27, 50, 1 }, 886 { 3220, 36, 50, 25, 27, 50, 1 }, 887 { 3210, 36, 50, 25, 27, 50, 1 }, 888 { 3200, 36, 50, 25, 27, 50, 1 }, 889 { 3190, 36, 50, 25, 27, 50, 1 }, 890 { 3180, 35, 50, 25, 27, 49, 1 }, 891 { 3170, 35, 50, 25, 27, 49, 1 }, 892 { 3160, 35, 50, 25, 27, 49, 1 }, 893 { 3150, 35, 50, 25, 26, 49, 1 }, 894 { 3140, 35, 50, 25, 26, 49, 1 }, 895 { 3130, 35, 50, 25, 26, 49, 1 }, 896 { 3120, 35, 50, 25, 26, 49, 1 }, 897 { 3110, 35, 50, 25, 26, 48, 1 }, 898 { 3100, 34, 50, 25, 26, 48, 1 }, 899 { 3090, 34, 50, 25, 26, 48, 1 }, 900 { 3080, 34, 50, 25, 26, 48, 1 }, 901 { 3070, 34, 50, 25, 26, 48, 1 }, 902 { 3060, 34, 50, 25, 26, 48, 1 }, 903 { 3050, 34, 50, 25, 26, 47, 1 }, 904 { 3040, 34, 50, 25, 26, 47, 1 }, 905 { 3030, 34, 50, 25, 25, 47, 1 }, 906 { 3020, 34, 50, 25, 25, 47, 1 }, 907 { 3010, 33, 50, 25, 25, 47, 1 }, 908 { 3000, 33, 50, 25, 25, 47, 1 }, 909 { 2990, 33, 50, 25, 25, 46, 1 }, 910 { 2980, 33, 50, 25, 25, 46, 1 }, 911 { 2970, 33, 50, 25, 25, 46, 1 }, 912 { 2960, 33, 50, 25, 25, 46, 1 }, 913 { 2950, 33, 50, 25, 25, 46, 1 }, 914 { 2940, 33, 50, 25, 25, 46, 1 }, 915 { 2930, 33, 50, 25, 25, 46, 1 }, 916 { 2920, 32, 50, 25, 25, 45, 1 }, 917 { 2910, 32, 50, 25, 24, 45, 1 }, 918 { 2900, 32, 50, 25, 24, 45, 1 }, 919 { 2890, 32, 50, 25, 24, 45, 1 }, 920 { 2880, 32, 50, 25, 24, 45, 1 }, 921 { 2870, 32, 50, 25, 24, 45, 1 }, 922 { 2860, 32, 50, 25, 24, 44, 1 }, 923 { 2850, 32, 50, 25, 24, 44, 1 }, 924 { 2840, 31, 50, 25, 24, 44, 1 }, 925 { 2830, 31, 50, 25, 24, 44, 1 }, 926 { 2820, 31, 50, 25, 24, 44, 1 }, 927 { 2810, 31, 50, 25, 24, 44, 1 }, 928 { 2800, 31, 50, 25, 23, 43, 1 }, 929 { 2790, 31, 50, 25, 23, 43, 1 }, 930 { 2780, 31, 50, 25, 23, 43, 1 }, 931 { 2770, 31, 50, 25, 23, 43, 1 }, 932 { 2760, 31, 50, 25, 23, 43, 1 }, 933 { 2750, 30, 50, 25, 23, 43, 1 }, 934 { 2740, 30, 50, 25, 23, 43, 1 }, 935 { 2730, 30, 50, 25, 23, 42, 1 }, 936 { 2720, 30, 50, 25, 23, 42, 1 }, 937 { 2710, 30, 50, 25, 23, 42, 1 }, 938 { 2700, 30, 50, 25, 23, 42, 1 }, 939 { 2690, 30, 50, 25, 23, 42, 1 }, 940 { 2680, 30, 50, 25, 22, 42, 1 }, 941 { 2670, 30, 50, 25, 22, 41, 1 }, 942 { 2660, 29, 50, 25, 22, 41, 1 }, 943 { 2650, 29, 50, 25, 22, 41, 1 }, 944 { 2640, 29, 50, 25, 22, 41, 1 }, 945 { 2630, 29, 50, 25, 22, 41, 1 }, 946 { 2620, 29, 50, 25, 22, 41, 1 }, 947 { 2610, 29, 50, 25, 22, 41, 1 }, 948 { 2600, 29, 50, 25, 22, 40, 1 }, 949 { 2590, 29, 50, 25, 22, 40, 1 }, 950 { 2580, 28, 50, 25, 22, 40, 1 }, 951 { 2570, 28, 50, 25, 22, 40, 1 }, 952 { 2560, 28, 50, 25, 21, 40, 1 }, 953 { 2550, 28, 50, 25, 21, 40, 1 }, 954 { 2540, 28, 50, 25, 21, 39, 1 }, 955 { 2530, 28, 50, 25, 21, 39, 1 }, 956 { 2520, 28, 50, 25, 21, 39, 1 }, 957 { 2510, 28, 50, 25, 21, 39, 1 }, 958 { 2500, 28, 50, 25, 21, 39, 1 }, 959 { 2490, 27, 50, 25, 21, 39, 1 }, 960 { 2480, 27, 50, 25, 21, 38, 1 }, 961 { 2470, 27, 50, 25, 21, 38, 1 }, 962 { 2460, 27, 50, 25, 21, 38, 1 }, 963 { 2450, 27, 50, 25, 20, 38, 1 }, 964 { 2440, 27, 50, 25, 20, 38, 1 }, 965 { 2430, 27, 50, 25, 20, 38, 1 }, 966 { 2420, 27, 50, 25, 20, 38, 1 }, 967 { 2410, 27, 50, 25, 20, 37, 1 }, 968 { 2400, 26, 50, 25, 20, 37, 1 }, 969 { 2390, 26, 50, 25, 20, 37, 1 }, 970 { 2380, 26, 50, 25, 20, 37, 1 }, 971 { 2370, 26, 50, 25, 20, 37, 1 }, 972 { 2360, 26, 50, 25, 20, 37, 1 }, 973 { 2350, 26, 50, 25, 20, 36, 1 }, 974 { 2340, 26, 50, 25, 20, 36, 1 }, 975 { 2330, 26, 50, 25, 19, 36, 1 }, 976 { 2320, 25, 50, 25, 19, 36, 1 }, 977 { 2310, 25, 50, 25, 19, 36, 1 }, 978 { 2300, 25, 50, 25, 19, 36, 1 }, 979 { 2290, 25, 50, 25, 19, 35, 1 }, 980 { 2280, 25, 50, 25, 19, 35, 1 }, 981 { 2270, 25, 50, 25, 19, 35, 1 }, 982 { 2260, 25, 50, 25, 19, 35, 1 }, 983 { 2250, 25, 50, 25, 19, 35, 1 }, 984 { 2240, 25, 50, 25, 19, 35, 1 }, 985 { 2230, 24, 50, 25, 19, 35, 1 }, 986 { 2220, 24, 50, 25, 19, 34, 1 }, 987 { 2210, 24, 50, 25, 18, 34, 1 }, 988 { 2200, 24, 50, 25, 18, 34, 1 }, 989 { 2190, 24, 50, 25, 18, 34, 1 }, 990 { 2180, 24, 50, 25, 18, 34, 1 }, 991 { 2170, 24, 50, 25, 18, 34, 1 }, 992 { 2160, 24, 50, 25, 18, 33, 1 }, 993 { 2150, 24, 50, 25, 18, 33, 1 }, 994 { 2140, 23, 50, 25, 18, 33, 1 }, 995 { 2130, 23, 50, 25, 18, 33, 1 }, 996 { 2120, 23, 50, 25, 18, 33, 1 }, 997 { 2110, 23, 50, 25, 18, 33, 1 }, 998 { 2100, 23, 50, 25, 17, 32, 1 }, 999 { 2090, 23, 50, 25, 17, 32, 1 }, 1000 { 2080, 23, 50, 25, 17, 32, 1 }, 1001 { 2070, 23, 50, 25, 17, 32, 1 }, 1002 { 2060, 22, 50, 25, 17, 32, 1 }, 1003 { 2050, 22, 50, 25, 17, 32, 1 }, 1004 { 2040, 22, 50, 25, 17, 32, 1 }, 1005 { 2030, 22, 50, 25, 17, 31, 1 }, 1006 { 2020, 22, 50, 25, 17, 31, 1 }, 1007 { 2010, 22, 50, 25, 17, 31, 1 }, 1008 { 2000, 22, 50, 25, 17, 31, 1 }, 1009 { 1990, 22, 50, 25, 17, 31, 1 }, 1010 { 1980, 22, 50, 25, 16, 31, 1 }, 1011 { 1970, 21, 50, 25, 16, 30, 1 }, 1012 { 1960, 21, 50, 25, 16, 30, 1 }, 1013 { 1950, 21, 50, 25, 16, 30, 1 }, 1014 { 1940, 21, 50, 25, 16, 30, 1 }, 1015 { 1930, 21, 50, 25, 16, 30, 1 }, 1016 { 1920, 21, 50, 25, 16, 30, 1 }, 1017 { 1910, 21, 50, 25, 16, 30, 1 }, 1018 { 1900, 21, 50, 25, 16, 29, 1 }, 1019 { 1890, 21, 50, 25, 16, 29, 1 }, 1020 { 1880, 20, 50, 25, 16, 29, 1 }, 1021 { 1870, 20, 50, 25, 16, 29, 1 }, 1022 { 1860, 20, 50, 25, 15, 29, 1 }, 1023 { 1850, 20, 50, 25, 15, 29, 1 }, 1024 { 1840, 20, 50, 25, 15, 28, 1 }, 1025 { 1830, 20, 50, 25, 15, 28, 1 }, 1026 { 1820, 20, 50, 25, 15, 28, 1 }, 1027 { 1810, 20, 50, 25, 15, 28, 1 }, 1028 { 1800, 19, 50, 25, 15, 28, 1 }, 1029 { 1790, 19, 50, 25, 15, 28, 1 }, 1030 { 1780, 19, 50, 25, 15, 27, 1 }, 1031 { 1770, 19, 50, 25, 15, 27, 1 }, 1032 { 1760, 19, 50, 25, 15, 27, 1 }, 1033 { 1750, 19, 50, 25, 14, 27, 1 }, 1034 { 1740, 19, 50, 25, 14, 27, 1 }, 1035 { 1730, 19, 50, 25, 14, 27, 1 }, 1036 { 1720, 19, 50, 25, 14, 27, 1 }, 1037 { 1710, 18, 50, 25, 14, 26, 1 }, 1038 { 1700, 18, 50, 25, 14, 26, 1 }, 1039 { 1690, 18, 50, 25, 14, 26, 1 }, 1040 { 1680, 18, 50, 25, 14, 26, 1 }, 1041 { 1670, 18, 50, 25, 14, 26, 1 }, 1042 { 1660, 18, 50, 25, 14, 26, 1 }, 1043 { 1650, 18, 50, 25, 14, 25, 1 }, 1044 { 1640, 18, 50, 25, 14, 25, 1 }, 1045 { 1630, 18, 50, 25, 13, 25, 1 }, 1046 { 1620, 17, 50, 25, 13, 25, 1 }, 1047 { 1610, 17, 50, 25, 13, 25, 1 }, 1048 { 1600, 17, 50, 25, 13, 25, 1 }, 1049 { 1590, 17, 50, 25, 13, 24, 1 }, 1050 { 1580, 17, 50, 25, 13, 24, 1 }, 1051 { 1570, 17, 50, 25, 13, 24, 1 }, 1052 { 1560, 17, 50, 25, 13, 24, 1 }, 1053 { 1550, 17, 50, 25, 13, 24, 1 }, 1054 { 1540, 16, 50, 25, 13, 24, 1 }, 1055 { 1530, 16, 50, 25, 13, 24, 1 }, 1056 { 1520, 16, 50, 25, 13, 23, 1 }, 1057 { 1510, 16, 50, 25, 12, 23, 1 }, 1058 { 1500, 16, 50, 25, 12, 23, 1 }, 1059 { 1490, 16, 50, 25, 12, 23, 1 }, 1060 { 1480, 16, 50, 25, 12, 23, 1 }, 1061 { 1470, 16, 50, 25, 12, 23, 1 }, 1062 { 1460, 16, 50, 25, 12, 22, 1 }, 1063 { 1450, 15, 50, 25, 12, 22, 1 }, 1064 { 1440, 15, 50, 25, 12, 22, 1 }, 1065 { 1430, 15, 50, 25, 12, 22, 1 }, 1066 { 1420, 15, 50, 25, 12, 22, 1 }, 1067 { 1410, 15, 50, 25, 12, 22, 1 }, 1068 { 1400, 15, 50, 25, 11, 21, 1 }, 1069 { 1390, 15, 50, 25, 11, 21, 1 }, 1070 { 1380, 15, 50, 25, 11, 21, 1 }, 1071 { 1370, 15, 50, 25, 11, 21, 1 }, 1072 { 1360, 14, 50, 25, 11, 21, 1 }, 1073 { 1350, 14, 50, 25, 11, 21, 1 }, 1074 { 1340, 14, 50, 25, 11, 21, 1 }, 1075 { 1330, 14, 50, 25, 11, 20, 1 }, 1076 { 1320, 14, 50, 25, 11, 20, 1 }, 1077 { 1310, 14, 50, 25, 11, 20, 1 }, 1078 { 1300, 14, 50, 25, 11, 20, 1 }, 1079 { 1290, 14, 50, 25, 11, 20, 1 }, 1080 { 1280, 13, 50, 25, 10, 20, 1 }, 1081 { 1270, 13, 50, 25, 10, 19, 1 }, 1082 { 1260, 13, 50, 25, 10, 19, 1 }, 1083 { 1250, 13, 50, 25, 10, 19, 1 }, 1084 { 1240, 13, 50, 25, 10, 19, 1 }, 1085 { 1230, 13, 50, 25, 10, 19, 1 }, 1086 { 1220, 13, 50, 25, 10, 19, 1 }, 1087 { 1210, 13, 50, 25, 10, 19, 1 }, 1088 { 1200, 13, 50, 25, 10, 18, 1 }, 1089 { 1190, 12, 50, 25, 10, 18, 1 }, 1090 { 1180, 12, 50, 25, 10, 18, 1 }, 1091 { 1170, 12, 50, 25, 10, 18, 1 }, 1092 { 1160, 12, 50, 25, 9, 18, 1 }, 1093 { 1150, 12, 50, 25, 9, 18, 1 }, 1094 { 1140, 12, 50, 25, 9, 17, 1 }, 1095 { 1130, 12, 50, 25, 9, 17, 1 }, 1096 { 1120, 12, 50, 25, 9, 17, 1 }, 1097 { 1110, 12, 50, 25, 9, 17, 1 }, 1098 { 1100, 11, 50, 25, 9, 17, 1 }, 1099 { 1090, 11, 50, 25, 9, 17, 1 }, 1100 { 1080, 11, 50, 25, 9, 16, 1 }, 1101 { 1070, 11, 50, 25, 9, 16, 1 }, 1102 { 1060, 11, 50, 25, 9, 16, 1 }, 1103 { 1050, 11, 50, 25, 8, 16, 1 }, 1104 { 1040, 11, 50, 25, 8, 16, 1 }, 1105 { 1030, 11, 50, 25, 8, 16, 1 }, 1106 { 1020, 10, 50, 25, 8, 16, 1 }, 1107 { 1010, 10, 50, 25, 8, 15, 1 }, 1108 { 1000, 10, 50, 25, 8, 15, 1 }, 1109 { 990, 10, 50, 25, 8, 15, 2 }, 1110 { 980, 10, 50, 25, 8, 15, 2 }, 1111 { 970, 10, 50, 25, 8, 15, 2 }, 1112 { 960, 10, 50, 25, 8, 15, 2 }, 1113 { 950, 10, 50, 25, 8, 14, 2 }, 1114 { 940, 10, 50, 25, 8, 14, 2 }, 1115 { 930, 9, 50, 25, 7, 14, 2 }, 1116 { 920, 9, 50, 25, 7, 14, 2 }, 1117 { 910, 9, 50, 25, 7, 14, 2 }, 1118 { 900, 9, 50, 25, 7, 14, 2 }, 1119 { 890, 9, 50, 25, 7, 13, 2 }, 1120 { 880, 9, 50, 25, 7, 13, 2 }, 1121 { 870, 9, 50, 25, 7, 13, 2 }, 1122 { 860, 9, 50, 25, 7, 13, 2 }, 1123 { 850, 9, 50, 25, 7, 13, 2 }, 1124 { 840, 8, 50, 25, 7, 13, 2 }, 1125 { 830, 8, 50, 25, 7, 13, 2 }, 1126 { 820, 8, 50, 25, 7, 12, 2 }, 1127 { 810, 8, 50, 25, 6, 12, 2 }, 1128 { 800, 8, 50, 25, 6, 12, 2 }, 1129 { 790, 8, 50, 25, 6, 12, 2 }, 1130 { 780, 8, 50, 25, 6, 12, 2 }, 1131 { 770, 8, 50, 25, 6, 12, 2 }, 1132 { 760, 7, 50, 25, 6, 11, 2 }, 1133 { 750, 7, 50, 25, 6, 11, 2 }, 1134 { 740, 7, 50, 25, 6, 11, 2 }, 1135 { 730, 7, 50, 25, 6, 11, 2 }, 1136 { 720, 7, 50, 25, 6, 11, 2 }, 1137 { 710, 7, 50, 25, 6, 11, 2 }, 1138 { 700, 7, 50, 25, 5, 10, 2 }, 1139 { 690, 7, 50, 25, 5, 10, 2 }, 1140 { 680, 7, 50, 25, 5, 10, 2 }, 1141 { 670, 6, 50, 25, 5, 10, 2 }, 1142 { 660, 6, 50, 25, 5, 10, 2 }, 1143 { 650, 6, 50, 25, 5, 10, 2 }, 1144 { 640, 6, 50, 25, 5, 10, 2 }, 1145 { 630, 6, 50, 25, 5, 9, 2 }, 1146 { 620, 6, 50, 25, 5, 9, 2 }, 1147 { 610, 6, 50, 25, 5, 9, 2 }, 1148 { 600, 6, 50, 25, 5, 9, 2 }, 1149 { 590, 6, 50, 25, 5, 9, 2 }, 1150 { 580, 5, 50, 25, 4, 9, 2 }, 1151 { 570, 5, 50, 25, 4, 8, 2 }, 1152 { 560, 5, 50, 25, 4, 8, 2 }, 1153 { 550, 5, 50, 25, 4, 8, 2 }, 1154 { 540, 5, 50, 25, 4, 8, 2 }, 1155 { 530, 5, 50, 25, 4, 8, 2 }, 1156 { 520, 5, 50, 25, 4, 8, 2 }, 1157 { 510, 5, 50, 25, 4, 8, 2 }, 1158 { 500, 4, 50, 25, 4, 7, 2 }, 1159 { 490, 18, 50, 25, 14, 6, 2 }, 1160 { 480, 17, 50, 25, 14, 6, 2 }, 1161 { 470, 17, 50, 25, 14, 6, 2 }, 1162 { 460, 17, 50, 25, 13, 6, 2 }, 1163 { 450, 16, 50, 25, 13, 6, 2 }, 1164 { 440, 16, 50, 25, 13, 6, 2 }, 1165 { 430, 15, 50, 25, 12, 6, 2 }, 1166 { 420, 15, 50, 25, 12, 5, 2 }, 1167 { 410, 15, 50, 25, 12, 5, 2 }, 1168 { 400, 14, 50, 25, 11, 5, 2 }, 1169 { 390, 14, 50, 25, 11, 5, 2 }, 1170 { 380, 13, 50, 25, 11, 5, 2 }, 1171 { 370, 13, 50, 25, 11, 5, 2 }, 1172 { 360, 13, 50, 25, 10, 4, 2 }, 1173 { 350, 12, 50, 25, 10, 4, 2 }, 1174 { 340, 12, 50, 25, 10, 4, 2 }, 1175 { 330, 11, 50, 25, 9, 4, 2 }, 1176 { 320, 11, 50, 25, 9, 4, 2 }, 1177 { 310, 11, 50, 25, 9, 4, 2 }, 1178 { 300, 10, 50, 25, 8, 3, 2 }, 1179 { 290, 10, 50, 25, 8, 3, 2 }, 1180 { 280, 9, 50, 25, 8, 3, 2 }, 1181 { 270, 9, 50, 25, 8, 3, 2 }, 1182 { 260, 8, 50, 25, 7, 3, 2 }, 1183 { 250, 8, 50, 25, 7, 3, 2 }, 1184 { 240, 8, 50, 25, 7, 3, 2 }, 1185 { 230, 7, 50, 25, 6, 2, 2 }, 1186 { 220, 7, 50, 25, 6, 2, 2 }, 1187 { 210, 6, 50, 25, 6, 2, 2 }, 1188 { 200, 6, 50, 25, 5, 2, 2 }, 1189 { 190, 6, 50, 25, 5, 2, 2 }, 1190 { 180, 5, 50, 25, 5, 2, 2 }, 1191 { 170, 5, 50, 25, 5, 1, 2 }, 1192 { 160, 4, 50, 25, 4, 1, 2 }, 1193 { 150, 4, 50, 25, 4, 1, 2 }, 1194 { 140, 4, 50, 25, 4, 1, 2 }, 1195 { 130, 3, 50, 25, 3, 1, 2 }, 1196 { 120, 3, 50, 25, 3, 1, 2 }, 1197 { 110, 2, 50, 25, 3, 1, 2 }, 1198 { 100, 2, 50, 25, 2, 0, 2 }, 1199 { 90, 2, 50, 25, 2, 0, 2 }, 1200 { 80, 1, 50, 25, 2, 0, 2 }, 1201 }; 1202 1203 static inline void 1204 phy_write(struct samsung_mipi_dcphy *samsung, u32 reg, u32 val) 1205 { 1206 writel(val, samsung->base + reg); 1207 } 1208 1209 static inline u32 phy_read(struct samsung_mipi_dcphy *samsung, u32 reg) 1210 { 1211 return readl(samsung->base + reg); 1212 } 1213 1214 static inline void phy_update_bits(struct samsung_mipi_dcphy *samsung, 1215 u32 reg, u32 mask, u32 val) 1216 { 1217 u32 orig, tmp; 1218 1219 orig = phy_read(samsung, reg); 1220 tmp = orig & ~mask; 1221 tmp |= val & mask; 1222 phy_write(samsung, reg, tmp); 1223 } 1224 1225 static inline void grf_write(struct samsung_mipi_dcphy *samsung, 1226 u32 reg, u32 val) 1227 { 1228 regmap_write(samsung->grf, reg, val); 1229 } 1230 1231 static const struct samsung_mipi_dphy_timing * 1232 samsung_mipi_dphy_get_timing(struct samsung_mipi_dcphy *samsung) 1233 { 1234 const struct samsung_mipi_dphy_timing *timings; 1235 unsigned int num_timings; 1236 unsigned int lane_mbps = samsung->pll.rate / USEC_PER_SEC; 1237 unsigned int i; 1238 1239 timings = samsung_mipi_dphy_timing_table; 1240 num_timings = ARRAY_SIZE(samsung_mipi_dphy_timing_table); 1241 1242 for (i = num_timings; i > 0; i--) 1243 if (lane_mbps <= timings[i - 1].max_lane_mbps) 1244 break; 1245 1246 if (i == 0) 1247 ++i; 1248 1249 return &timings[i - 1]; 1250 } 1251 1252 static const struct samsung_mipi_cphy_timing * 1253 samsung_mipi_cphy_get_timing(struct samsung_mipi_dcphy *samsung) 1254 { 1255 const struct samsung_mipi_cphy_timing *timings; 1256 unsigned int num_timings; 1257 unsigned int lane_msps = div64_ul(samsung->pll.rate, USEC_PER_SEC); 1258 unsigned int i; 1259 1260 timings = samsung_mipi_cphy_timing_table; 1261 num_timings = ARRAY_SIZE(samsung_mipi_cphy_timing_table); 1262 1263 for (i = num_timings; i > 0; i--) 1264 if (lane_msps <= timings[i - 1].max_lane_msps) 1265 break; 1266 1267 if (i == 0) 1268 ++i; 1269 1270 return &timings[i - 1]; 1271 } 1272 1273 static void samsung_mipi_dcphy_bias_block_enable(struct samsung_mipi_dcphy *samsung) 1274 { 1275 phy_write(samsung, BIAS_CON0, 0x0010); 1276 phy_write(samsung, BIAS_CON1, 0x0110); 1277 phy_write(samsung, BIAS_CON2, 0x3223); 1278 1279 if (samsung->c_option) 1280 phy_update_bits(samsung, BIAS_CON4, I_MUX_SEL_MASK, I_MUX_SEL(2)); 1281 } 1282 1283 static void samsung_mipi_dcphy_bias_block_disable(struct samsung_mipi_dcphy *samsung) 1284 { 1285 } 1286 1287 static void samsung_mipi_dcphy_pll_configure(struct samsung_mipi_dcphy *samsung) 1288 { 1289 phy_update_bits(samsung, PLL_CON0, S_MASK | P_MASK, 1290 S(samsung->pll.scaler) | P(samsung->pll.prediv)); 1291 1292 if (samsung->pll.dsm < 0) { 1293 u16 dsm_tmp; 1294 1295 /* Using opposite number subtraction to find complement */ 1296 dsm_tmp = abs(samsung->pll.dsm); 1297 dsm_tmp = dsm_tmp - 1; 1298 dsm_tmp ^= 0xffff; 1299 phy_write(samsung, PLL_CON1, dsm_tmp); 1300 } else { 1301 phy_write(samsung, PLL_CON1, samsung->pll.dsm); 1302 } 1303 1304 phy_update_bits(samsung, PLL_CON2, M_MASK, M(samsung->pll.fbdiv)); 1305 1306 if (samsung->pll.ssc_en) { 1307 phy_write(samsung, PLL_CON3, 1308 MRR(samsung->pll.mrr) | MFR(samsung->pll.mfr)); 1309 phy_update_bits(samsung, PLL_CON4, SSCG_EN, SSCG_EN); 1310 } 1311 1312 phy_write(samsung, PLL_CON5, RESET_N_SEL | PLL_ENABLE_SEL); 1313 phy_write(samsung, PLL_CON7, PLL_LOCK_CNT(0xf000)); 1314 phy_write(samsung, PLL_CON8, PLL_STB_CNT(0xf000)); 1315 } 1316 1317 static void 1318 samsung_mipi_dphy_clk_lane_timing_init(struct samsung_mipi_dcphy *samsung) 1319 { 1320 const struct samsung_mipi_dphy_timing *timing; 1321 unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC); 1322 u32 val = 0; 1323 1324 timing = samsung_mipi_dphy_get_timing(samsung); 1325 phy_write(samsung, DPHY_MC_GNR_CON0, 0xf000); 1326 phy_write(samsung, DPHY_MC_ANA_CON0, 0x7133); 1327 1328 if (lane_hs_rate >= 4500) 1329 phy_write(samsung, DPHY_MC_ANA_CON1, 0x0001); 1330 1331 /* 1332 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under 1333 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock 1334 */ 1335 if (lane_hs_rate < 1500) 1336 val = HSTX_CLK_SEL; 1337 1338 val |= T_LPX(timing->lpx); 1339 /* T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */ 1340 phy_write(samsung, DPHY_MC_TIME_CON0, val); 1341 1342 val = T_CLK_ZERO(timing->clk_zero) | T_CLK_PREPARE(timing->clk_prepare); 1343 phy_write(samsung, DPHY_MC_TIME_CON1, val); 1344 1345 val = T_HS_EXIT(timing->hs_exit) | T_CLK_TRAIL(timing->clk_trail_eot); 1346 phy_write(samsung, DPHY_MC_TIME_CON2, val); 1347 1348 val = T_CLK_POST(timing->clk_post); 1349 phy_write(samsung, DPHY_MC_TIME_CON3, val); 1350 1351 /* Escape Clock is 20.00MHz */ 1352 phy_write(samsung, DPHY_MC_TIME_CON4, 0x1f4); 1353 1354 /* 1355 * skew calibration should be off, if the operation data rate is 1356 * under 1.5Gbps or equal to 1.5Gbps. 1357 */ 1358 if (lane_hs_rate > 1500) 1359 phy_write(samsung, DPHY_MC_DESKEW_CON0, 0x9cb1); 1360 } 1361 1362 static void 1363 samsung_mipi_dphy_data_lane_timing_init(struct samsung_mipi_dcphy *samsung) 1364 { 1365 const struct samsung_mipi_dphy_timing *timing; 1366 unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC); 1367 u32 val = 0; 1368 1369 timing = samsung_mipi_dphy_get_timing(samsung); 1370 1371 phy_write(samsung, COMBO_MD0_ANA_CON0, 0x7133); 1372 phy_write(samsung, COMBO_MD1_ANA_CON0, 0x7133); 1373 phy_write(samsung, COMBO_MD2_ANA_CON0, 0x7133); 1374 phy_write(samsung, DPHY_MD3_ANA_CON0, 0x7133); 1375 1376 if (lane_hs_rate >= 1500) { 1377 phy_write(samsung, COMBO_MD0_ANA_CON1, 0x0001); 1378 phy_write(samsung, COMBO_MD1_ANA_CON1, 0x0001); 1379 phy_write(samsung, COMBO_MD2_ANA_CON1, 0x0001); 1380 phy_write(samsung, DPHY_MD3_ANA_CON1, 0x0001); 1381 } 1382 1383 /* 1384 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under 1385 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock 1386 */ 1387 if (lane_hs_rate < 1500) 1388 val = HSTX_CLK_SEL; 1389 1390 val |= T_LPX(timing->lpx); 1391 /* T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */ 1392 phy_write(samsung, COMBO_MD0_TIME_CON0, val); 1393 phy_write(samsung, COMBO_MD1_TIME_CON0, val); 1394 phy_write(samsung, COMBO_MD2_TIME_CON0, val); 1395 phy_write(samsung, DPHY_MD3_TIME_CON0, val); 1396 1397 val = T_HS_ZERO(timing->hs_zero) | T_HS_PREPARE(timing->hs_prepare); 1398 phy_write(samsung, COMBO_MD0_TIME_CON1, val); 1399 phy_write(samsung, COMBO_MD1_TIME_CON1, val); 1400 phy_write(samsung, COMBO_MD2_TIME_CON1, val); 1401 phy_write(samsung, DPHY_MD3_TIME_CON1, val); 1402 1403 val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->hs_trail_eot); 1404 phy_write(samsung, COMBO_MD0_TIME_CON2, val); 1405 phy_write(samsung, COMBO_MD1_TIME_CON2, val); 1406 phy_write(samsung, COMBO_MD2_TIME_CON2, val); 1407 phy_write(samsung, DPHY_MD3_TIME_CON2, val); 1408 1409 /* TTA-GET/TTA-GO Timing Counter register use default value */ 1410 val = T_TA_GET(0x3) | T_TA_GO(0x0); 1411 phy_write(samsung, COMBO_MD0_TIME_CON3, val); 1412 phy_write(samsung, COMBO_MD1_TIME_CON3, val); 1413 phy_write(samsung, COMBO_MD2_TIME_CON3, val); 1414 phy_write(samsung, DPHY_MD3_TIME_CON3, val); 1415 1416 /* Escape Clock is 20.00MHz */ 1417 phy_write(samsung, COMBO_MD0_TIME_CON4, 0x1f4); 1418 phy_write(samsung, COMBO_MD1_TIME_CON4, 0x1f4); 1419 phy_write(samsung, COMBO_MD2_TIME_CON4, 0x1f4); 1420 phy_write(samsung, DPHY_MD3_TIME_CON4, 0x1f4); 1421 } 1422 1423 static void samsung_mipi_dcphy_pll_enable(struct samsung_mipi_dcphy *samsung) 1424 { 1425 u32 sts; 1426 int ret; 1427 1428 phy_update_bits(samsung, PLL_CON0, PLL_EN, PLL_EN); 1429 1430 ret = readl_poll_timeout(samsung->base + PLL_STAT0, 1431 sts, (sts & PLL_LOCK), 20000); 1432 if (ret < 0) 1433 dev_err(samsung->dev, "DC-PHY pll is not locked\n"); 1434 } 1435 1436 static void samsung_mipi_dcphy_pll_disable(struct samsung_mipi_dcphy *samsung) 1437 { 1438 phy_update_bits(samsung, PLL_CON0, PLL_EN, 0); 1439 } 1440 1441 static void samsung_mipi_dphy_lane_enable(struct samsung_mipi_dcphy *samsung) 1442 { 1443 phy_write(samsung, DPHY_MC_GNR_CON1, T_PHY_READY(0x2000)); 1444 phy_update_bits(samsung, DPHY_MC_GNR_CON0, PHY_ENABLE, PHY_ENABLE); 1445 1446 switch (samsung->lanes) { 1447 case 4: 1448 phy_write(samsung, DPHY_MD3_GNR_CON1, T_PHY_READY(0x2000)); 1449 phy_update_bits(samsung, DPHY_MD3_GNR_CON0, 1450 PHY_ENABLE, PHY_ENABLE); 1451 //fallthrough; 1452 case 3: 1453 phy_write(samsung, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000)); 1454 phy_update_bits(samsung, COMBO_MD2_GNR_CON0, 1455 PHY_ENABLE, PHY_ENABLE); 1456 //fallthrough; 1457 case 2: 1458 phy_write(samsung, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000)); 1459 phy_update_bits(samsung, COMBO_MD1_GNR_CON0, 1460 PHY_ENABLE, PHY_ENABLE); 1461 //fallthrough; 1462 case 1: 1463 default: 1464 phy_write(samsung, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000)); 1465 phy_update_bits(samsung, COMBO_MD0_GNR_CON0, 1466 PHY_ENABLE, PHY_ENABLE); 1467 break; 1468 } 1469 } 1470 1471 static void samsung_mipi_cphy_timing_init(struct samsung_mipi_dcphy *samsung) 1472 { 1473 const struct samsung_mipi_cphy_timing *timing; 1474 unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC); 1475 u32 val = 0; 1476 1477 timing = samsung_mipi_cphy_get_timing(samsung); 1478 1479 /* 1480 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under 1481 * 500Msps, otherwise divide-by-16 Clock from Serial Clock 1482 */ 1483 if (lane_hs_rate < 500) 1484 val = HSTX_CLK_SEL; 1485 1486 val |= T_LPX(timing->lpx); 1487 /* T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */ 1488 phy_write(samsung, COMBO_MD0_TIME_CON0, val); 1489 phy_write(samsung, COMBO_MD1_TIME_CON0, val); 1490 phy_write(samsung, COMBO_MD2_TIME_CON0, val); 1491 1492 val = T_HS_ZERO(timing->prebegin_3) | T_HS_PREPARE(timing->prepare_3); 1493 phy_write(samsung, COMBO_MD0_TIME_CON1, val); 1494 phy_write(samsung, COMBO_MD1_TIME_CON1, val); 1495 phy_write(samsung, COMBO_MD2_TIME_CON1, val); 1496 1497 val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->post_3); 1498 phy_write(samsung, DPHY_MD3_TIME_CON2, val); 1499 phy_write(samsung, COMBO_MD0_TIME_CON2, val); 1500 phy_write(samsung, COMBO_MD1_TIME_CON2, val); 1501 phy_write(samsung, COMBO_MD2_TIME_CON2, val); 1502 1503 /* TTA-GET/TTA-GO Timing Counter register use default value */ 1504 val = T_TA_GET(0x3) | T_TA_GO(0x0); 1505 phy_write(samsung, COMBO_MD0_TIME_CON3, val); 1506 phy_write(samsung, COMBO_MD1_TIME_CON3, val); 1507 phy_write(samsung, COMBO_MD2_TIME_CON3, val); 1508 1509 /* Escape Clock is 20.00MHz */ 1510 phy_write(samsung, COMBO_MD0_TIME_CON4, 0x1f4); 1511 phy_write(samsung, COMBO_MD1_TIME_CON4, 0x1f4); 1512 phy_write(samsung, COMBO_MD2_TIME_CON4, 0x1f4); 1513 1514 /* set T_ERR_SOT_SYNC default value */ 1515 } 1516 1517 static void samsung_mipi_cphy_lane_enable(struct samsung_mipi_dcphy *samsung) 1518 { 1519 phy_write(samsung, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000)); 1520 phy_write(samsung, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000)); 1521 phy_write(samsung, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000)); 1522 1523 phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, PHY_ENABLE); 1524 phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, PHY_ENABLE); 1525 phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, PHY_ENABLE); 1526 } 1527 1528 static void 1529 samsung_mipi_dcphy_hs_vreg_amp_config(struct samsung_mipi_dcphy *samsung) 1530 { 1531 phy_write(samsung, DPHY_MC_ANA_CON2, HS_VREG_AMP_ICON(2)); 1532 } 1533 1534 static void samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung) 1535 { 1536 reset_assert(&samsung->m_phy_rst); 1537 1538 samsung_mipi_dcphy_bias_block_enable(samsung); 1539 samsung_mipi_dcphy_pll_configure(samsung); 1540 samsung_mipi_dphy_clk_lane_timing_init(samsung); 1541 samsung_mipi_dphy_data_lane_timing_init(samsung); 1542 samsung_mipi_dcphy_pll_enable(samsung); 1543 samsung_mipi_dphy_lane_enable(samsung); 1544 1545 reset_deassert(&samsung->m_phy_rst); 1546 1547 /* The Tskewcal maximum is 100 usec at initial calibration. */ 1548 udelay(100); 1549 } 1550 1551 static void samsung_mipi_cphy_power_on(struct samsung_mipi_dcphy *samsung) 1552 { 1553 grf_write(samsung, MIPI_DCPHY_GRF_CON0, M_CPHY_MODE); 1554 reset_assert(&samsung->m_phy_rst); 1555 1556 samsung_mipi_dcphy_bias_block_enable(samsung); 1557 samsung_mipi_dcphy_hs_vreg_amp_config(samsung); 1558 samsung_mipi_dcphy_pll_configure(samsung); 1559 samsung_mipi_cphy_timing_init(samsung); 1560 samsung_mipi_dcphy_pll_enable(samsung); 1561 samsung_mipi_cphy_lane_enable(samsung); 1562 1563 reset_deassert(&samsung->m_phy_rst); 1564 } 1565 1566 static void samsung_mipi_dphy_lane_disable(struct samsung_mipi_dcphy *samsung) 1567 { 1568 phy_update_bits(samsung, DPHY_MC_GNR_CON0, PHY_ENABLE, 0); 1569 phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, 0); 1570 phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, 0); 1571 phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, 0); 1572 phy_update_bits(samsung, DPHY_MD3_GNR_CON0, PHY_ENABLE, 0); 1573 } 1574 1575 static void samsung_mipi_cphy_lane_disable(struct samsung_mipi_dcphy *samsung) 1576 { 1577 phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, 0); 1578 phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, 0); 1579 phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, 0); 1580 } 1581 1582 static int samsung_mipi_dcphy_power_on(struct rockchip_phy *phy) 1583 { 1584 struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev); 1585 1586 if (samsung->mode == PHY_MODE_MIPI_DPHY) 1587 samsung_mipi_dphy_power_on(samsung); 1588 else 1589 samsung_mipi_cphy_power_on(samsung); 1590 1591 return 0; 1592 } 1593 1594 static int samsung_mipi_dcphy_power_off(struct rockchip_phy *phy) 1595 { 1596 struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev); 1597 1598 if (samsung->mode == PHY_MODE_MIPI_DPHY) 1599 samsung_mipi_dphy_lane_disable(samsung); 1600 else 1601 samsung_mipi_cphy_lane_disable(samsung); 1602 1603 samsung_mipi_dcphy_pll_disable(samsung); 1604 samsung_mipi_dcphy_bias_block_disable(samsung); 1605 1606 return 0; 1607 } 1608 1609 static int 1610 samsung_mipi_dcphy_pll_ssc_modulation_calc(struct samsung_mipi_dcphy *samsung, 1611 u8 *mfr, u8 *mrr) 1612 { 1613 unsigned long fin = 24000; 1614 u16 prediv = samsung->pll.prediv; 1615 u16 fbdiv = samsung->pll.fbdiv; 1616 u16 min_mfr, max_mfr; 1617 u16 _mfr, best_mfr = 0; 1618 u16 mr, _mrr, best_mrr = 0; 1619 1620 /* 20KHz ≤ MF ≤ 150KHz */ 1621 max_mfr = DIV_ROUND_UP(fin, (20 * prediv) << 5); 1622 min_mfr = div64_ul(fin, ((150 * prediv) << 5)); 1623 /*0 ≤ mfr ≤ 255 */ 1624 if (max_mfr > 256) 1625 max_mfr = 256; 1626 1627 for (_mfr = min_mfr; _mfr < max_mfr; _mfr++) { 1628 /* 1 ≤ mrr ≤ 31 */ 1629 for (_mrr = 1; _mrr < 32; _mrr++) { 1630 mr = DIV_ROUND_UP(_mfr * _mrr * 100, fbdiv << 6); 1631 /* 0 ≤ MR ≤ 5% */ 1632 if (mr > 5) 1633 continue; 1634 1635 if (_mfr * _mrr < 513) { 1636 best_mfr = _mfr; 1637 best_mrr = _mrr; 1638 break; 1639 } 1640 } 1641 } 1642 1643 if (best_mrr) { 1644 *mfr = best_mfr & 0xff; 1645 *mrr = best_mrr & 0x3f; 1646 } else { 1647 dev_err(samsung->dev, "failed to calc ssc parameter mfr and mrr\n"); 1648 return -EINVAL; 1649 } 1650 1651 return 0; 1652 } 1653 1654 static unsigned long 1655 samsung_mipi_dcphy_pll_round_rate(struct samsung_mipi_dcphy *samsung, 1656 unsigned long prate, unsigned long rate, 1657 u8 *prediv, u16 *fbdiv, int *dsm, u8 *scaler) 1658 { 1659 u32 max_fout = samsung->c_option ? 1660 samsung->pdata->cphy_tx_max_ksps_per_lane : 1661 samsung->pdata->dphy_tx_max_kbps_per_lane; 1662 u64 best_freq = 0; 1663 u64 fin, fvco, fout; 1664 u8 min_prediv, max_prediv; 1665 u8 _prediv, best_prediv = 1; 1666 u16 _fbdiv, best_fbdiv = 1; 1667 u8 _scaler, best_scaler = 0; 1668 long _dsm, best_dsm = 0; 1669 u32 min_delta = 0xffffffff; 1670 1671 if (!prate) { 1672 dev_err(samsung->dev, "prate of pll can not be set zero\n"); 1673 return 0; 1674 } 1675 1676 /* 1677 * The PLL output frequency can be calculated using a simple formula: 1678 * Fvco = ((m+k/65536) x 2 x Fin) / p 1679 * Fout = ((m+k/65536) x 2 x Fin) / (p x 2^s) 1680 */ 1681 fin = div64_ul(prate, MSEC_PER_SEC); 1682 1683 while (!best_freq) { 1684 fout = div64_ul(rate, MSEC_PER_SEC); 1685 if (fout > max_fout) 1686 fout = max_fout; 1687 1688 /* 0 ≤ S[2:0] ≤ 6 */ 1689 for (_scaler = 0; _scaler < 7; _scaler++) { 1690 fvco = fout << _scaler; 1691 1692 /* 1693 * 2600MHz ≤ FVCO ≤ 6600MHz 1694 */ 1695 if (fvco < 2600 * MSEC_PER_SEC || fvco > 6600 * MSEC_PER_SEC) 1696 continue; 1697 1698 /* 6MHz ≤ Fref(Fin / p) ≤ 30MHz */ 1699 min_prediv = DIV_ROUND_UP(fin, 30 * MSEC_PER_SEC); 1700 max_prediv = DIV_ROUND_CLOSEST(fin, 6 * MSEC_PER_SEC); 1701 1702 for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) { 1703 u64 delta, tmp; 1704 1705 _fbdiv = DIV_ROUND_CLOSEST(fvco * _prediv, 2 * fin); 1706 1707 /* 64 ≤ M[9:0] ≤ 1023 */ 1708 if ((_fbdiv < 64) || (_fbdiv > 1023)) 1709 continue; 1710 1711 /* -32767 ≤ K[15:0] ≤ 32767 */ 1712 _dsm = ((_prediv * fvco) - (2 * _fbdiv * fin)); 1713 _dsm = DIV_ROUND_UP(_dsm << 15, fin); 1714 if (abs(_dsm) > 32767) 1715 continue; 1716 1717 tmp = DIV_ROUND_CLOSEST((_fbdiv * fin * 2 * 1000), _prediv); 1718 tmp += DIV_ROUND_CLOSEST((_dsm * fin * 1000), _prediv << 15); 1719 1720 delta = abs(fvco * MSEC_PER_SEC - tmp); 1721 if (delta < min_delta) { 1722 best_prediv = _prediv; 1723 best_fbdiv = _fbdiv; 1724 best_dsm = _dsm; 1725 best_scaler = _scaler; 1726 min_delta = delta; 1727 best_freq = DIV_ROUND_CLOSEST(tmp, 1000) * MSEC_PER_SEC; 1728 } 1729 } 1730 } 1731 1732 rate += 100 * MSEC_PER_SEC; 1733 } 1734 1735 *prediv = best_prediv; 1736 *fbdiv = best_fbdiv; 1737 *dsm = (int)best_dsm & 0xffff; 1738 *scaler = best_scaler; 1739 dev_info(samsung->dev, "p: %d, m: %d, dsm:%ld, scaler: %d\n", 1740 best_prediv, best_fbdiv, best_dsm, best_scaler); 1741 1742 return best_freq >> best_scaler; 1743 } 1744 1745 static unsigned long samsung_mipi_dcphy_set_pll(struct rockchip_phy *phy, 1746 unsigned long rate) 1747 { 1748 struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev); 1749 unsigned long fin = 24000000, fout; 1750 u8 scaler = 0, mfr = 0, mrr = 0; 1751 u16 fbdiv = 0; 1752 u8 prediv = 1; 1753 int dsm = 0; 1754 int ret; 1755 1756 samsung->c_option = (samsung->mode == PHY_MODE_MIPI_DPHY) ? false : true; 1757 fout = samsung_mipi_dcphy_pll_round_rate(samsung, fin, rate, &prediv, 1758 &fbdiv, &dsm, &scaler); 1759 1760 dev_info(samsung->dev, "fin=%lu, req_rate=%lu\n", fin, rate); 1761 dev_info(samsung->dev, "fout=%lu, prediv=%u, fbdiv=%u\n", fout, prediv, fbdiv); 1762 1763 samsung->pll.prediv = prediv; 1764 samsung->pll.fbdiv = fbdiv; 1765 samsung->pll.dsm = dsm; 1766 samsung->pll.scaler = scaler; 1767 samsung->pll.rate = fout; 1768 1769 /* 1770 * All DPHY 2.0 compliant Transmitters shall support SSC operating above 1771 * 2.5 Gbps 1772 */ 1773 if (fout > 2500000000LL) { 1774 ret = samsung_mipi_dcphy_pll_ssc_modulation_calc(samsung, 1775 &mfr, &mrr); 1776 if (!ret) { 1777 samsung->pll.ssc_en = true; 1778 samsung->pll.mfr = mfr; 1779 samsung->pll.mrr = mrr; 1780 } 1781 } 1782 1783 return fout; 1784 } 1785 1786 static int samsung_mipi_dcphy_set_mode(struct rockchip_phy *phy, 1787 enum phy_mode mode) 1788 { 1789 struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev); 1790 1791 samsung->mode = mode; 1792 1793 return 0; 1794 } 1795 1796 static int samsung_mipi_dcphy_probe(struct udevice *dev) 1797 { 1798 struct samsung_mipi_dcphy *samsung = dev_get_priv(dev); 1799 struct rockchip_phy *tmp_phy; 1800 struct rockchip_phy *phy; 1801 struct udevice *syscon; 1802 int ret; 1803 1804 phy = calloc(1, sizeof(*phy)); 1805 if (!phy) 1806 return -ENOMEM; 1807 1808 tmp_phy = (struct rockchip_phy *)dev_get_driver_data(dev); 1809 dev->driver_data = (ulong)phy; 1810 memcpy(phy, tmp_phy, sizeof(*phy)); 1811 1812 samsung->pdata = (struct samsung_mipi_dcphy_plat_data *)phy->data; 1813 samsung->lanes = ofnode_read_u32_default(dev->node, "samsung,lanes", 4); 1814 1815 samsung->base = dev_read_addr_ptr(dev); 1816 if (IS_ERR(samsung->base)) { 1817 dev_err(dev, "resource \"phy\" not found\n"); 1818 return PTR_ERR(samsung->base); 1819 } 1820 1821 ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf", 1822 &syscon); 1823 if (!ret) { 1824 samsung->grf = syscon_get_regmap(syscon); 1825 if (!samsung->grf) 1826 return -ENODEV; 1827 } 1828 1829 ret = reset_get_by_name(dev, "m_phy", &samsung->m_phy_rst); 1830 if (ret) { 1831 ret = reset_get_by_name(dev, "phy", &samsung->m_phy_rst); 1832 if (ret) { 1833 pr_err("reset_get_by_name(phy) failed: %d\n", ret); 1834 return ret; 1835 } 1836 } 1837 1838 phy->dev = dev; 1839 1840 return 0; 1841 } 1842 1843 static const struct rockchip_phy_funcs samsung_mipi_dcphy_funcs = { 1844 .power_on = samsung_mipi_dcphy_power_on, 1845 .power_off = samsung_mipi_dcphy_power_off, 1846 .set_pll = samsung_mipi_dcphy_set_pll, 1847 .set_mode = samsung_mipi_dcphy_set_mode, 1848 }; 1849 1850 static const struct samsung_mipi_dcphy_plat_data rk3576_samsung_mipi_dcphy_plat_data = { 1851 .dphy_tx_max_kbps_per_lane = 2500000L, 1852 .cphy_tx_max_ksps_per_lane = 2000000L, 1853 }; 1854 1855 static const struct samsung_mipi_dcphy_plat_data rk3588_samsung_mipi_dcphy_plat_data = { 1856 .dphy_tx_max_kbps_per_lane = 4500000L, 1857 .cphy_tx_max_ksps_per_lane = 2000000L, 1858 }; 1859 1860 static struct rockchip_phy rk3576_samsung_mipi_dcphy_driver_data = { 1861 .data = &rk3576_samsung_mipi_dcphy_plat_data, 1862 .funcs = &samsung_mipi_dcphy_funcs, 1863 }; 1864 1865 static struct rockchip_phy rk3588_samsung_mipi_dcphy_driver_data = { 1866 .data = &rk3588_samsung_mipi_dcphy_plat_data, 1867 .funcs = &samsung_mipi_dcphy_funcs, 1868 }; 1869 1870 static const struct udevice_id samsung_mipi_dcphy_ids[] = { 1871 { 1872 .compatible = "rockchip,rk3576-mipi-dcphy", 1873 .data = (ulong)&rk3576_samsung_mipi_dcphy_driver_data, 1874 }, { 1875 .compatible = "rockchip,rk3588-mipi-dcphy", 1876 .data = (ulong)&rk3588_samsung_mipi_dcphy_driver_data, 1877 }, 1878 {} 1879 }; 1880 1881 U_BOOT_DRIVER(samsung_mipi_dcphy) = { 1882 .name = "samsung-mipi-dcphy", 1883 .id = UCLASS_PHY, 1884 .of_match = samsung_mipi_dcphy_ids, 1885 .probe = samsung_mipi_dcphy_probe, 1886 .priv_auto_alloc_size = sizeof(struct samsung_mipi_dcphy), 1887 }; 1888