1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd 4 * 5 * Author: Guochun Huang <hero.huang@rock-chips.com> 6 */ 7 8 #include <config.h> 9 #include <common.h> 10 #include <errno.h> 11 #include <dm.h> 12 #include <div64.h> 13 #include <asm/io.h> 14 #include <asm/arch-rockchip/clock.h> 15 #include <linux/ioport.h> 16 #include <linux/iopoll.h> 17 #include <linux/math64.h> 18 #include <reset.h> 19 #include <regmap.h> 20 #include <syscon.h> 21 22 #include "rockchip_phy.h" 23 24 #define MSEC_PER_SEC 1000L 25 #define USEC_PER_SEC 1000000LL 26 #define PSEC_PER_SEC 1000000000000LL 27 28 #define UPDATE(x, h, l) (((x) << (l)) & GENMASK((h), (l))) 29 #define HIWORD_UPDATE(v, h, l) (((v) << (l)) | (GENMASK((h), (l)) << 16)) 30 31 #define BIAS_CON0 0x0000 32 #define BIAS_CON1 0x0004 33 #define BIAS_CON2 0x0008 34 #define BIAS_CON4 0x0010 35 #define I_MUX_SEL_MASK GENMASK(6, 5) 36 #define I_MUX_SEL(x) UPDATE(x, 6, 5) 37 38 #define PLL_CON0 0x0100 39 #define PLL_EN BIT(12) 40 #define S_MASK GENMASK(10, 8) 41 #define S(x) UPDATE(x, 10, 8) 42 #define P_MASK GENMASK(5, 0) 43 #define P(x) UPDATE(x, 5, 0) 44 #define PLL_CON1 0x0104 45 #define PLL_CON2 0x0108 46 #define M_MASK GENMASK(9, 0) 47 #define M(x) UPDATE(x, 9, 0) 48 #define PLL_CON3 0x010c 49 #define MRR_MASK GENMASK(13, 8) 50 #define MRR(x) UPDATE(x, 13, 8) 51 #define MFR_MASK GENMASK(7, 0) 52 #define MFR(x) UPDATE(x, 7, 0) 53 #define PLL_CON4 0x0110 54 #define SSCG_EN BIT(11) 55 #define PLL_CON5 0x0114 56 #define RESET_N_SEL BIT(10) 57 #define PLL_ENABLE_SEL BIT(8) 58 #define PLL_CON6 0x0118 59 #define PLL_CON7 0x011c 60 #define PLL_LOCK_CNT(x) UPDATE(x, 15, 0) 61 #define PLL_CON8 0x0120 62 #define PLL_STB_CNT(x) UPDATE(x, 15, 0) 63 #define PLL_STAT0 0x0140 64 #define PLL_LOCK BIT(0) 65 66 #define DPHY_MC_GNR_CON0 0x0300 67 #define PHY_READY BIT(1) 68 #define PHY_ENABLE BIT(0) 69 #define DPHY_MC_GNR_CON1 0x0304 70 #define T_PHY_READY(x) UPDATE(x, 15, 0) 71 #define DPHY_MC_ANA_CON0 0x0308 72 #define EDGE_CON(x) UPDATE(x, 14, 12) 73 #define EDGE_CON_DIR(x) UPDATE(x, 9, 9) 74 #define EDGE_CON_EN BIT(8) 75 #define RES_UP(x) UPDATE(x, 7, 4) 76 #define RES_DN(x) UPDATE(x, 3, 0) 77 #define DPHY_MC_ANA_CON1 0x030c 78 #define DPHY_MC_ANA_CON2 0x0310 79 #define HS_VREG_AMP_ICON(x) UPDATE(x, 1, 0) 80 #define DPHY_MC_TIME_CON0 0x0330 81 #define HSTX_CLK_SEL BIT(12) 82 #define T_LPX(x) UPDATE(x, 11, 4) 83 #define DPHY_MC_TIME_CON1 0x0334 84 #define T_CLK_ZERO(x) UPDATE(x, 15, 8) 85 #define T_CLK_PREPARE(x) UPDATE(x, 7, 0) 86 #define DPHY_MC_TIME_CON2 0x0338 87 #define T_HS_EXIT(x) UPDATE(x, 15, 8) 88 #define T_CLK_TRAIL(x) UPDATE(x, 7, 0) 89 #define DPHY_MC_TIME_CON3 0x033c 90 #define T_CLK_POST(x) UPDATE(x, 7, 0) 91 #define DPHY_MC_TIME_CON4 0x0340 92 #define T_ULPS_EXIT(x) UPDATE(x, 9, 0) 93 #define DPHY_MC_DESKEW_CON0 0x0350 94 #define SKEW_CAL_RUN_TIME(x) UPDATE(x, 15, 12) 95 96 #define SKEW_CAL_INIT_RUN_TIME(x) UPDATE(x, 11, 8) 97 #define SKEW_CAL_INIT_WAIT_TIME(x) UPDATE(x, 7, 4) 98 #define SKEW_CAL_EN BIT(0) 99 100 #define COMBO_MD0_GNR_CON0 0x0400 101 #define COMBO_MD0_GNR_CON1 0x0404 102 #define COMBO_MD0_ANA_CON0 0x0408 103 #define COMBO_MD0_ANA_CON1 0x040C 104 #define COMBO_MD0_ANA_CON2 0x0410 105 106 #define COMBO_MD0_TIME_CON0 0x0430 107 #define COMBO_MD0_TIME_CON1 0x0434 108 #define COMBO_MD0_TIME_CON2 0x0438 109 #define COMBO_MD0_TIME_CON3 0x043C 110 #define COMBO_MD0_TIME_CON4 0x0440 111 #define COMBO_MD0_DATA_CON0 0x0444 112 113 #define COMBO_MD1_GNR_CON0 0x0500 114 #define COMBO_MD1_GNR_CON1 0x0504 115 #define COMBO_MD1_ANA_CON0 0x0508 116 #define COMBO_MD1_ANA_CON1 0x050c 117 #define COMBO_MD1_ANA_CON2 0x0510 118 #define COMBO_MD1_TIME_CON0 0x0530 119 #define COMBO_MD1_TIME_CON1 0x0534 120 #define COMBO_MD1_TIME_CON2 0x0538 121 #define COMBO_MD1_TIME_CON3 0x053C 122 #define COMBO_MD1_TIME_CON4 0x0540 123 #define COMBO_MD1_DATA_CON0 0x0544 124 125 #define COMBO_MD2_GNR_CON0 0x0600 126 #define COMBO_MD2_GNR_CON1 0x0604 127 #define COMBO_MD2_ANA_CON0 0X0608 128 #define COMBO_MD2_ANA_CON1 0X060C 129 #define COMBO_MD2_ANA_CON2 0X0610 130 #define COMBO_MD2_TIME_CON0 0x0630 131 #define COMBO_MD2_TIME_CON1 0x0634 132 #define COMBO_MD2_TIME_CON2 0x0638 133 #define COMBO_MD2_TIME_CON3 0x063C 134 #define COMBO_MD2_TIME_CON4 0x0640 135 #define COMBO_MD2_DATA_CON0 0x0644 136 137 #define DPHY_MD3_GNR_CON0 0x0700 138 #define DPHY_MD3_GNR_CON1 0x0704 139 #define DPHY_MD3_ANA_CON0 0X0708 140 #define DPHY_MD3_ANA_CON1 0X070C 141 #define DPHY_MD3_ANA_CON2 0X0710 142 #define DPHY_MD3_TIME_CON0 0x0730 143 #define DPHY_MD3_TIME_CON1 0x0734 144 #define DPHY_MD3_TIME_CON2 0x0738 145 #define DPHY_MD3_TIME_CON3 0x073C 146 #define DPHY_MD3_TIME_CON4 0x0740 147 #define DPHY_MD3_DATA_CON0 0x0744 148 149 #define T_LP_EXIT_SKEW(x) UPDATE(x, 3, 2) 150 #define T_LP_ENTRY_SKEW(x) UPDATE(x, 1, 0) 151 #define T_HS_ZERO(x) UPDATE(x, 15, 8) 152 #define T_HS_PREPARE(x) UPDATE(x, 7, 0) 153 #define T_HS_EXIT(x) UPDATE(x, 15, 8) 154 #define T_HS_TRAIL(x) UPDATE(x, 7, 0) 155 #define T_TA_GET(x) UPDATE(x, 7, 4) 156 #define T_TA_GO(x) UPDATE(x, 3, 0) 157 158 /* MIPI_CDPHY_GRF registers */ 159 #define MIPI_DCPHY_GRF_CON0 0x0000 160 #define S_CPHY_MODE HIWORD_UPDATE(1, 3, 3) 161 #define M_CPHY_MODE HIWORD_UPDATE(1, 0, 0) 162 163 struct samsung_mipi_dphy_timing { 164 unsigned int max_lane_mbps; 165 u8 clk_prepare; 166 u8 clk_zero; 167 u8 clk_post; 168 u8 clk_trail_eot; 169 u8 hs_prepare; 170 u8 hs_zero; 171 u8 hs_trail_eot; 172 u8 lpx; 173 u8 hs_exit; 174 u8 hs_settle; 175 }; 176 177 struct samsung_mipi_cphy_timing { 178 unsigned int max_lane_msps; 179 u8 prepare_3; 180 u8 prebegin_3; 181 u8 post_3; 182 u8 lpx; 183 u8 hs_exit; 184 u8 settle_3; 185 }; 186 187 enum hs_drv_res_ohm { 188 _30_OHM = 0x8, 189 _31_2_OHM, 190 _32_5_OHM, 191 _34_OHM, 192 _35_5_OHM, 193 _37_OHM, 194 _39_OHM, 195 _41_OHM, 196 _43_OHM = 0x0, 197 _46_OHM, 198 _49_OHM, 199 _52_OHM, 200 _56_OHM, 201 _60_OHM, 202 _66_OHM, 203 _73_OHM, 204 }; 205 206 struct hs_drv_res_cfg { 207 enum hs_drv_res_ohm clk_hs_drv_up_ohm; 208 enum hs_drv_res_ohm clk_hs_drv_down_ohm; 209 enum hs_drv_res_ohm data_hs_drv_up_ohm; 210 enum hs_drv_res_ohm data_hs_drv_down_ohm; 211 }; 212 213 struct samsung_mipi_dcphy_plat_data { 214 const struct hs_drv_res_cfg *dphy_hs_drv_res_cfg; 215 u32 dphy_tx_max_kbps_per_lane; 216 u32 cphy_tx_max_ksps_per_lane; 217 }; 218 219 struct samsung_mipi_dcphy { 220 enum phy_mode mode; 221 void *base; 222 void *grf; 223 int lanes; 224 bool c_option; 225 struct reset_ctl m_phy_rst; 226 227 const struct samsung_mipi_dcphy_plat_data *pdata; 228 struct { 229 unsigned long long rate; 230 u8 prediv; 231 u16 fbdiv; 232 long dsm; 233 u8 scaler; 234 235 bool ssc_en; 236 u8 mfr; 237 u8 mrr; 238 } pll; 239 }; 240 241 static const 242 struct samsung_mipi_dphy_timing samsung_mipi_dphy_timing_table[] = { 243 {6500, 32, 117, 31, 28, 30, 56, 27, 24, 44, 37}, 244 {6490, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37}, 245 {6480, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37}, 246 {6470, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37}, 247 {6460, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37}, 248 {6450, 32, 115, 31, 28, 30, 56, 27, 24, 44, 37}, 249 {6440, 32, 115, 31, 28, 30, 56, 27, 24, 44, 37}, 250 {6430, 31, 116, 31, 28, 30, 55, 27, 24, 44, 37}, 251 {6420, 31, 116, 31, 28, 30, 55, 27, 24, 44, 37}, 252 {6410, 31, 116, 31, 27, 30, 55, 27, 24, 44, 37}, 253 {6400, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36}, 254 {6390, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36}, 255 {6380, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36}, 256 {6370, 31, 115, 30, 27, 30, 55, 26, 23, 43, 36}, 257 {6360, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36}, 258 {6350, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36}, 259 {6340, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36}, 260 {6330, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36}, 261 {6320, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36}, 262 {6310, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36}, 263 {6300, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36}, 264 {6290, 31, 113, 30, 27, 29, 54, 26, 23, 43, 36}, 265 {6280, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36}, 266 {6270, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36}, 267 {6260, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36}, 268 {6250, 31, 112, 30, 27, 29, 54, 26, 23, 42, 36}, 269 {6240, 30, 113, 30, 27, 29, 54, 26, 23, 42, 36}, 270 {6230, 30, 112, 30, 27, 29, 54, 26, 23, 42, 35}, 271 {6220, 30, 112, 30, 27, 29, 53, 26, 23, 42, 35}, 272 {6210, 30, 112, 30, 27, 29, 53, 26, 23, 42, 35}, 273 {6200, 30, 112, 29, 27, 29, 53, 26, 23, 42, 35}, 274 {6190, 30, 111, 29, 27, 29, 53, 26, 23, 42, 35}, 275 {6180, 30, 111, 29, 27, 29, 53, 26, 23, 42, 35}, 276 {6170, 30, 111, 29, 26, 29, 53, 26, 23, 42, 35}, 277 {6160, 30, 111, 29, 26, 29, 53, 26, 23, 42, 35}, 278 {6150, 30, 110, 29, 26, 29, 53, 26, 23, 42, 35}, 279 {6140, 30, 110, 29, 26, 29, 52, 26, 23, 42, 35}, 280 {6130, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35}, 281 {6120, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35}, 282 {6110, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35}, 283 {6100, 30, 109, 29, 26, 29, 52, 25, 22, 41, 35}, 284 {6090, 30, 109, 29, 26, 29, 52, 25, 22, 41, 35}, 285 {6080, 30, 109, 29, 26, 28, 53, 25, 22, 41, 35}, 286 {6070, 30, 109, 29, 26, 28, 52, 25, 22, 41, 34}, 287 {6060, 30, 108, 29, 26, 28, 52, 25, 22, 41, 34}, 288 {6050, 30, 108, 29, 26, 28, 52, 25, 22, 41, 34}, 289 {6040, 29, 109, 29, 26, 28, 52, 25, 22, 41, 34}, 290 {6030, 29, 109, 29, 26, 28, 52, 25, 22, 41, 34}, 291 {6020, 29, 108, 29, 26, 28, 52, 25, 22, 41, 34}, 292 {6010, 29, 108, 29, 26, 28, 52, 25, 22, 41, 34}, 293 {6000, 29, 108, 28, 26, 28, 51, 25, 22, 41, 34}, 294 {5990, 29, 108, 28, 26, 28, 51, 25, 22, 41, 34}, 295 {5980, 29, 107, 28, 26, 28, 51, 25, 22, 41, 34}, 296 {5970, 29, 107, 28, 26, 28, 51, 25, 22, 41, 34}, 297 {5960, 29, 107, 28, 26, 28, 51, 25, 22, 40, 34}, 298 {5950, 29, 107, 28, 26, 28, 51, 25, 22, 40, 34}, 299 {5940, 29, 107, 28, 25, 28, 51, 25, 22, 40, 34}, 300 {5930, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34}, 301 {5920, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34}, 302 {5910, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34}, 303 {5900, 29, 106, 28, 25, 28, 50, 24, 22, 40, 33}, 304 {5890, 29, 105, 28, 25, 28, 50, 24, 22, 40, 33}, 305 {5880, 29, 105, 28, 25, 28, 50, 24, 22, 40, 33}, 306 {5870, 29, 105, 28, 25, 27, 51, 24, 22, 40, 33}, 307 {5860, 29, 105, 28, 25, 27, 51, 24, 21, 40, 33}, 308 {5850, 29, 104, 28, 25, 27, 50, 24, 21, 40, 33}, 309 {5840, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33}, 310 {5830, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33}, 311 {5820, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33}, 312 {5810, 28, 104, 28, 25, 27, 50, 24, 21, 39, 33}, 313 {5800, 28, 104, 27, 25, 27, 50, 24, 21, 39, 33}, 314 {5790, 28, 104, 27, 25, 27, 50, 24, 21, 39, 33}, 315 {5780, 28, 104, 27, 25, 27, 49, 24, 21, 39, 33}, 316 {5770, 28, 104, 27, 25, 27, 49, 24, 21, 39, 33}, 317 {5760, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33}, 318 {5750, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33}, 319 {5740, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33}, 320 {5730, 28, 103, 27, 25, 27, 49, 24, 21, 39, 32}, 321 {5720, 28, 102, 27, 25, 27, 49, 24, 21, 39, 32}, 322 {5710, 28, 102, 27, 25, 27, 48, 24, 21, 39, 32}, 323 {5700, 28, 102, 27, 24, 27, 48, 24, 21, 39, 32}, 324 {5690, 28, 102, 27, 24, 27, 48, 24, 21, 39, 32}, 325 {5680, 28, 101, 27, 24, 27, 48, 24, 21, 39, 32}, 326 {5670, 28, 101, 27, 24, 27, 48, 23, 21, 38, 32}, 327 {5660, 28, 101, 27, 24, 26, 49, 23, 21, 38, 32}, 328 {5650, 28, 101, 27, 24, 26, 49, 23, 21, 38, 32}, 329 {5640, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32}, 330 {5630, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32}, 331 {5620, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32}, 332 {5610, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32}, 333 {5600, 27, 101, 26, 24, 26, 48, 23, 20, 38, 32}, 334 {5590, 27, 100, 26, 24, 26, 48, 23, 20, 38, 32}, 335 {5580, 27, 100, 26, 24, 26, 48, 23, 20, 38, 32}, 336 {5570, 27, 100, 26, 24, 26, 48, 23, 20, 38, 31}, 337 {5560, 27, 100, 26, 24, 26, 47, 23, 20, 38, 31}, 338 {5550, 27, 99, 26, 24, 26, 47, 23, 20, 38, 31}, 339 {5540, 27, 99, 26, 24, 26, 47, 23, 20, 38, 31}, 340 {5530, 27, 99, 26, 24, 26, 47, 23, 20, 38, 31}, 341 {5520, 27, 99, 26, 24, 26, 47, 23, 20, 37, 31}, 342 {5510, 27, 98, 26, 24, 26, 47, 23, 20, 37, 31}, 343 {5500, 27, 98, 26, 24, 26, 47, 23, 20, 37, 31}, 344 {5490, 27, 98, 26, 24, 26, 46, 23, 20, 37, 31}, 345 {5480, 27, 98, 26, 24, 26, 46, 23, 20, 37, 31}, 346 {5470, 27, 97, 26, 23, 26, 46, 23, 20, 37, 31}, 347 {5460, 27, 97, 26, 23, 26, 46, 23, 20, 37, 31}, 348 {5450, 27, 97, 26, 23, 25, 47, 23, 20, 37, 31}, 349 {5440, 26, 98, 26, 23, 25, 47, 23, 20, 37, 31}, 350 {5430, 26, 98, 26, 23, 25, 47, 22, 20, 37, 31}, 351 {5420, 26, 97, 26, 23, 25, 46, 22, 20, 37, 31}, 352 {5410, 26, 97, 26, 23, 25, 46, 22, 20, 37, 31}, 353 {5400, 26, 97, 25, 23, 25, 46, 22, 20, 37, 30}, 354 {5390, 26, 97, 25, 23, 25, 46, 22, 20, 37, 30}, 355 {5380, 26, 96, 25, 23, 25, 46, 22, 20, 36, 30}, 356 {5370, 26, 96, 25, 23, 25, 46, 22, 20, 36, 30}, 357 {5360, 26, 96, 25, 23, 25, 46, 22, 20, 36, 30}, 358 {5350, 26, 96, 25, 23, 25, 46, 22, 20, 36, 30}, 359 {5340, 26, 95, 25, 23, 25, 45, 22, 20, 36, 30}, 360 {5330, 26, 95, 25, 23, 25, 45, 22, 19, 36, 30}, 361 {5320, 26, 95, 25, 23, 25, 45, 22, 19, 36, 30}, 362 {5310, 26, 95, 25, 23, 25, 45, 22, 19, 36, 30}, 363 {5300, 26, 95, 25, 23, 25, 45, 22, 19, 36, 30}, 364 {5290, 26, 94, 25, 23, 25, 45, 22, 19, 36, 30}, 365 {5280, 26, 94, 25, 23, 25, 45, 22, 19, 36, 30}, 366 {5270, 26, 94, 25, 23, 25, 44, 22, 19, 36, 30}, 367 {5260, 26, 94, 25, 23, 25, 44, 22, 19, 36, 30}, 368 {5250, 25, 94, 25, 23, 24, 45, 22, 19, 36, 30}, 369 {5240, 25, 94, 25, 23, 24, 45, 22, 19, 36, 29}, 370 {5230, 25, 94, 25, 22, 24, 45, 22, 19, 35, 29}, 371 {5220, 25, 94, 25, 22, 24, 45, 22, 19, 35, 29}, 372 {5210, 25, 93, 25, 22, 24, 45, 22, 19, 35, 29}, 373 {5200, 25, 93, 24, 22, 24, 44, 21, 19, 35, 29}, 374 {5190, 25, 93, 24, 22, 24, 44, 21, 19, 35, 29}, 375 {5180, 25, 93, 24, 22, 24, 44, 21, 19, 35, 29}, 376 {5170, 25, 92, 24, 22, 24, 44, 21, 19, 35, 29}, 377 {5160, 25, 92, 24, 22, 24, 44, 21, 19, 35, 29}, 378 {5150, 25, 92, 24, 22, 24, 44, 21, 19, 35, 29}, 379 {5140, 25, 92, 24, 22, 24, 44, 21, 19, 35, 29}, 380 {5130, 25, 92, 24, 22, 24, 43, 21, 19, 35, 29}, 381 {5120, 25, 91, 24, 22, 24, 43, 21, 19, 35, 29}, 382 {5110, 25, 91, 24, 22, 24, 43, 21, 19, 35, 29}, 383 {5100, 25, 91, 24, 22, 24, 43, 21, 19, 35, 29}, 384 {5090, 25, 91, 24, 22, 24, 43, 21, 19, 34, 29}, 385 {5080, 25, 90, 24, 22, 24, 43, 21, 19, 34, 29}, 386 {5070, 25, 90, 24, 22, 24, 43, 21, 19, 34, 28}, 387 {5060, 25, 90, 24, 22, 24, 43, 21, 18, 34, 28}, 388 {5050, 24, 91, 24, 22, 24, 42, 21, 18, 34, 28}, 389 {5040, 24, 90, 24, 22, 23, 43, 21, 18, 34, 28}, 390 {5030, 24, 90, 24, 22, 23, 43, 21, 18, 34, 28}, 391 {5020, 24, 90, 24, 22, 23, 43, 21, 18, 34, 28}, 392 {5010, 24, 90, 24, 22, 23, 43, 21, 18, 34, 28}, 393 {5000, 24, 89, 23, 21, 23, 43, 21, 18, 34, 28}, 394 {4990, 24, 89, 23, 21, 23, 43, 21, 18, 34, 28}, 395 {4980, 24, 89, 23, 21, 23, 42, 21, 18, 34, 28}, 396 {4970, 24, 89, 23, 21, 23, 42, 21, 18, 34, 28}, 397 {4960, 24, 89, 23, 21, 23, 42, 20, 18, 34, 28}, 398 {4950, 24, 88, 23, 21, 23, 42, 20, 18, 34, 28}, 399 {4940, 24, 88, 23, 21, 23, 42, 20, 18, 33, 28}, 400 {4930, 24, 88, 23, 21, 23, 42, 20, 18, 33, 28}, 401 {4920, 24, 88, 23, 21, 23, 42, 20, 18, 33, 28}, 402 {4910, 24, 87, 23, 21, 23, 41, 20, 18, 33, 28}, 403 {4900, 24, 87, 23, 21, 23, 41, 20, 18, 33, 27}, 404 {4890, 24, 87, 23, 21, 23, 41, 20, 18, 33, 27}, 405 {4880, 24, 87, 23, 21, 23, 41, 20, 18, 33, 27}, 406 {4870, 24, 86, 23, 21, 23, 41, 20, 18, 33, 27}, 407 {4860, 24, 86, 23, 21, 23, 41, 20, 18, 33, 27}, 408 {4850, 23, 87, 23, 21, 23, 41, 20, 18, 33, 27}, 409 {4840, 23, 87, 23, 21, 23, 40, 20, 18, 33, 27}, 410 {4830, 23, 86, 23, 21, 22, 41, 20, 18, 33, 27}, 411 {4820, 23, 86, 23, 21, 22, 41, 20, 18, 33, 27}, 412 {4810, 23, 86, 23, 21, 22, 41, 20, 18, 33, 27}, 413 {4800, 23, 86, 22, 21, 22, 41, 20, 17, 32, 27}, 414 {4790, 23, 86, 22, 21, 22, 41, 20, 17, 32, 27}, 415 {4780, 23, 85, 22, 21, 22, 41, 20, 17, 32, 27}, 416 {4770, 23, 85, 22, 21, 22, 41, 20, 17, 32, 27}, 417 {4760, 23, 85, 22, 20, 22, 40, 20, 17, 32, 27}, 418 {4750, 23, 85, 22, 20, 22, 40, 20, 17, 32, 27}, 419 {4740, 23, 84, 22, 20, 22, 40, 20, 17, 32, 26}, 420 {4730, 23, 84, 22, 20, 22, 40, 19, 17, 32, 26}, 421 {4720, 23, 84, 22, 20, 22, 40, 19, 17, 32, 26}, 422 {4710, 23, 84, 22, 20, 22, 40, 19, 17, 32, 26}, 423 {4700, 23, 83, 22, 20, 22, 40, 19, 17, 32, 26}, 424 {4690, 23, 83, 22, 20, 22, 39, 19, 17, 32, 26}, 425 {4680, 23, 83, 22, 20, 22, 39, 19, 17, 32, 26}, 426 {4670, 23, 83, 22, 20, 22, 39, 19, 17, 32, 26}, 427 {4660, 23, 82, 22, 20, 22, 39, 19, 17, 32, 26}, 428 {4650, 22, 83, 22, 20, 22, 39, 19, 17, 31, 26}, 429 {4640, 22, 83, 22, 20, 22, 39, 19, 17, 31, 26}, 430 {4630, 22, 83, 22, 20, 22, 39, 19, 17, 31, 26}, 431 {4620, 22, 83, 22, 20, 21, 39, 19, 17, 31, 26}, 432 {4610, 22, 82, 22, 20, 21, 39, 19, 17, 31, 26}, 433 {4600, 22, 82, 21, 20, 21, 39, 19, 17, 31, 26}, 434 {4590, 22, 82, 21, 20, 21, 39, 19, 17, 31, 26}, 435 {4580, 22, 82, 21, 20, 21, 39, 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10, 10, 10, 18, 9, 8, 15, 12}, 668 {2250, 10, 39, 10, 10, 10, 18, 9, 8, 15, 12}, 669 {2240, 10, 39, 10, 10, 10, 18, 9, 8, 15, 11}, 670 {2230, 10, 38, 10, 10, 10, 18, 9, 8, 15, 11}, 671 {2220, 10, 38, 10, 10, 10, 17, 9, 8, 15, 11}, 672 {2210, 10, 38, 10, 10, 10, 17, 9, 8, 15, 11}, 673 {2200, 10, 38, 9, 10, 10, 17, 9, 8, 15, 11}, 674 {2190, 10, 38, 9, 9, 10, 17, 9, 8, 15, 11}, 675 {2180, 10, 37, 9, 9, 10, 17, 9, 8, 14, 11}, 676 {2170, 10, 37, 9, 9, 10, 17, 9, 8, 14, 11}, 677 {2160, 10, 37, 9, 9, 10, 17, 9, 8, 14, 11}, 678 {2150, 10, 37, 9, 9, 10, 16, 8, 8, 14, 11}, 679 {2140, 10, 36, 9, 9, 10, 16, 8, 8, 14, 11}, 680 {2130, 10, 36, 9, 9, 10, 16, 8, 7, 14, 11}, 681 {2120, 10, 36, 9, 9, 9, 17, 8, 7, 14, 11}, 682 {2110, 10, 36, 9, 9, 9, 17, 8, 7, 14, 11}, 683 {2100, 10, 35, 9, 9, 9, 17, 8, 7, 14, 11}, 684 {2090, 10, 35, 9, 9, 9, 17, 8, 7, 14, 11}, 685 {2080, 9, 36, 9, 9, 9, 16, 8, 7, 14, 11}, 686 {2070, 9, 36, 9, 9, 9, 16, 8, 7, 14, 10}, 687 {2060, 9, 35, 9, 9, 9, 16, 8, 7, 14, 10}, 688 {2050, 9, 35, 9, 9, 9, 16, 8, 7, 14, 10}, 689 {2040, 9, 35, 9, 9, 9, 16, 8, 7, 14, 10}, 690 {2030, 9, 35, 9, 9, 9, 16, 8, 7, 13, 10}, 691 {2020, 9, 35, 9, 9, 9, 16, 8, 7, 13, 10}, 692 {2010, 9, 34, 9, 9, 9, 15, 8, 7, 13, 10}, 693 {2000, 9, 34, 8, 9, 9, 15, 8, 7, 13, 10}, 694 {1990, 9, 34, 8, 9, 9, 15, 8, 7, 13, 10}, 695 {1980, 9, 34, 8, 9, 9, 15, 8, 7, 13, 10}, 696 {1970, 9, 33, 8, 9, 9, 15, 8, 7, 13, 10}, 697 {1960, 9, 33, 8, 9, 9, 15, 8, 7, 13, 10}, 698 {1950, 9, 33, 8, 8, 9, 15, 8, 7, 13, 10}, 699 {1940, 9, 33, 8, 8, 9, 15, 8, 7, 13, 10}, 700 {1930, 9, 32, 8, 8, 9, 14, 8, 7, 13, 10}, 701 {1920, 9, 32, 8, 8, 9, 14, 8, 7, 13, 10}, 702 {1910, 9, 32, 8, 8, 8, 15, 7, 7, 13, 9}, 703 {1900, 9, 32, 8, 8, 8, 15, 7, 7, 13, 9}, 704 {1890, 9, 31, 8, 8, 8, 15, 7, 7, 12, 9}, 705 {1880, 8, 32, 8, 8, 8, 15, 7, 7, 12, 9}, 706 {1870, 8, 32, 8, 8, 8, 15, 7, 7, 12, 9}, 707 {1860, 8, 32, 8, 8, 8, 14, 7, 6, 12, 9}, 708 {1850, 8, 32, 8, 8, 8, 14, 7, 6, 12, 9}, 709 {1840, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9}, 710 {1830, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9}, 711 {1820, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9}, 712 {1810, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9}, 713 {1800, 8, 30, 7, 8, 8, 14, 7, 6, 12, 9}, 714 {1790, 8, 30, 7, 8, 8, 13, 7, 6, 12, 9}, 715 {1780, 8, 30, 7, 8, 8, 13, 7, 6, 12, 9}, 716 {1770, 8, 30, 7, 8, 8, 13, 7, 6, 12, 9}, 717 {1760, 8, 29, 7, 8, 8, 13, 7, 6, 12, 9}, 718 {1750, 8, 29, 7, 8, 8, 13, 7, 6, 12, 9}, 719 {1740, 8, 29, 7, 8, 8, 13, 7, 6, 11, 8}, 720 {1730, 8, 29, 7, 8, 8, 13, 7, 6, 11, 8}, 721 {1720, 8, 29, 7, 7, 8, 13, 7, 6, 11, 8}, 722 {1710, 8, 28, 7, 7, 8, 12, 7, 6, 11, 8}, 723 {1700, 8, 28, 7, 7, 7, 13, 7, 6, 11, 8}, 724 {1690, 8, 28, 7, 7, 7, 13, 7, 6, 11, 8}, 725 {1680, 7, 29, 7, 7, 7, 13, 6, 6, 11, 8}, 726 {1670, 7, 28, 7, 7, 7, 13, 6, 6, 11, 8}, 727 {1660, 7, 28, 7, 7, 7, 13, 6, 6, 11, 8}, 728 {1650, 7, 28, 7, 7, 7, 13, 6, 6, 11, 8}, 729 {1640, 7, 28, 7, 7, 7, 12, 6, 6, 11, 8}, 730 {1630, 7, 27, 7, 7, 7, 12, 6, 6, 11, 8}, 731 {1620, 7, 27, 7, 7, 7, 12, 6, 6, 11, 8}, 732 {1610, 7, 27, 7, 7, 7, 12, 6, 6, 11, 8}, 733 {1600, 7, 27, 6, 7, 7, 12, 6, 5, 10, 8}, 734 {1590, 7, 26, 6, 7, 7, 12, 6, 5, 10, 8}, 735 {1580, 7, 26, 6, 7, 7, 12, 6, 5, 10, 7}, 736 {1570, 7, 26, 6, 7, 7, 11, 6, 5, 10, 7}, 737 {1560, 7, 26, 6, 7, 7, 11, 6, 5, 10, 7}, 738 {1550, 7, 26, 6, 7, 7, 11, 6, 5, 10, 7}, 739 {1540, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7}, 740 {1530, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7}, 741 {1520, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7}, 742 {1510, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7}, 743 {1500, 7, 24, 6, 7, 7, 10, 6, 5, 10, 7}, 744 {1490, 59, 25, 6, 77, 59, 10, 70, 44, 9, 73}, 745 {1480, 59, 24, 6, 76, 58, 10, 70, 44, 9, 73}, 746 {1470, 58, 24, 6, 76, 58, 10, 69, 44, 9, 72}, 747 {1460, 58, 24, 6, 76, 58, 10, 69, 43, 9, 72}, 748 {1450, 58, 24, 6, 75, 57, 10, 68, 43, 9, 71}, 749 {1440, 57, 24, 6, 75, 57, 10, 68, 43, 9, 71}, 750 {1430, 57, 23, 6, 75, 57, 10, 68, 43, 8, 70}, 751 {1420, 56, 23, 6, 74, 57, 9, 67, 43, 8, 70}, 752 {1410, 56, 23, 6, 74, 57, 9, 67, 43, 8, 69}, 753 {1400, 56, 23, 5, 74, 55, 9, 67, 41, 8, 69}, 754 {1390, 55, 23, 5, 73, 55, 9, 66, 41, 8, 68}, 755 {1380, 55, 23, 5, 73, 54, 9, 66, 41, 8, 68}, 756 {1370, 54, 22, 5, 72, 54, 9, 66, 41, 8, 67}, 757 {1360, 54, 22, 5, 72, 54, 9, 65, 40, 8, 67}, 758 {1350, 54, 22, 5, 72, 53, 9, 65, 40, 8, 66}, 759 {1340, 53, 22, 5, 71, 53, 9, 65, 40, 8, 66}, 760 {1330, 53, 22, 5, 71, 53, 9, 64, 39, 8, 65}, 761 {1320, 52, 22, 5, 71, 53, 8, 64, 40, 8, 65}, 762 {1310, 52, 21, 5, 70, 53, 8, 64, 40, 8, 64}, 763 {1300, 51, 21, 5, 70, 51, 8, 63, 38, 8, 64}, 764 {1290, 51, 21, 5, 70, 51, 8, 63, 38, 7, 64}, 765 {1280, 51, 21, 5, 69, 51, 8, 63, 38, 7, 63}, 766 {1270, 50, 21, 5, 69, 50, 8, 62, 38, 7, 63}, 767 {1260, 50, 20, 5, 69, 50, 8, 62, 37, 7, 62}, 768 {1250, 49, 20, 5, 68, 49, 8, 62, 37, 7, 62}, 769 {1240, 49, 20, 5, 68, 49, 8, 61, 37, 7, 61}, 770 {1230, 49, 20, 5, 68, 49, 8, 61, 36, 7, 61}, 771 {1220, 48, 20, 5, 67, 48, 8, 61, 36, 7, 60}, 772 {1210, 48, 19, 5, 67, 48, 7, 60, 36, 7, 60}, 773 {1200, 49, 19, 4, 67, 49, 7, 60, 36, 7, 59}, 774 {1190, 48, 19, 4, 66, 48, 7, 60, 36, 7, 59}, 775 {1180, 48, 19, 4, 66, 48, 7, 59, 36, 7, 58}, 776 {1170, 46, 19, 4, 66, 46, 7, 59, 35, 7, 58}, 777 {1160, 46, 18, 4, 65, 46, 7, 59, 34, 7, 57}, 778 {1150, 45, 18, 4, 65, 46, 7, 58, 34, 7, 57}, 779 {1140, 45, 18, 4, 65, 45, 7, 58, 34, 6, 56}, 780 {1130, 45, 18, 4, 64, 45, 7, 58, 33, 6, 56}, 781 {1120, 44, 18, 4, 64, 44, 7, 57, 33, 6, 55}, 782 {1110, 44, 18, 4, 64, 44, 7, 57, 33, 6, 55}, 783 {1100, 43, 17, 4, 63, 44, 6, 57, 32, 6, 54}, 784 {1090, 43, 17, 4, 63, 44, 6, 56, 33, 6, 54}, 785 {1080, 43, 17, 4, 63, 44, 6, 56, 33, 6, 53}, 786 {1070, 42, 17, 4, 62, 44, 6, 56, 33, 6, 53}, 787 {1060, 42, 17, 4, 62, 42, 6, 55, 31, 6, 52}, 788 {1050, 41, 17, 4, 62, 42, 6, 55, 31, 6, 52}, 789 {1040, 41, 16, 4, 61, 41, 6, 54, 31, 6, 52}, 790 {1030, 41, 16, 4, 61, 41, 6, 54, 30, 6, 51}, 791 {1020, 40, 16, 4, 61, 41, 6, 54, 30, 6, 51}, 792 {1010, 40, 16, 4, 60, 40, 6, 53, 30, 6, 50}, 793 {1000, 39, 16, 3, 60, 40, 6, 53, 29, 5, 50}, 794 { 990, 39, 15, 3, 60, 39, 6, 53, 29, 5, 49}, 795 { 980, 39, 15, 3, 59, 39, 5, 52, 29, 5, 49}, 796 { 970, 38, 15, 3, 59, 39, 5, 52, 29, 5, 48}, 797 { 960, 38, 15, 3, 59, 39, 5, 52, 29, 5, 48}, 798 { 950, 37, 15, 3, 58, 39, 5, 51, 29, 5, 47}, 799 { 940, 37, 14, 3, 58, 39, 5, 51, 29, 5, 47}, 800 { 930, 37, 14, 3, 57, 37, 5, 51, 27, 5, 46}, 801 { 920, 36, 14, 3, 57, 37, 5, 50, 27, 5, 46}, 802 { 910, 36, 14, 3, 57, 36, 5, 50, 27, 5, 45}, 803 { 900, 35, 14, 3, 56, 36, 5, 50, 26, 5, 45}, 804 { 890, 35, 14, 3, 56, 36, 5, 49, 26, 5, 44}, 805 { 880, 35, 13, 3, 56, 35, 5, 49, 26, 5, 44}, 806 { 870, 34, 13, 3, 55, 35, 4, 49, 26, 5, 43}, 807 { 860, 34, 13, 3, 55, 35, 4, 48, 25, 5, 43}, 808 { 850, 33, 13, 3, 55, 35, 4, 48, 26, 4, 42}, 809 { 840, 33, 13, 3, 54, 35, 4, 48, 26, 4, 42}, 810 { 830, 33, 12, 3, 54, 33, 4, 47, 24, 4, 41}, 811 { 820, 32, 12, 3, 54, 33, 4, 47, 24, 4, 41}, 812 { 810, 32, 12, 3, 53, 33, 4, 47, 24, 4, 40}, 813 { 800, 31, 12, 2, 53, 32, 4, 46, 23, 4, 40}, 814 { 790, 31, 12, 2, 53, 32, 4, 46, 23, 4, 39}, 815 { 780, 30, 12, 2, 52, 31, 4, 46, 23, 4, 39}, 816 { 770, 30, 11, 2, 52, 31, 4, 45, 23, 4, 39}, 817 { 760, 30, 11, 2, 52, 31, 3, 45, 22, 4, 38}, 818 { 750, 29, 11, 2, 51, 30, 3, 45, 22, 4, 38}, 819 { 740, 29, 11, 2, 51, 30, 3, 44, 22, 4, 37}, 820 { 730, 28, 11, 2, 51, 31, 3, 44, 22, 4, 37}, 821 { 720, 28, 10, 2, 50, 30, 3, 44, 22, 4, 36}, 822 { 710, 28, 10, 2, 50, 30, 3, 43, 22, 4, 36}, 823 { 700, 27, 10, 2, 50, 28, 3, 43, 20, 3, 35}, 824 { 690, 27, 10, 2, 49, 28, 3, 43, 20, 3, 35}, 825 { 680, 26, 10, 2, 49, 28, 3, 42, 20, 3, 34}, 826 { 670, 26, 10, 2, 49, 27, 3, 42, 20, 3, 34}, 827 { 660, 26, 9, 2, 48, 27, 3, 42, 19, 3, 33}, 828 { 650, 25, 9, 2, 48, 26, 3, 41, 19, 3, 33}, 829 { 640, 25, 9, 2, 48, 26, 2, 41, 19, 3, 32}, 830 { 630, 24, 9, 2, 47, 26, 2, 40, 18, 3, 32}, 831 { 620, 24, 9, 2, 47, 26, 2, 40, 19, 3, 31}, 832 { 610, 24, 8, 2, 47, 26, 2, 40, 19, 3, 31}, 833 { 600, 23, 8, 1, 46, 26, 2, 39, 18, 3, 30}, 834 { 590, 23, 8, 1, 46, 24, 2, 39, 17, 3, 30}, 835 { 580, 22, 8, 1, 46, 24, 2, 39, 17, 3, 29}, 836 { 570, 22, 8, 1, 45, 23, 2, 38, 17, 3, 29}, 837 { 560, 22, 7, 1, 45, 23, 2, 38, 16, 2, 28}, 838 { 550, 21, 7, 1, 45, 23, 2, 38, 16, 2, 28}, 839 { 540, 21, 7, 1, 44, 22, 2, 37, 16, 2, 27}, 840 { 530, 20, 7, 1, 44, 22, 1, 37, 15, 2, 27}, 841 { 520, 20, 7, 1, 43, 21, 1, 37, 15, 2, 27}, 842 { 510, 20, 6, 1, 43, 21, 1, 36, 15, 2, 26}, 843 { 500, 19, 6, 1, 43, 22, 1, 36, 15, 2, 26}, 844 { 490, 19, 6, 1, 42, 21, 1, 36, 15, 2, 25}, 845 { 480, 18, 6, 1, 42, 21, 1, 35, 15, 2, 25}, 846 { 470, 18, 6, 1, 42, 21, 1, 35, 15, 2, 24}, 847 { 460, 18, 6, 1, 41, 19, 1, 35, 13, 2, 24}, 848 { 450, 17, 5, 1, 41, 19, 1, 34, 13, 2, 23}, 849 { 440, 17, 5, 1, 41, 18, 1, 34, 13, 2, 23}, 850 { 430, 16, 5, 1, 40, 18, 0, 34, 12, 2, 22}, 851 { 420, 16, 5, 1, 40, 18, 0, 33, 12, 2, 22}, 852 { 410, 16, 5, 1, 40, 17, 0, 33, 12, 1, 21}, 853 { 400, 15, 5, 0, 39, 17, 0, 33, 11, 1, 21}, 854 { 390, 15, 4, 0, 39, 17, 0, 32, 12, 1, 20}, 855 { 380, 14, 4, 0, 39, 17, 0, 32, 12, 1, 20}, 856 { 370, 14, 4, 0, 38, 17, 0, 32, 12, 1, 19}, 857 { 360, 14, 4, 0, 38, 15, 0, 31, 10, 1, 19}, 858 { 350, 13, 4, 0, 38, 15, 0, 31, 10, 1, 18}, 859 { 340, 13, 3, 0, 37, 15, 0, 31, 10, 1, 18}, 860 { 330, 12, 3, 0, 37, 14, 0, 30, 9, 1, 17}, 861 { 320, 12, 3, 0, 37, 14, 0, 30, 9, 1, 17}, 862 { 310, 12, 3, 0, 36, 13, 0, 30, 9, 1, 16}, 863 { 300, 11, 3, 0, 36, 13, 0, 29, 8, 1, 16}, 864 { 290, 11, 2, 0, 36, 13, 0, 29, 8, 1, 15}, 865 { 280, 10, 2, 0, 35, 12, 0, 29, 8, 1, 15}, 866 { 270, 10, 2, 0, 35, 12, 0, 28, 8, 0, 14}, 867 { 260, 9, 2, 0, 35, 12, 0, 28, 8, 0, 14}, 868 { 250, 9, 2, 0, 34, 12, 0, 28, 8, 0, 14}, 869 { 240, 9, 2, 0, 34, 12, 0, 27, 8, 0, 13}, 870 { 230, 8, 1, 0, 34, 10, 0, 27, 6, 0, 13}, 871 { 220, 8, 1, 0, 33, 10, 0, 27, 6, 0, 12}, 872 { 210, 7, 1, 0, 33, 10, 0, 26, 6, 0, 12}, 873 { 200, 7, 1, 0, 33, 9, 0, 26, 5, 0, 11}, 874 { 190, 7, 1, 0, 32, 9, 0, 25, 5, 0, 11}, 875 { 180, 6, 1, 0, 32, 8, 0, 25, 5, 0, 10}, 876 { 170, 6, 0, 0, 32, 8, 0, 25, 5, 0, 10}, 877 { 160, 5, 0, 0, 31, 8, 0, 24, 4, 0, 9}, 878 { 150, 5, 0, 0, 31, 8, 0, 24, 5, 0, 9}, 879 { 140, 5, 0, 0, 31, 8, 0, 24, 5, 0, 8}, 880 { 130, 4, 0, 0, 30, 6, 0, 23, 3, 0, 8}, 881 { 120, 4, 0, 0, 30, 6, 0, 23, 3, 0, 7}, 882 { 110, 3, 0, 0, 30, 6, 0, 23, 3, 0, 7}, 883 { 100, 3, 0, 0, 29, 5, 0, 22, 2, 0, 6}, 884 { 90, 3, 0, 0, 29, 5, 0, 22, 2, 0, 6}, 885 { 80, 2, 0, 0, 28, 5, 0, 22, 2, 0, 5}, 886 }; 887 888 static const 889 struct samsung_mipi_cphy_timing samsung_mipi_cphy_timing_table[] = { 890 { 3500, 39, 50, 25, 29, 54, 1 }, 891 { 3490, 39, 50, 25, 29, 54, 1 }, 892 { 3480, 39, 50, 25, 29, 54, 1 }, 893 { 3470, 39, 50, 25, 29, 54, 1 }, 894 { 3460, 39, 50, 25, 29, 54, 1 }, 895 { 3450, 39, 50, 25, 29, 54, 1 }, 896 { 3440, 38, 50, 25, 29, 54, 1 }, 897 { 3430, 38, 50, 25, 29, 53, 1 }, 898 { 3420, 38, 50, 25, 29, 53, 1 }, 899 { 3410, 38, 50, 25, 29, 53, 1 }, 900 { 3400, 38, 50, 25, 29, 53, 1 }, 901 { 3390, 38, 50, 25, 29, 53, 1 }, 902 { 3380, 38, 50, 25, 28, 53, 1 }, 903 { 3370, 38, 50, 25, 28, 52, 1 }, 904 { 3360, 37, 50, 25, 28, 52, 1 }, 905 { 3350, 37, 50, 25, 28, 52, 1 }, 906 { 3340, 37, 50, 25, 28, 52, 1 }, 907 { 3330, 37, 50, 25, 28, 52, 1 }, 908 { 3320, 37, 50, 25, 28, 52, 1 }, 909 { 3310, 37, 50, 25, 28, 52, 1 }, 910 { 3300, 37, 50, 25, 28, 51, 1 }, 911 { 3290, 37, 50, 25, 28, 51, 1 }, 912 { 3280, 37, 50, 25, 28, 51, 1 }, 913 { 3270, 36, 50, 25, 28, 51, 1 }, 914 { 3260, 36, 50, 25, 27, 51, 1 }, 915 { 3250, 36, 50, 25, 27, 51, 1 }, 916 { 3240, 36, 50, 25, 27, 50, 1 }, 917 { 3230, 36, 50, 25, 27, 50, 1 }, 918 { 3220, 36, 50, 25, 27, 50, 1 }, 919 { 3210, 36, 50, 25, 27, 50, 1 }, 920 { 3200, 36, 50, 25, 27, 50, 1 }, 921 { 3190, 36, 50, 25, 27, 50, 1 }, 922 { 3180, 35, 50, 25, 27, 49, 1 }, 923 { 3170, 35, 50, 25, 27, 49, 1 }, 924 { 3160, 35, 50, 25, 27, 49, 1 }, 925 { 3150, 35, 50, 25, 26, 49, 1 }, 926 { 3140, 35, 50, 25, 26, 49, 1 }, 927 { 3130, 35, 50, 25, 26, 49, 1 }, 928 { 3120, 35, 50, 25, 26, 49, 1 }, 929 { 3110, 35, 50, 25, 26, 48, 1 }, 930 { 3100, 34, 50, 25, 26, 48, 1 }, 931 { 3090, 34, 50, 25, 26, 48, 1 }, 932 { 3080, 34, 50, 25, 26, 48, 1 }, 933 { 3070, 34, 50, 25, 26, 48, 1 }, 934 { 3060, 34, 50, 25, 26, 48, 1 }, 935 { 3050, 34, 50, 25, 26, 47, 1 }, 936 { 3040, 34, 50, 25, 26, 47, 1 }, 937 { 3030, 34, 50, 25, 25, 47, 1 }, 938 { 3020, 34, 50, 25, 25, 47, 1 }, 939 { 3010, 33, 50, 25, 25, 47, 1 }, 940 { 3000, 33, 50, 25, 25, 47, 1 }, 941 { 2990, 33, 50, 25, 25, 46, 1 }, 942 { 2980, 33, 50, 25, 25, 46, 1 }, 943 { 2970, 33, 50, 25, 25, 46, 1 }, 944 { 2960, 33, 50, 25, 25, 46, 1 }, 945 { 2950, 33, 50, 25, 25, 46, 1 }, 946 { 2940, 33, 50, 25, 25, 46, 1 }, 947 { 2930, 33, 50, 25, 25, 46, 1 }, 948 { 2920, 32, 50, 25, 25, 45, 1 }, 949 { 2910, 32, 50, 25, 24, 45, 1 }, 950 { 2900, 32, 50, 25, 24, 45, 1 }, 951 { 2890, 32, 50, 25, 24, 45, 1 }, 952 { 2880, 32, 50, 25, 24, 45, 1 }, 953 { 2870, 32, 50, 25, 24, 45, 1 }, 954 { 2860, 32, 50, 25, 24, 44, 1 }, 955 { 2850, 32, 50, 25, 24, 44, 1 }, 956 { 2840, 31, 50, 25, 24, 44, 1 }, 957 { 2830, 31, 50, 25, 24, 44, 1 }, 958 { 2820, 31, 50, 25, 24, 44, 1 }, 959 { 2810, 31, 50, 25, 24, 44, 1 }, 960 { 2800, 31, 50, 25, 23, 43, 1 }, 961 { 2790, 31, 50, 25, 23, 43, 1 }, 962 { 2780, 31, 50, 25, 23, 43, 1 }, 963 { 2770, 31, 50, 25, 23, 43, 1 }, 964 { 2760, 31, 50, 25, 23, 43, 1 }, 965 { 2750, 30, 50, 25, 23, 43, 1 }, 966 { 2740, 30, 50, 25, 23, 43, 1 }, 967 { 2730, 30, 50, 25, 23, 42, 1 }, 968 { 2720, 30, 50, 25, 23, 42, 1 }, 969 { 2710, 30, 50, 25, 23, 42, 1 }, 970 { 2700, 30, 50, 25, 23, 42, 1 }, 971 { 2690, 30, 50, 25, 23, 42, 1 }, 972 { 2680, 30, 50, 25, 22, 42, 1 }, 973 { 2670, 30, 50, 25, 22, 41, 1 }, 974 { 2660, 29, 50, 25, 22, 41, 1 }, 975 { 2650, 29, 50, 25, 22, 41, 1 }, 976 { 2640, 29, 50, 25, 22, 41, 1 }, 977 { 2630, 29, 50, 25, 22, 41, 1 }, 978 { 2620, 29, 50, 25, 22, 41, 1 }, 979 { 2610, 29, 50, 25, 22, 41, 1 }, 980 { 2600, 29, 50, 25, 22, 40, 1 }, 981 { 2590, 29, 50, 25, 22, 40, 1 }, 982 { 2580, 28, 50, 25, 22, 40, 1 }, 983 { 2570, 28, 50, 25, 22, 40, 1 }, 984 { 2560, 28, 50, 25, 21, 40, 1 }, 985 { 2550, 28, 50, 25, 21, 40, 1 }, 986 { 2540, 28, 50, 25, 21, 39, 1 }, 987 { 2530, 28, 50, 25, 21, 39, 1 }, 988 { 2520, 28, 50, 25, 21, 39, 1 }, 989 { 2510, 28, 50, 25, 21, 39, 1 }, 990 { 2500, 28, 50, 25, 21, 39, 1 }, 991 { 2490, 27, 50, 25, 21, 39, 1 }, 992 { 2480, 27, 50, 25, 21, 38, 1 }, 993 { 2470, 27, 50, 25, 21, 38, 1 }, 994 { 2460, 27, 50, 25, 21, 38, 1 }, 995 { 2450, 27, 50, 25, 20, 38, 1 }, 996 { 2440, 27, 50, 25, 20, 38, 1 }, 997 { 2430, 27, 50, 25, 20, 38, 1 }, 998 { 2420, 27, 50, 25, 20, 38, 1 }, 999 { 2410, 27, 50, 25, 20, 37, 1 }, 1000 { 2400, 26, 50, 25, 20, 37, 1 }, 1001 { 2390, 26, 50, 25, 20, 37, 1 }, 1002 { 2380, 26, 50, 25, 20, 37, 1 }, 1003 { 2370, 26, 50, 25, 20, 37, 1 }, 1004 { 2360, 26, 50, 25, 20, 37, 1 }, 1005 { 2350, 26, 50, 25, 20, 36, 1 }, 1006 { 2340, 26, 50, 25, 20, 36, 1 }, 1007 { 2330, 26, 50, 25, 19, 36, 1 }, 1008 { 2320, 25, 50, 25, 19, 36, 1 }, 1009 { 2310, 25, 50, 25, 19, 36, 1 }, 1010 { 2300, 25, 50, 25, 19, 36, 1 }, 1011 { 2290, 25, 50, 25, 19, 35, 1 }, 1012 { 2280, 25, 50, 25, 19, 35, 1 }, 1013 { 2270, 25, 50, 25, 19, 35, 1 }, 1014 { 2260, 25, 50, 25, 19, 35, 1 }, 1015 { 2250, 25, 50, 25, 19, 35, 1 }, 1016 { 2240, 25, 50, 25, 19, 35, 1 }, 1017 { 2230, 24, 50, 25, 19, 35, 1 }, 1018 { 2220, 24, 50, 25, 19, 34, 1 }, 1019 { 2210, 24, 50, 25, 18, 34, 1 }, 1020 { 2200, 24, 50, 25, 18, 34, 1 }, 1021 { 2190, 24, 50, 25, 18, 34, 1 }, 1022 { 2180, 24, 50, 25, 18, 34, 1 }, 1023 { 2170, 24, 50, 25, 18, 34, 1 }, 1024 { 2160, 24, 50, 25, 18, 33, 1 }, 1025 { 2150, 24, 50, 25, 18, 33, 1 }, 1026 { 2140, 23, 50, 25, 18, 33, 1 }, 1027 { 2130, 23, 50, 25, 18, 33, 1 }, 1028 { 2120, 23, 50, 25, 18, 33, 1 }, 1029 { 2110, 23, 50, 25, 18, 33, 1 }, 1030 { 2100, 23, 50, 25, 17, 32, 1 }, 1031 { 2090, 23, 50, 25, 17, 32, 1 }, 1032 { 2080, 23, 50, 25, 17, 32, 1 }, 1033 { 2070, 23, 50, 25, 17, 32, 1 }, 1034 { 2060, 22, 50, 25, 17, 32, 1 }, 1035 { 2050, 22, 50, 25, 17, 32, 1 }, 1036 { 2040, 22, 50, 25, 17, 32, 1 }, 1037 { 2030, 22, 50, 25, 17, 31, 1 }, 1038 { 2020, 22, 50, 25, 17, 31, 1 }, 1039 { 2010, 22, 50, 25, 17, 31, 1 }, 1040 { 2000, 22, 50, 25, 17, 31, 1 }, 1041 { 1990, 22, 50, 25, 17, 31, 1 }, 1042 { 1980, 22, 50, 25, 16, 31, 1 }, 1043 { 1970, 21, 50, 25, 16, 30, 1 }, 1044 { 1960, 21, 50, 25, 16, 30, 1 }, 1045 { 1950, 21, 50, 25, 16, 30, 1 }, 1046 { 1940, 21, 50, 25, 16, 30, 1 }, 1047 { 1930, 21, 50, 25, 16, 30, 1 }, 1048 { 1920, 21, 50, 25, 16, 30, 1 }, 1049 { 1910, 21, 50, 25, 16, 30, 1 }, 1050 { 1900, 21, 50, 25, 16, 29, 1 }, 1051 { 1890, 21, 50, 25, 16, 29, 1 }, 1052 { 1880, 20, 50, 25, 16, 29, 1 }, 1053 { 1870, 20, 50, 25, 16, 29, 1 }, 1054 { 1860, 20, 50, 25, 15, 29, 1 }, 1055 { 1850, 20, 50, 25, 15, 29, 1 }, 1056 { 1840, 20, 50, 25, 15, 28, 1 }, 1057 { 1830, 20, 50, 25, 15, 28, 1 }, 1058 { 1820, 20, 50, 25, 15, 28, 1 }, 1059 { 1810, 20, 50, 25, 15, 28, 1 }, 1060 { 1800, 19, 50, 25, 15, 28, 1 }, 1061 { 1790, 19, 50, 25, 15, 28, 1 }, 1062 { 1780, 19, 50, 25, 15, 27, 1 }, 1063 { 1770, 19, 50, 25, 15, 27, 1 }, 1064 { 1760, 19, 50, 25, 15, 27, 1 }, 1065 { 1750, 19, 50, 25, 14, 27, 1 }, 1066 { 1740, 19, 50, 25, 14, 27, 1 }, 1067 { 1730, 19, 50, 25, 14, 27, 1 }, 1068 { 1720, 19, 50, 25, 14, 27, 1 }, 1069 { 1710, 18, 50, 25, 14, 26, 1 }, 1070 { 1700, 18, 50, 25, 14, 26, 1 }, 1071 { 1690, 18, 50, 25, 14, 26, 1 }, 1072 { 1680, 18, 50, 25, 14, 26, 1 }, 1073 { 1670, 18, 50, 25, 14, 26, 1 }, 1074 { 1660, 18, 50, 25, 14, 26, 1 }, 1075 { 1650, 18, 50, 25, 14, 25, 1 }, 1076 { 1640, 18, 50, 25, 14, 25, 1 }, 1077 { 1630, 18, 50, 25, 13, 25, 1 }, 1078 { 1620, 17, 50, 25, 13, 25, 1 }, 1079 { 1610, 17, 50, 25, 13, 25, 1 }, 1080 { 1600, 17, 50, 25, 13, 25, 1 }, 1081 { 1590, 17, 50, 25, 13, 24, 1 }, 1082 { 1580, 17, 50, 25, 13, 24, 1 }, 1083 { 1570, 17, 50, 25, 13, 24, 1 }, 1084 { 1560, 17, 50, 25, 13, 24, 1 }, 1085 { 1550, 17, 50, 25, 13, 24, 1 }, 1086 { 1540, 16, 50, 25, 13, 24, 1 }, 1087 { 1530, 16, 50, 25, 13, 24, 1 }, 1088 { 1520, 16, 50, 25, 13, 23, 1 }, 1089 { 1510, 16, 50, 25, 12, 23, 1 }, 1090 { 1500, 16, 50, 25, 12, 23, 1 }, 1091 { 1490, 16, 50, 25, 12, 23, 1 }, 1092 { 1480, 16, 50, 25, 12, 23, 1 }, 1093 { 1470, 16, 50, 25, 12, 23, 1 }, 1094 { 1460, 16, 50, 25, 12, 22, 1 }, 1095 { 1450, 15, 50, 25, 12, 22, 1 }, 1096 { 1440, 15, 50, 25, 12, 22, 1 }, 1097 { 1430, 15, 50, 25, 12, 22, 1 }, 1098 { 1420, 15, 50, 25, 12, 22, 1 }, 1099 { 1410, 15, 50, 25, 12, 22, 1 }, 1100 { 1400, 15, 50, 25, 11, 21, 1 }, 1101 { 1390, 15, 50, 25, 11, 21, 1 }, 1102 { 1380, 15, 50, 25, 11, 21, 1 }, 1103 { 1370, 15, 50, 25, 11, 21, 1 }, 1104 { 1360, 14, 50, 25, 11, 21, 1 }, 1105 { 1350, 14, 50, 25, 11, 21, 1 }, 1106 { 1340, 14, 50, 25, 11, 21, 1 }, 1107 { 1330, 14, 50, 25, 11, 20, 1 }, 1108 { 1320, 14, 50, 25, 11, 20, 1 }, 1109 { 1310, 14, 50, 25, 11, 20, 1 }, 1110 { 1300, 14, 50, 25, 11, 20, 1 }, 1111 { 1290, 14, 50, 25, 11, 20, 1 }, 1112 { 1280, 13, 50, 25, 10, 20, 1 }, 1113 { 1270, 13, 50, 25, 10, 19, 1 }, 1114 { 1260, 13, 50, 25, 10, 19, 1 }, 1115 { 1250, 13, 50, 25, 10, 19, 1 }, 1116 { 1240, 13, 50, 25, 10, 19, 1 }, 1117 { 1230, 13, 50, 25, 10, 19, 1 }, 1118 { 1220, 13, 50, 25, 10, 19, 1 }, 1119 { 1210, 13, 50, 25, 10, 19, 1 }, 1120 { 1200, 13, 50, 25, 10, 18, 1 }, 1121 { 1190, 12, 50, 25, 10, 18, 1 }, 1122 { 1180, 12, 50, 25, 10, 18, 1 }, 1123 { 1170, 12, 50, 25, 10, 18, 1 }, 1124 { 1160, 12, 50, 25, 9, 18, 1 }, 1125 { 1150, 12, 50, 25, 9, 18, 1 }, 1126 { 1140, 12, 50, 25, 9, 17, 1 }, 1127 { 1130, 12, 50, 25, 9, 17, 1 }, 1128 { 1120, 12, 50, 25, 9, 17, 1 }, 1129 { 1110, 12, 50, 25, 9, 17, 1 }, 1130 { 1100, 11, 50, 25, 9, 17, 1 }, 1131 { 1090, 11, 50, 25, 9, 17, 1 }, 1132 { 1080, 11, 50, 25, 9, 16, 1 }, 1133 { 1070, 11, 50, 25, 9, 16, 1 }, 1134 { 1060, 11, 50, 25, 9, 16, 1 }, 1135 { 1050, 11, 50, 25, 8, 16, 1 }, 1136 { 1040, 11, 50, 25, 8, 16, 1 }, 1137 { 1030, 11, 50, 25, 8, 16, 1 }, 1138 { 1020, 10, 50, 25, 8, 16, 1 }, 1139 { 1010, 10, 50, 25, 8, 15, 1 }, 1140 { 1000, 10, 50, 25, 8, 15, 1 }, 1141 { 990, 10, 50, 25, 8, 15, 2 }, 1142 { 980, 10, 50, 25, 8, 15, 2 }, 1143 { 970, 10, 50, 25, 8, 15, 2 }, 1144 { 960, 10, 50, 25, 8, 15, 2 }, 1145 { 950, 10, 50, 25, 8, 14, 2 }, 1146 { 940, 10, 50, 25, 8, 14, 2 }, 1147 { 930, 9, 50, 25, 7, 14, 2 }, 1148 { 920, 9, 50, 25, 7, 14, 2 }, 1149 { 910, 9, 50, 25, 7, 14, 2 }, 1150 { 900, 9, 50, 25, 7, 14, 2 }, 1151 { 890, 9, 50, 25, 7, 13, 2 }, 1152 { 880, 9, 50, 25, 7, 13, 2 }, 1153 { 870, 9, 50, 25, 7, 13, 2 }, 1154 { 860, 9, 50, 25, 7, 13, 2 }, 1155 { 850, 9, 50, 25, 7, 13, 2 }, 1156 { 840, 8, 50, 25, 7, 13, 2 }, 1157 { 830, 8, 50, 25, 7, 13, 2 }, 1158 { 820, 8, 50, 25, 7, 12, 2 }, 1159 { 810, 8, 50, 25, 6, 12, 2 }, 1160 { 800, 8, 50, 25, 6, 12, 2 }, 1161 { 790, 8, 50, 25, 6, 12, 2 }, 1162 { 780, 8, 50, 25, 6, 12, 2 }, 1163 { 770, 8, 50, 25, 6, 12, 2 }, 1164 { 760, 7, 50, 25, 6, 11, 2 }, 1165 { 750, 7, 50, 25, 6, 11, 2 }, 1166 { 740, 7, 50, 25, 6, 11, 2 }, 1167 { 730, 7, 50, 25, 6, 11, 2 }, 1168 { 720, 7, 50, 25, 6, 11, 2 }, 1169 { 710, 7, 50, 25, 6, 11, 2 }, 1170 { 700, 7, 50, 25, 5, 10, 2 }, 1171 { 690, 7, 50, 25, 5, 10, 2 }, 1172 { 680, 7, 50, 25, 5, 10, 2 }, 1173 { 670, 6, 50, 25, 5, 10, 2 }, 1174 { 660, 6, 50, 25, 5, 10, 2 }, 1175 { 650, 6, 50, 25, 5, 10, 2 }, 1176 { 640, 6, 50, 25, 5, 10, 2 }, 1177 { 630, 6, 50, 25, 5, 9, 2 }, 1178 { 620, 6, 50, 25, 5, 9, 2 }, 1179 { 610, 6, 50, 25, 5, 9, 2 }, 1180 { 600, 6, 50, 25, 5, 9, 2 }, 1181 { 590, 6, 50, 25, 5, 9, 2 }, 1182 { 580, 5, 50, 25, 4, 9, 2 }, 1183 { 570, 5, 50, 25, 4, 8, 2 }, 1184 { 560, 5, 50, 25, 4, 8, 2 }, 1185 { 550, 5, 50, 25, 4, 8, 2 }, 1186 { 540, 5, 50, 25, 4, 8, 2 }, 1187 { 530, 5, 50, 25, 4, 8, 2 }, 1188 { 520, 5, 50, 25, 4, 8, 2 }, 1189 { 510, 5, 50, 25, 4, 8, 2 }, 1190 { 500, 4, 50, 25, 4, 7, 2 }, 1191 { 490, 18, 50, 25, 14, 6, 2 }, 1192 { 480, 17, 50, 25, 14, 6, 2 }, 1193 { 470, 17, 50, 25, 14, 6, 2 }, 1194 { 460, 17, 50, 25, 13, 6, 2 }, 1195 { 450, 16, 50, 25, 13, 6, 2 }, 1196 { 440, 16, 50, 25, 13, 6, 2 }, 1197 { 430, 15, 50, 25, 12, 6, 2 }, 1198 { 420, 15, 50, 25, 12, 5, 2 }, 1199 { 410, 15, 50, 25, 12, 5, 2 }, 1200 { 400, 14, 50, 25, 11, 5, 2 }, 1201 { 390, 14, 50, 25, 11, 5, 2 }, 1202 { 380, 13, 50, 25, 11, 5, 2 }, 1203 { 370, 13, 50, 25, 11, 5, 2 }, 1204 { 360, 13, 50, 25, 10, 4, 2 }, 1205 { 350, 12, 50, 25, 10, 4, 2 }, 1206 { 340, 12, 50, 25, 10, 4, 2 }, 1207 { 330, 11, 50, 25, 9, 4, 2 }, 1208 { 320, 11, 50, 25, 9, 4, 2 }, 1209 { 310, 11, 50, 25, 9, 4, 2 }, 1210 { 300, 10, 50, 25, 8, 3, 2 }, 1211 { 290, 10, 50, 25, 8, 3, 2 }, 1212 { 280, 9, 50, 25, 8, 3, 2 }, 1213 { 270, 9, 50, 25, 8, 3, 2 }, 1214 { 260, 8, 50, 25, 7, 3, 2 }, 1215 { 250, 8, 50, 25, 7, 3, 2 }, 1216 { 240, 8, 50, 25, 7, 3, 2 }, 1217 { 230, 7, 50, 25, 6, 2, 2 }, 1218 { 220, 7, 50, 25, 6, 2, 2 }, 1219 { 210, 6, 50, 25, 6, 2, 2 }, 1220 { 200, 6, 50, 25, 5, 2, 2 }, 1221 { 190, 6, 50, 25, 5, 2, 2 }, 1222 { 180, 5, 50, 25, 5, 2, 2 }, 1223 { 170, 5, 50, 25, 5, 1, 2 }, 1224 { 160, 4, 50, 25, 4, 1, 2 }, 1225 { 150, 4, 50, 25, 4, 1, 2 }, 1226 { 140, 4, 50, 25, 4, 1, 2 }, 1227 { 130, 3, 50, 25, 3, 1, 2 }, 1228 { 120, 3, 50, 25, 3, 1, 2 }, 1229 { 110, 2, 50, 25, 3, 1, 2 }, 1230 { 100, 2, 50, 25, 2, 0, 2 }, 1231 { 90, 2, 50, 25, 2, 0, 2 }, 1232 { 80, 1, 50, 25, 2, 0, 2 }, 1233 }; 1234 1235 static inline void 1236 phy_write(struct samsung_mipi_dcphy *samsung, u32 reg, u32 val) 1237 { 1238 writel(val, samsung->base + reg); 1239 } 1240 1241 static inline u32 phy_read(struct samsung_mipi_dcphy *samsung, u32 reg) 1242 { 1243 return readl(samsung->base + reg); 1244 } 1245 1246 static inline void phy_update_bits(struct samsung_mipi_dcphy *samsung, 1247 u32 reg, u32 mask, u32 val) 1248 { 1249 u32 orig, tmp; 1250 1251 orig = phy_read(samsung, reg); 1252 tmp = orig & ~mask; 1253 tmp |= val & mask; 1254 phy_write(samsung, reg, tmp); 1255 } 1256 1257 static inline void grf_write(struct samsung_mipi_dcphy *samsung, 1258 u32 reg, u32 val) 1259 { 1260 regmap_write(samsung->grf, reg, val); 1261 } 1262 1263 static const struct samsung_mipi_dphy_timing * 1264 samsung_mipi_dphy_get_timing(struct samsung_mipi_dcphy *samsung) 1265 { 1266 const struct samsung_mipi_dphy_timing *timings; 1267 unsigned int num_timings; 1268 unsigned int lane_mbps = samsung->pll.rate / USEC_PER_SEC; 1269 unsigned int i; 1270 1271 timings = samsung_mipi_dphy_timing_table; 1272 num_timings = ARRAY_SIZE(samsung_mipi_dphy_timing_table); 1273 1274 for (i = num_timings; i > 0; i--) 1275 if (lane_mbps <= timings[i - 1].max_lane_mbps) 1276 break; 1277 1278 if (i == 0) 1279 ++i; 1280 1281 return &timings[i - 1]; 1282 } 1283 1284 static const struct samsung_mipi_cphy_timing * 1285 samsung_mipi_cphy_get_timing(struct samsung_mipi_dcphy *samsung) 1286 { 1287 const struct samsung_mipi_cphy_timing *timings; 1288 unsigned int num_timings; 1289 unsigned int lane_msps = div64_ul(samsung->pll.rate, USEC_PER_SEC); 1290 unsigned int i; 1291 1292 timings = samsung_mipi_cphy_timing_table; 1293 num_timings = ARRAY_SIZE(samsung_mipi_cphy_timing_table); 1294 1295 for (i = num_timings; i > 0; i--) 1296 if (lane_msps <= timings[i - 1].max_lane_msps) 1297 break; 1298 1299 if (i == 0) 1300 ++i; 1301 1302 return &timings[i - 1]; 1303 } 1304 1305 static void samsung_mipi_dcphy_bias_block_enable(struct samsung_mipi_dcphy *samsung) 1306 { 1307 phy_write(samsung, BIAS_CON0, 0x0010); 1308 phy_write(samsung, BIAS_CON1, 0x0110); 1309 phy_write(samsung, BIAS_CON2, 0x3223); 1310 1311 if (samsung->c_option) 1312 phy_update_bits(samsung, BIAS_CON4, I_MUX_SEL_MASK, I_MUX_SEL(2)); 1313 } 1314 1315 static void samsung_mipi_dcphy_bias_block_disable(struct samsung_mipi_dcphy *samsung) 1316 { 1317 } 1318 1319 static void samsung_mipi_dcphy_pll_configure(struct samsung_mipi_dcphy *samsung) 1320 { 1321 phy_update_bits(samsung, PLL_CON0, S_MASK | P_MASK, 1322 S(samsung->pll.scaler) | P(samsung->pll.prediv)); 1323 1324 if (samsung->pll.dsm < 0) { 1325 u16 dsm_tmp; 1326 1327 /* Using opposite number subtraction to find complement */ 1328 dsm_tmp = abs(samsung->pll.dsm); 1329 dsm_tmp = dsm_tmp - 1; 1330 dsm_tmp ^= 0xffff; 1331 phy_write(samsung, PLL_CON1, dsm_tmp); 1332 } else { 1333 phy_write(samsung, PLL_CON1, samsung->pll.dsm); 1334 } 1335 1336 phy_update_bits(samsung, PLL_CON2, M_MASK, M(samsung->pll.fbdiv)); 1337 1338 if (samsung->pll.ssc_en) { 1339 phy_write(samsung, PLL_CON3, 1340 MRR(samsung->pll.mrr) | MFR(samsung->pll.mfr)); 1341 phy_update_bits(samsung, PLL_CON4, SSCG_EN, SSCG_EN); 1342 } 1343 1344 phy_write(samsung, PLL_CON5, RESET_N_SEL | PLL_ENABLE_SEL); 1345 phy_write(samsung, PLL_CON7, PLL_LOCK_CNT(0xf000)); 1346 phy_write(samsung, PLL_CON8, PLL_STB_CNT(0xf000)); 1347 } 1348 1349 static void 1350 samsung_mipi_dphy_clk_lane_timing_init(struct samsung_mipi_dcphy *samsung) 1351 { 1352 const struct samsung_mipi_dphy_timing *timing; 1353 unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC); 1354 u32 val, res_up, res_down; 1355 1356 timing = samsung_mipi_dphy_get_timing(samsung); 1357 phy_write(samsung, DPHY_MC_GNR_CON0, 0xf000); 1358 1359 /* 1360 * The Drive-Strength / Voltage-Amplitude is adjusted by adjusting the 1361 * Driver-Up Resistor and Driver-Down Resistor. 1362 */ 1363 res_up = samsung->pdata->dphy_hs_drv_res_cfg->clk_hs_drv_up_ohm; 1364 res_down = samsung->pdata->dphy_hs_drv_res_cfg->clk_hs_drv_down_ohm; 1365 val = EDGE_CON(7) | EDGE_CON_DIR(0) | EDGE_CON_EN | 1366 RES_UP(res_up) | RES_DN(res_down); 1367 phy_write(samsung, DPHY_MC_ANA_CON0, val); 1368 1369 if (lane_hs_rate >= 4500) 1370 phy_write(samsung, DPHY_MC_ANA_CON1, 0x0001); 1371 1372 val = 0; 1373 /* 1374 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under 1375 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock 1376 */ 1377 if (lane_hs_rate < 1500) 1378 val = HSTX_CLK_SEL; 1379 1380 val |= T_LPX(timing->lpx); 1381 /* T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */ 1382 phy_write(samsung, DPHY_MC_TIME_CON0, val); 1383 1384 val = T_CLK_ZERO(timing->clk_zero) | T_CLK_PREPARE(timing->clk_prepare); 1385 phy_write(samsung, DPHY_MC_TIME_CON1, val); 1386 1387 val = T_HS_EXIT(timing->hs_exit) | T_CLK_TRAIL(timing->clk_trail_eot); 1388 phy_write(samsung, DPHY_MC_TIME_CON2, val); 1389 1390 val = T_CLK_POST(timing->clk_post); 1391 phy_write(samsung, DPHY_MC_TIME_CON3, val); 1392 1393 /* Escape Clock is 20.00MHz */ 1394 phy_write(samsung, DPHY_MC_TIME_CON4, 0x1f4); 1395 1396 /* 1397 * skew calibration should be off, if the operation data rate is 1398 * under 1.5Gbps or equal to 1.5Gbps. 1399 */ 1400 if (lane_hs_rate > 1500) 1401 phy_write(samsung, DPHY_MC_DESKEW_CON0, 0x9cb1); 1402 } 1403 1404 static void 1405 samsung_mipi_dphy_data_lane_timing_init(struct samsung_mipi_dcphy *samsung) 1406 { 1407 const struct samsung_mipi_dphy_timing *timing; 1408 unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC); 1409 u32 val, res_up, res_down; 1410 1411 timing = samsung_mipi_dphy_get_timing(samsung); 1412 1413 /* 1414 * The Drive-Strength / Voltage-Amplitude is adjusted by adjusting the 1415 * Driver-Up Resistor and Driver-Down Resistor. 1416 */ 1417 res_up = samsung->pdata->dphy_hs_drv_res_cfg->data_hs_drv_up_ohm; 1418 res_down = samsung->pdata->dphy_hs_drv_res_cfg->data_hs_drv_down_ohm; 1419 val = EDGE_CON(7) | EDGE_CON_DIR(0) | EDGE_CON_EN | 1420 RES_UP(res_up) | RES_DN(res_down); 1421 phy_write(samsung, COMBO_MD0_ANA_CON0, val); 1422 phy_write(samsung, COMBO_MD1_ANA_CON0, val); 1423 phy_write(samsung, COMBO_MD2_ANA_CON0, val); 1424 phy_write(samsung, DPHY_MD3_ANA_CON0, val); 1425 1426 if (lane_hs_rate >= 1500) { 1427 phy_write(samsung, COMBO_MD0_ANA_CON1, 0x0001); 1428 phy_write(samsung, COMBO_MD1_ANA_CON1, 0x0001); 1429 phy_write(samsung, COMBO_MD2_ANA_CON1, 0x0001); 1430 phy_write(samsung, DPHY_MD3_ANA_CON1, 0x0001); 1431 } 1432 1433 val = 0; 1434 /* 1435 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under 1436 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock 1437 */ 1438 if (lane_hs_rate < 1500) 1439 val = HSTX_CLK_SEL; 1440 1441 val |= T_LPX(timing->lpx); 1442 /* T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */ 1443 phy_write(samsung, COMBO_MD0_TIME_CON0, val); 1444 phy_write(samsung, COMBO_MD1_TIME_CON0, val); 1445 phy_write(samsung, COMBO_MD2_TIME_CON0, val); 1446 phy_write(samsung, DPHY_MD3_TIME_CON0, val); 1447 1448 val = T_HS_ZERO(timing->hs_zero) | T_HS_PREPARE(timing->hs_prepare); 1449 phy_write(samsung, COMBO_MD0_TIME_CON1, val); 1450 phy_write(samsung, COMBO_MD1_TIME_CON1, val); 1451 phy_write(samsung, COMBO_MD2_TIME_CON1, val); 1452 phy_write(samsung, DPHY_MD3_TIME_CON1, val); 1453 1454 val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->hs_trail_eot); 1455 phy_write(samsung, COMBO_MD0_TIME_CON2, val); 1456 phy_write(samsung, COMBO_MD1_TIME_CON2, val); 1457 phy_write(samsung, COMBO_MD2_TIME_CON2, val); 1458 phy_write(samsung, DPHY_MD3_TIME_CON2, val); 1459 1460 /* TTA-GET/TTA-GO Timing Counter register use default value */ 1461 val = T_TA_GET(0x3) | T_TA_GO(0x0); 1462 phy_write(samsung, COMBO_MD0_TIME_CON3, val); 1463 phy_write(samsung, COMBO_MD1_TIME_CON3, val); 1464 phy_write(samsung, COMBO_MD2_TIME_CON3, val); 1465 phy_write(samsung, DPHY_MD3_TIME_CON3, val); 1466 1467 /* Escape Clock is 20.00MHz */ 1468 phy_write(samsung, COMBO_MD0_TIME_CON4, 0x1f4); 1469 phy_write(samsung, COMBO_MD1_TIME_CON4, 0x1f4); 1470 phy_write(samsung, COMBO_MD2_TIME_CON4, 0x1f4); 1471 phy_write(samsung, DPHY_MD3_TIME_CON4, 0x1f4); 1472 } 1473 1474 static void samsung_mipi_dcphy_pll_enable(struct samsung_mipi_dcphy *samsung) 1475 { 1476 u32 sts; 1477 int ret; 1478 1479 phy_update_bits(samsung, PLL_CON0, PLL_EN, PLL_EN); 1480 1481 ret = readl_poll_timeout(samsung->base + PLL_STAT0, 1482 sts, (sts & PLL_LOCK), 20000); 1483 if (ret < 0) 1484 dev_err(samsung->dev, "DC-PHY pll is not locked\n"); 1485 } 1486 1487 static void samsung_mipi_dcphy_pll_disable(struct samsung_mipi_dcphy *samsung) 1488 { 1489 phy_update_bits(samsung, PLL_CON0, PLL_EN, 0); 1490 } 1491 1492 static void samsung_mipi_dphy_lane_enable(struct samsung_mipi_dcphy *samsung) 1493 { 1494 phy_write(samsung, DPHY_MC_GNR_CON1, T_PHY_READY(0x2000)); 1495 phy_update_bits(samsung, DPHY_MC_GNR_CON0, PHY_ENABLE, PHY_ENABLE); 1496 1497 switch (samsung->lanes) { 1498 case 4: 1499 phy_write(samsung, DPHY_MD3_GNR_CON1, T_PHY_READY(0x2000)); 1500 phy_update_bits(samsung, DPHY_MD3_GNR_CON0, 1501 PHY_ENABLE, PHY_ENABLE); 1502 //fallthrough; 1503 case 3: 1504 phy_write(samsung, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000)); 1505 phy_update_bits(samsung, COMBO_MD2_GNR_CON0, 1506 PHY_ENABLE, PHY_ENABLE); 1507 //fallthrough; 1508 case 2: 1509 phy_write(samsung, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000)); 1510 phy_update_bits(samsung, COMBO_MD1_GNR_CON0, 1511 PHY_ENABLE, PHY_ENABLE); 1512 //fallthrough; 1513 case 1: 1514 default: 1515 phy_write(samsung, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000)); 1516 phy_update_bits(samsung, COMBO_MD0_GNR_CON0, 1517 PHY_ENABLE, PHY_ENABLE); 1518 break; 1519 } 1520 } 1521 1522 static void samsung_mipi_cphy_timing_init(struct samsung_mipi_dcphy *samsung) 1523 { 1524 const struct samsung_mipi_cphy_timing *timing; 1525 unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC); 1526 u32 val = 0; 1527 1528 timing = samsung_mipi_cphy_get_timing(samsung); 1529 1530 /* 1531 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under 1532 * 500Msps, otherwise divide-by-16 Clock from Serial Clock 1533 */ 1534 if (lane_hs_rate < 500) 1535 val = HSTX_CLK_SEL; 1536 1537 val |= T_LPX(timing->lpx); 1538 /* T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */ 1539 phy_write(samsung, COMBO_MD0_TIME_CON0, val); 1540 phy_write(samsung, COMBO_MD1_TIME_CON0, val); 1541 phy_write(samsung, COMBO_MD2_TIME_CON0, val); 1542 1543 val = T_HS_ZERO(timing->prebegin_3) | T_HS_PREPARE(timing->prepare_3); 1544 phy_write(samsung, COMBO_MD0_TIME_CON1, val); 1545 phy_write(samsung, COMBO_MD1_TIME_CON1, val); 1546 phy_write(samsung, COMBO_MD2_TIME_CON1, val); 1547 1548 val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->post_3); 1549 phy_write(samsung, DPHY_MD3_TIME_CON2, val); 1550 phy_write(samsung, COMBO_MD0_TIME_CON2, val); 1551 phy_write(samsung, COMBO_MD1_TIME_CON2, val); 1552 phy_write(samsung, COMBO_MD2_TIME_CON2, val); 1553 1554 /* TTA-GET/TTA-GO Timing Counter register use default value */ 1555 val = T_TA_GET(0x3) | T_TA_GO(0x0); 1556 phy_write(samsung, COMBO_MD0_TIME_CON3, val); 1557 phy_write(samsung, COMBO_MD1_TIME_CON3, val); 1558 phy_write(samsung, COMBO_MD2_TIME_CON3, val); 1559 1560 /* Escape Clock is 20.00MHz */ 1561 phy_write(samsung, COMBO_MD0_TIME_CON4, 0x1f4); 1562 phy_write(samsung, COMBO_MD1_TIME_CON4, 0x1f4); 1563 phy_write(samsung, COMBO_MD2_TIME_CON4, 0x1f4); 1564 1565 /* set T_ERR_SOT_SYNC default value */ 1566 } 1567 1568 static void samsung_mipi_cphy_lane_enable(struct samsung_mipi_dcphy *samsung) 1569 { 1570 phy_write(samsung, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000)); 1571 phy_write(samsung, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000)); 1572 phy_write(samsung, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000)); 1573 1574 phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, PHY_ENABLE); 1575 phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, PHY_ENABLE); 1576 phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, PHY_ENABLE); 1577 } 1578 1579 static void 1580 samsung_mipi_dcphy_hs_vreg_amp_config(struct samsung_mipi_dcphy *samsung) 1581 { 1582 phy_write(samsung, DPHY_MC_ANA_CON2, HS_VREG_AMP_ICON(2)); 1583 } 1584 1585 static void samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung) 1586 { 1587 reset_assert(&samsung->m_phy_rst); 1588 1589 samsung_mipi_dcphy_bias_block_enable(samsung); 1590 samsung_mipi_dcphy_pll_configure(samsung); 1591 samsung_mipi_dphy_clk_lane_timing_init(samsung); 1592 samsung_mipi_dphy_data_lane_timing_init(samsung); 1593 samsung_mipi_dcphy_pll_enable(samsung); 1594 samsung_mipi_dphy_lane_enable(samsung); 1595 1596 reset_deassert(&samsung->m_phy_rst); 1597 1598 /* The Tskewcal maximum is 100 usec at initial calibration. */ 1599 udelay(100); 1600 } 1601 1602 static void samsung_mipi_cphy_power_on(struct samsung_mipi_dcphy *samsung) 1603 { 1604 grf_write(samsung, MIPI_DCPHY_GRF_CON0, M_CPHY_MODE); 1605 reset_assert(&samsung->m_phy_rst); 1606 1607 samsung_mipi_dcphy_bias_block_enable(samsung); 1608 samsung_mipi_dcphy_hs_vreg_amp_config(samsung); 1609 samsung_mipi_dcphy_pll_configure(samsung); 1610 samsung_mipi_cphy_timing_init(samsung); 1611 samsung_mipi_dcphy_pll_enable(samsung); 1612 samsung_mipi_cphy_lane_enable(samsung); 1613 1614 reset_deassert(&samsung->m_phy_rst); 1615 } 1616 1617 static void samsung_mipi_dphy_lane_disable(struct samsung_mipi_dcphy *samsung) 1618 { 1619 phy_update_bits(samsung, DPHY_MC_GNR_CON0, PHY_ENABLE, 0); 1620 phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, 0); 1621 phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, 0); 1622 phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, 0); 1623 phy_update_bits(samsung, DPHY_MD3_GNR_CON0, PHY_ENABLE, 0); 1624 } 1625 1626 static void samsung_mipi_cphy_lane_disable(struct samsung_mipi_dcphy *samsung) 1627 { 1628 phy_update_bits(samsung, COMBO_MD0_GNR_CON0, PHY_ENABLE, 0); 1629 phy_update_bits(samsung, COMBO_MD1_GNR_CON0, PHY_ENABLE, 0); 1630 phy_update_bits(samsung, COMBO_MD2_GNR_CON0, PHY_ENABLE, 0); 1631 } 1632 1633 static int samsung_mipi_dcphy_power_on(struct rockchip_phy *phy) 1634 { 1635 struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev); 1636 1637 if (samsung->mode == PHY_MODE_MIPI_DPHY) 1638 samsung_mipi_dphy_power_on(samsung); 1639 else 1640 samsung_mipi_cphy_power_on(samsung); 1641 1642 return 0; 1643 } 1644 1645 static int samsung_mipi_dcphy_power_off(struct rockchip_phy *phy) 1646 { 1647 struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev); 1648 1649 if (samsung->mode == PHY_MODE_MIPI_DPHY) 1650 samsung_mipi_dphy_lane_disable(samsung); 1651 else 1652 samsung_mipi_cphy_lane_disable(samsung); 1653 1654 samsung_mipi_dcphy_pll_disable(samsung); 1655 samsung_mipi_dcphy_bias_block_disable(samsung); 1656 1657 return 0; 1658 } 1659 1660 static int 1661 samsung_mipi_dcphy_pll_ssc_modulation_calc(struct samsung_mipi_dcphy *samsung, 1662 u8 *mfr, u8 *mrr) 1663 { 1664 unsigned long fin = 24000; 1665 u16 prediv = samsung->pll.prediv; 1666 u16 fbdiv = samsung->pll.fbdiv; 1667 u16 min_mfr, max_mfr; 1668 u16 _mfr, best_mfr = 0; 1669 u16 mr, _mrr, best_mrr = 0; 1670 1671 /* 20KHz ≤ MF ≤ 150KHz */ 1672 max_mfr = DIV_ROUND_UP(fin, (20 * prediv) << 5); 1673 min_mfr = div64_ul(fin, ((150 * prediv) << 5)); 1674 /*0 ≤ mfr ≤ 255 */ 1675 if (max_mfr > 256) 1676 max_mfr = 256; 1677 1678 for (_mfr = min_mfr; _mfr < max_mfr; _mfr++) { 1679 /* 1 ≤ mrr ≤ 31 */ 1680 for (_mrr = 1; _mrr < 32; _mrr++) { 1681 mr = DIV_ROUND_UP(_mfr * _mrr * 100, fbdiv << 6); 1682 /* 0 ≤ MR ≤ 5% */ 1683 if (mr > 5) 1684 continue; 1685 1686 if (_mfr * _mrr < 513) { 1687 best_mfr = _mfr; 1688 best_mrr = _mrr; 1689 break; 1690 } 1691 } 1692 } 1693 1694 if (best_mrr) { 1695 *mfr = best_mfr & 0xff; 1696 *mrr = best_mrr & 0x3f; 1697 } else { 1698 dev_err(samsung->dev, "failed to calc ssc parameter mfr and mrr\n"); 1699 return -EINVAL; 1700 } 1701 1702 return 0; 1703 } 1704 1705 static unsigned long 1706 samsung_mipi_dcphy_pll_round_rate(struct samsung_mipi_dcphy *samsung, 1707 unsigned long prate, unsigned long rate, 1708 u8 *prediv, u16 *fbdiv, int *dsm, u8 *scaler) 1709 { 1710 u32 max_fout = samsung->c_option ? 1711 samsung->pdata->cphy_tx_max_ksps_per_lane : 1712 samsung->pdata->dphy_tx_max_kbps_per_lane; 1713 u64 best_freq = 0; 1714 u64 fin, fvco, fout; 1715 u8 min_prediv, max_prediv; 1716 u8 _prediv, best_prediv = 1; 1717 u16 _fbdiv, best_fbdiv = 1; 1718 u8 _scaler, best_scaler = 0; 1719 long _dsm, best_dsm = 0; 1720 u32 min_delta = 0xffffffff; 1721 1722 if (!prate) { 1723 dev_err(samsung->dev, "prate of pll can not be set zero\n"); 1724 return 0; 1725 } 1726 1727 /* 1728 * The PLL output frequency can be calculated using a simple formula: 1729 * Fvco = ((m+k/65536) x 2 x Fin) / p 1730 * Fout = ((m+k/65536) x 2 x Fin) / (p x 2^s) 1731 */ 1732 fin = div64_ul(prate, MSEC_PER_SEC); 1733 1734 while (!best_freq) { 1735 fout = div64_ul(rate, MSEC_PER_SEC); 1736 if (fout > max_fout) 1737 fout = max_fout; 1738 1739 /* 0 ≤ S[2:0] ≤ 6 */ 1740 for (_scaler = 0; _scaler < 7; _scaler++) { 1741 fvco = fout << _scaler; 1742 1743 /* 1744 * 2600MHz ≤ FVCO ≤ 6600MHz 1745 */ 1746 if (fvco < 2600 * MSEC_PER_SEC || fvco > 6600 * MSEC_PER_SEC) 1747 continue; 1748 1749 /* 6MHz ≤ Fref(Fin / p) ≤ 30MHz */ 1750 min_prediv = DIV_ROUND_UP(fin, 30 * MSEC_PER_SEC); 1751 max_prediv = DIV_ROUND_CLOSEST(fin, 6 * MSEC_PER_SEC); 1752 1753 for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) { 1754 u64 delta, tmp; 1755 1756 _fbdiv = DIV_ROUND_CLOSEST(fvco * _prediv, 2 * fin); 1757 1758 /* 64 ≤ M[9:0] ≤ 1023 */ 1759 if ((_fbdiv < 64) || (_fbdiv > 1023)) 1760 continue; 1761 1762 /* -32767 ≤ K[15:0] ≤ 32767 */ 1763 _dsm = ((_prediv * fvco) - (2 * _fbdiv * fin)); 1764 _dsm = DIV_ROUND_UP(_dsm << 15, fin); 1765 if (abs(_dsm) > 32767) 1766 continue; 1767 1768 tmp = DIV_ROUND_CLOSEST((_fbdiv * fin * 2 * 1000), _prediv); 1769 tmp += DIV_ROUND_CLOSEST((_dsm * fin * 1000), _prediv << 15); 1770 1771 delta = abs(fvco * MSEC_PER_SEC - tmp); 1772 if (delta < min_delta) { 1773 best_prediv = _prediv; 1774 best_fbdiv = _fbdiv; 1775 best_dsm = _dsm; 1776 best_scaler = _scaler; 1777 min_delta = delta; 1778 best_freq = DIV_ROUND_CLOSEST(tmp, 1000) * MSEC_PER_SEC; 1779 } 1780 } 1781 } 1782 1783 rate += 100 * MSEC_PER_SEC; 1784 } 1785 1786 *prediv = best_prediv; 1787 *fbdiv = best_fbdiv; 1788 *dsm = (int)best_dsm & 0xffff; 1789 *scaler = best_scaler; 1790 dev_info(samsung->dev, "p: %d, m: %d, dsm:%ld, scaler: %d\n", 1791 best_prediv, best_fbdiv, best_dsm, best_scaler); 1792 1793 return best_freq >> best_scaler; 1794 } 1795 1796 static unsigned long samsung_mipi_dcphy_set_pll(struct rockchip_phy *phy, 1797 unsigned long rate) 1798 { 1799 struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev); 1800 unsigned long fin = 24000000, fout; 1801 u8 scaler = 0, mfr = 0, mrr = 0; 1802 u16 fbdiv = 0; 1803 u8 prediv = 1; 1804 int dsm = 0; 1805 int ret; 1806 1807 samsung->c_option = (samsung->mode == PHY_MODE_MIPI_DPHY) ? false : true; 1808 fout = samsung_mipi_dcphy_pll_round_rate(samsung, fin, rate, &prediv, 1809 &fbdiv, &dsm, &scaler); 1810 1811 dev_info(samsung->dev, "fin=%lu, req_rate=%lu\n", fin, rate); 1812 dev_info(samsung->dev, "fout=%lu, prediv=%u, fbdiv=%u\n", fout, prediv, fbdiv); 1813 1814 samsung->pll.prediv = prediv; 1815 samsung->pll.fbdiv = fbdiv; 1816 samsung->pll.dsm = dsm; 1817 samsung->pll.scaler = scaler; 1818 samsung->pll.rate = fout; 1819 1820 /* 1821 * All DPHY 2.0 compliant Transmitters shall support SSC operating above 1822 * 2.5 Gbps 1823 */ 1824 if (fout > 2500000000LL) { 1825 ret = samsung_mipi_dcphy_pll_ssc_modulation_calc(samsung, 1826 &mfr, &mrr); 1827 if (!ret) { 1828 samsung->pll.ssc_en = true; 1829 samsung->pll.mfr = mfr; 1830 samsung->pll.mrr = mrr; 1831 } 1832 } 1833 1834 return fout; 1835 } 1836 1837 static int samsung_mipi_dcphy_set_mode(struct rockchip_phy *phy, 1838 enum phy_mode mode) 1839 { 1840 struct samsung_mipi_dcphy *samsung = dev_get_priv(phy->dev); 1841 1842 samsung->mode = mode; 1843 1844 return 0; 1845 } 1846 1847 static int samsung_mipi_dcphy_probe(struct udevice *dev) 1848 { 1849 struct samsung_mipi_dcphy *samsung = dev_get_priv(dev); 1850 struct rockchip_phy *tmp_phy; 1851 struct rockchip_phy *phy; 1852 struct udevice *syscon; 1853 int ret; 1854 1855 phy = calloc(1, sizeof(*phy)); 1856 if (!phy) 1857 return -ENOMEM; 1858 1859 tmp_phy = (struct rockchip_phy *)dev_get_driver_data(dev); 1860 dev->driver_data = (ulong)phy; 1861 memcpy(phy, tmp_phy, sizeof(*phy)); 1862 1863 samsung->pdata = (struct samsung_mipi_dcphy_plat_data *)phy->data; 1864 samsung->lanes = ofnode_read_u32_default(dev->node, "samsung,lanes", 4); 1865 1866 samsung->base = dev_read_addr_ptr(dev); 1867 if (IS_ERR(samsung->base)) { 1868 dev_err(dev, "resource \"phy\" not found\n"); 1869 return PTR_ERR(samsung->base); 1870 } 1871 1872 ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf", 1873 &syscon); 1874 if (!ret) { 1875 samsung->grf = syscon_get_regmap(syscon); 1876 if (!samsung->grf) 1877 return -ENODEV; 1878 } 1879 1880 ret = reset_get_by_name(dev, "m_phy", &samsung->m_phy_rst); 1881 if (ret) { 1882 ret = reset_get_by_name(dev, "phy", &samsung->m_phy_rst); 1883 if (ret) { 1884 pr_err("reset_get_by_name(phy) failed: %d\n", ret); 1885 return ret; 1886 } 1887 } 1888 1889 phy->dev = dev; 1890 1891 return 0; 1892 } 1893 1894 static const struct rockchip_phy_funcs samsung_mipi_dcphy_funcs = { 1895 .power_on = samsung_mipi_dcphy_power_on, 1896 .power_off = samsung_mipi_dcphy_power_off, 1897 .set_pll = samsung_mipi_dcphy_set_pll, 1898 .set_mode = samsung_mipi_dcphy_set_mode, 1899 }; 1900 1901 static const struct hs_drv_res_cfg rk3576_dphy_hs_drv_res_cfg = { 1902 .clk_hs_drv_up_ohm = _52_OHM, 1903 .clk_hs_drv_down_ohm = _52_OHM, 1904 .data_hs_drv_up_ohm = _39_OHM, 1905 .data_hs_drv_down_ohm = _39_OHM, 1906 }; 1907 1908 static const struct hs_drv_res_cfg rk3588_dphy_hs_drv_res_cfg = { 1909 .clk_hs_drv_up_ohm = _34_OHM, 1910 .clk_hs_drv_down_ohm = _34_OHM, 1911 .data_hs_drv_up_ohm = _43_OHM, 1912 .data_hs_drv_down_ohm = _43_OHM, 1913 }; 1914 1915 static const struct samsung_mipi_dcphy_plat_data rk3576_samsung_mipi_dcphy_plat_data = { 1916 .dphy_hs_drv_res_cfg = &rk3576_dphy_hs_drv_res_cfg, 1917 .dphy_tx_max_kbps_per_lane = 2500000L, 1918 .cphy_tx_max_ksps_per_lane = 1700000L, 1919 }; 1920 1921 static const struct samsung_mipi_dcphy_plat_data rk3588_samsung_mipi_dcphy_plat_data = { 1922 .dphy_hs_drv_res_cfg = &rk3588_dphy_hs_drv_res_cfg, 1923 .dphy_tx_max_kbps_per_lane = 4500000L, 1924 .cphy_tx_max_ksps_per_lane = 2000000L, 1925 }; 1926 1927 static struct rockchip_phy rk3576_samsung_mipi_dcphy_driver_data = { 1928 .data = &rk3576_samsung_mipi_dcphy_plat_data, 1929 .funcs = &samsung_mipi_dcphy_funcs, 1930 }; 1931 1932 static struct rockchip_phy rk3588_samsung_mipi_dcphy_driver_data = { 1933 .data = &rk3588_samsung_mipi_dcphy_plat_data, 1934 .funcs = &samsung_mipi_dcphy_funcs, 1935 }; 1936 1937 static const struct udevice_id samsung_mipi_dcphy_ids[] = { 1938 { 1939 .compatible = "rockchip,rk3576-mipi-dcphy", 1940 .data = (ulong)&rk3576_samsung_mipi_dcphy_driver_data, 1941 }, { 1942 .compatible = "rockchip,rk3588-mipi-dcphy", 1943 .data = (ulong)&rk3588_samsung_mipi_dcphy_driver_data, 1944 }, 1945 {} 1946 }; 1947 1948 U_BOOT_DRIVER(samsung_mipi_dcphy) = { 1949 .name = "samsung-mipi-dcphy", 1950 .id = UCLASS_PHY, 1951 .of_match = samsung_mipi_dcphy_ids, 1952 .probe = samsung_mipi_dcphy_probe, 1953 .priv_auto_alloc_size = sizeof(struct samsung_mipi_dcphy), 1954 }; 1955