1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ROCKCHIP_VOP_H_ 8 #define _ROCKCHIP_VOP_H_ 9 10 /* 11 * major: IP major vertion, used for IP structure 12 * minor: big feature change under same structure 13 */ 14 #define VOP_VERSION(major, minor) ((major) << 8 | (minor)) 15 #define VOP_MAJOR(version) ((version) >> 8) 16 #define VOP_MINOR(version) ((version) & 0xff) 17 18 #define VOP_REG_SUPPORT(vop, reg) \ 19 (reg.mask && \ 20 (!reg.major || \ 21 (reg.major == VOP_MAJOR(vop->version) && \ 22 reg.begin_minor <= VOP_MINOR(vop->version) && \ 23 reg.end_minor >= VOP_MINOR(vop->version)))) 24 25 #define VOP_WIN_SUPPORT(vop, win, name) \ 26 VOP_REG_SUPPORT(vop, win->name) 27 28 #define VOP_CTRL_SUPPORT(vop, name) \ 29 VOP_REG_SUPPORT(vop, vop->ctrl->name) 30 31 #define __REG_SET(x, off, mask, shift, v, write_mask) \ 32 vop_mask_write(x, off, mask, shift, v, write_mask) 33 34 #define _REG_SET(vop, name, off, reg, mask, v) \ 35 do { \ 36 if (VOP_REG_SUPPORT(vop, reg)) \ 37 __REG_SET(vop, off + reg.offset, mask, reg.shift, \ 38 v, reg.write_mask); \ 39 else \ 40 debug("Warning: not support "#name"\n"); \ 41 } while(0) 42 43 #define REG_SET(x, name, off, reg, v) \ 44 _REG_SET(x, name, off, reg, reg.mask, v) 45 #define REG_SET_MASK(x, name, off, reg, mask, v, relaxed) \ 46 _REG_SET(x, name, off, reg, reg.mask & mask, v) 47 48 #define VOP_WIN_SET(x, name, v) \ 49 REG_SET(x, name, x->win_offset, x->win->name, v) 50 #define VOP_WIN_SET_EXT(x, ext, name, v) \ 51 REG_SET(x, name, x->win_offset, x->win->ext->name, v) 52 #define VOP_SCL_SET(x, name, v) \ 53 REG_SET(x, name, x->win_offset, x->win->scl->name, v) 54 #define VOP_SCL_SET_EXT(x, name, v) \ 55 REG_SET(x, name, x->win_offset, x->win->scl->ext->name, v) 56 57 #define VOP_CTRL_SET(x, name, v) \ 58 REG_SET(x, name, 0, (x)->ctrl->name, v) 59 #define VOP_LINE_FLAG_SET(x, name, v) \ 60 REG_SET(x, name, 0, (x)->line_flag->name, v) 61 #define VOP_WIN_CSC_SET(x, name, v) \ 62 REG_SET(x, name, 0, (x)->win_csc->name, v) 63 64 #define VOP_CTRL_GET(x, name) \ 65 vop_read_reg(x, 0, &vop->ctrl->name) 66 67 #define VOP_WIN_GET(x, name) \ 68 vop_read_reg(x, vop->win->offset, &vop->win->name) 69 70 #define VOP_GRF_SET(vop, name, v) \ 71 do { \ 72 if (vop->grf_ctrl) { \ 73 vop_grf_writel(vop, vop->grf_ctrl->name, v); \ 74 } \ 75 } while (0) 76 77 #define CVBS_PAL_VDISPLAY 288 78 79 enum alpha_mode { 80 ALPHA_STRAIGHT, 81 ALPHA_INVERSE, 82 }; 83 84 enum global_blend_mode { 85 ALPHA_GLOBAL, 86 ALPHA_PER_PIX, 87 ALPHA_PER_PIX_GLOBAL, 88 }; 89 90 enum alpha_cal_mode { 91 ALPHA_SATURATION, 92 ALPHA_NO_SATURATION, 93 }; 94 95 enum color_mode { 96 ALPHA_SRC_PRE_MUL, 97 ALPHA_SRC_NO_PRE_MUL, 98 }; 99 100 enum factor_mode { 101 ALPHA_ZERO, 102 ALPHA_ONE, 103 ALPHA_SRC, 104 ALPHA_SRC_INVERSE, 105 ALPHA_SRC_GLOBAL, 106 }; 107 108 enum scale_mode { 109 SCALE_NONE = 0x0, 110 SCALE_UP = 0x1, 111 SCALE_DOWN = 0x2 112 }; 113 114 enum lb_mode { 115 LB_YUV_3840X5 = 0x0, 116 LB_YUV_2560X8 = 0x1, 117 LB_RGB_3840X2 = 0x2, 118 LB_RGB_2560X4 = 0x3, 119 LB_RGB_1920X5 = 0x4, 120 LB_RGB_1280X8 = 0x5 121 }; 122 123 enum sacle_up_mode { 124 SCALE_UP_BIL = 0x0, 125 SCALE_UP_BIC = 0x1 126 }; 127 128 enum scale_down_mode { 129 SCALE_DOWN_BIL = 0x0, 130 SCALE_DOWN_AVG = 0x1 131 }; 132 133 enum dither_down_mode { 134 RGB888_TO_RGB565 = 0x0, 135 RGB888_TO_RGB666 = 0x1 136 }; 137 138 enum dither_down_mode_sel { 139 DITHER_DOWN_ALLEGRO = 0x0, 140 DITHER_DOWN_FRC = 0x1 141 }; 142 143 enum vop_csc_format { 144 CSC_BT601L, 145 CSC_BT709L, 146 CSC_BT601F, 147 CSC_BT2020, 148 }; 149 150 #define DSP_BG_SWAP 0x1 151 #define DSP_RB_SWAP 0x2 152 #define DSP_RG_SWAP 0x4 153 #define DSP_DELTA_SWAP 0x8 154 155 #define PRE_DITHER_DOWN_EN(x) ((x) << 0) 156 #define DITHER_DOWN_EN(x) ((x) << 1) 157 #define DITHER_DOWN_MODE(x) ((x) << 2) 158 #define DITHER_DOWN_MODE_SEL(x) ((x) << 3) 159 160 #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) 161 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT 12 162 #define SCL_MAX_VSKIPLINES 4 163 #define MIN_SCL_FT_AFTER_VSKIP 1 164 165 static inline uint16_t scl_cal_scale(int src, int dst, int shift) 166 { 167 return ((src * 2 - 3) << (shift - 1)) / (dst - 1); 168 } 169 170 static inline uint16_t scl_cal_scale2(int src, int dst) 171 { 172 return ((src - 1) << 12) / (dst - 1); 173 } 174 175 #define GET_SCL_FT_BILI_DN(src, dst) scl_cal_scale(src, dst, 12) 176 #define GET_SCL_FT_BILI_UP(src, dst) scl_cal_scale(src, dst, 16) 177 #define GET_SCL_FT_BIC(src, dst) scl_cal_scale(src, dst, 16) 178 179 static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h, 180 int vskiplines) 181 { 182 int act_height; 183 184 act_height = (src_h + vskiplines - 1) / vskiplines; 185 186 return GET_SCL_FT_BILI_DN(act_height, dst_h); 187 } 188 189 static inline enum scale_mode scl_get_scl_mode(int src, int dst) 190 { 191 if (src < dst) 192 return SCALE_UP; 193 else if (src > dst) 194 return SCALE_DOWN; 195 196 return SCALE_NONE; 197 } 198 199 static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth) 200 { 201 uint32_t vskiplines; 202 203 for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2) 204 if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP) 205 break; 206 207 return vskiplines; 208 } 209 210 static inline int scl_vop_cal_lb_mode(int width, bool is_yuv) 211 { 212 int lb_mode; 213 214 if (width > 2560) 215 lb_mode = LB_RGB_3840X2; 216 else if (width > 1920) 217 lb_mode = LB_RGB_2560X4; 218 else if (!is_yuv) 219 lb_mode = LB_RGB_1920X5; 220 else if (width > 1280) 221 lb_mode = LB_YUV_3840X5; 222 else 223 lb_mode = LB_YUV_2560X8; 224 225 return lb_mode; 226 } 227 228 struct vop_reg_data { 229 uint32_t offset; 230 uint32_t value; 231 }; 232 233 struct vop_reg { 234 uint32_t mask; 235 uint32_t offset:12; 236 uint32_t shift:5; 237 uint32_t begin_minor:4; 238 uint32_t end_minor:4; 239 uint32_t major:3; 240 uint32_t write_mask:1; 241 }; 242 243 struct vop_ctrl { 244 struct vop_reg standby; 245 struct vop_reg axi_outstanding_max_num; 246 struct vop_reg axi_max_outstanding_en; 247 struct vop_reg htotal_pw; 248 struct vop_reg hact_st_end; 249 struct vop_reg vtotal_pw; 250 struct vop_reg vact_st_end; 251 struct vop_reg vact_st_end_f1; 252 struct vop_reg vs_st_end_f1; 253 struct vop_reg hpost_st_end; 254 struct vop_reg vpost_st_end; 255 struct vop_reg vpost_st_end_f1; 256 struct vop_reg post_scl_factor; 257 struct vop_reg post_scl_ctrl; 258 struct vop_reg dsp_interlace; 259 struct vop_reg global_regdone_en; 260 struct vop_reg auto_gate_en; 261 struct vop_reg post_lb_mode; 262 struct vop_reg dsp_layer_sel; 263 struct vop_reg overlay_mode; 264 struct vop_reg core_dclk_div; 265 struct vop_reg dclk_ddr; 266 struct vop_reg p2i_en; 267 struct vop_reg hdmi_dclk_out_en; 268 struct vop_reg rgb_en; 269 struct vop_reg lvds_en; 270 struct vop_reg edp_en; 271 struct vop_reg hdmi_en; 272 struct vop_reg mipi_en; 273 struct vop_reg data01_swap; 274 struct vop_reg mipi_dual_channel_en; 275 struct vop_reg dp_en; 276 struct vop_reg dclk_pol; 277 struct vop_reg pin_pol; 278 struct vop_reg rgb_dclk_pol; 279 struct vop_reg rgb_pin_pol; 280 struct vop_reg lvds_dclk_pol; 281 struct vop_reg lvds_pin_pol; 282 struct vop_reg hdmi_dclk_pol; 283 struct vop_reg hdmi_pin_pol; 284 struct vop_reg edp_dclk_pol; 285 struct vop_reg edp_pin_pol; 286 struct vop_reg mipi_dclk_pol; 287 struct vop_reg mipi_pin_pol; 288 struct vop_reg dp_dclk_pol; 289 struct vop_reg dp_pin_pol; 290 291 struct vop_reg dither_up; 292 struct vop_reg dither_down; 293 294 struct vop_reg sw_dac_sel; 295 struct vop_reg tve_sw_mode; 296 struct vop_reg tve_dclk_pol; 297 struct vop_reg tve_dclk_en; 298 struct vop_reg sw_genlock; 299 struct vop_reg sw_uv_offset_en; 300 301 struct vop_reg dsp_out_yuv; 302 struct vop_reg dsp_data_swap; 303 struct vop_reg dsp_ccir656_avg; 304 struct vop_reg dsp_black; 305 struct vop_reg dsp_blank; 306 struct vop_reg dsp_outzero; 307 struct vop_reg dsp_lut_en; 308 struct vop_reg update_gamma_lut; 309 310 struct vop_reg out_mode; 311 312 struct vop_reg xmirror; 313 struct vop_reg ymirror; 314 struct vop_reg dsp_background; 315 316 /* CABC */ 317 struct vop_reg cabc_total_num; 318 struct vop_reg cabc_config_mode; 319 struct vop_reg cabc_stage_up_mode; 320 struct vop_reg cabc_scale_cfg_value; 321 struct vop_reg cabc_scale_cfg_enable; 322 struct vop_reg cabc_global_dn_limit_en; 323 struct vop_reg cabc_lut_en; 324 struct vop_reg cabc_en; 325 struct vop_reg cabc_handle_en; 326 struct vop_reg cabc_stage_up; 327 struct vop_reg cabc_stage_down; 328 struct vop_reg cabc_global_dn; 329 struct vop_reg cabc_calc_pixel_num; 330 331 struct vop_reg win_gate[4]; 332 struct vop_reg win_channel[4]; 333 334 /* BCSH */ 335 struct vop_reg bcsh_brightness; 336 struct vop_reg bcsh_contrast; 337 struct vop_reg bcsh_sat_con; 338 struct vop_reg bcsh_sin_hue; 339 struct vop_reg bcsh_cos_hue; 340 struct vop_reg bcsh_r2y_csc_mode; 341 struct vop_reg bcsh_r2y_en; 342 struct vop_reg bcsh_y2r_csc_mode; 343 struct vop_reg bcsh_y2r_en; 344 struct vop_reg bcsh_color_bar; 345 struct vop_reg bcsh_out_mode; 346 struct vop_reg bcsh_en; 347 struct vop_reg reg_done_frm; 348 349 /* MCU OUTPUT */ 350 struct vop_reg mcu_pix_total; 351 struct vop_reg mcu_cs_pst; 352 struct vop_reg mcu_cs_pend; 353 struct vop_reg mcu_rw_pst; 354 struct vop_reg mcu_rw_pend; 355 struct vop_reg mcu_clk_sel; 356 struct vop_reg mcu_hold_mode; 357 struct vop_reg mcu_frame_st; 358 struct vop_reg mcu_rs; 359 struct vop_reg mcu_bypass; 360 struct vop_reg mcu_type; 361 struct vop_reg mcu_rw_bypass_port; 362 363 364 struct vop_reg cfg_done; 365 }; 366 367 struct vop_scl_extension { 368 struct vop_reg cbcr_vsd_mode; 369 struct vop_reg cbcr_vsu_mode; 370 struct vop_reg cbcr_hsd_mode; 371 struct vop_reg cbcr_ver_scl_mode; 372 struct vop_reg cbcr_hor_scl_mode; 373 struct vop_reg yrgb_vsd_mode; 374 struct vop_reg yrgb_vsu_mode; 375 struct vop_reg yrgb_hsd_mode; 376 struct vop_reg yrgb_ver_scl_mode; 377 struct vop_reg yrgb_hor_scl_mode; 378 struct vop_reg line_load_mode; 379 struct vop_reg cbcr_axi_gather_num; 380 struct vop_reg yrgb_axi_gather_num; 381 struct vop_reg vsd_cbcr_gt2; 382 struct vop_reg vsd_cbcr_gt4; 383 struct vop_reg vsd_yrgb_gt2; 384 struct vop_reg vsd_yrgb_gt4; 385 struct vop_reg bic_coe_sel; 386 struct vop_reg cbcr_axi_gather_en; 387 struct vop_reg yrgb_axi_gather_en; 388 struct vop_reg lb_mode; 389 }; 390 391 struct vop_scl_regs { 392 const struct vop_scl_extension *ext; 393 394 struct vop_reg scale_yrgb_x; 395 struct vop_reg scale_yrgb_y; 396 struct vop_reg scale_cbcr_x; 397 struct vop_reg scale_cbcr_y; 398 }; 399 400 struct vop_win { 401 const struct vop_scl_regs *scl; 402 403 struct vop_reg enable; 404 struct vop_reg format; 405 struct vop_reg ymirror; 406 struct vop_reg rb_swap; 407 struct vop_reg act_info; 408 struct vop_reg dsp_info; 409 struct vop_reg dsp_st; 410 struct vop_reg yrgb_mst; 411 struct vop_reg uv_mst; 412 struct vop_reg yrgb_vir; 413 struct vop_reg uv_vir; 414 struct vop_reg alpha_mode; 415 struct vop_reg alpha_en; 416 417 struct vop_reg dst_alpha_ctl; 418 struct vop_reg src_alpha_ctl; 419 }; 420 421 struct vop_line_flag { 422 struct vop_reg line_flag_num[2]; 423 }; 424 425 struct vop_grf_ctrl { 426 struct vop_reg grf_dclk_inv; 427 }; 428 429 struct vop_rect { 430 int width; 431 int height; 432 }; 433 434 struct vop_csc_table { 435 const uint32_t *r2y_bt601; 436 const uint32_t *r2y_bt601_12_235; 437 const uint32_t *r2y_bt709; 438 const uint32_t *r2y_bt2020; 439 }; 440 441 struct vop_csc { 442 struct vop_reg y2r_en; 443 struct vop_reg r2r_en; 444 struct vop_reg r2y_en; 445 446 uint32_t y2r_offset; 447 uint32_t r2r_offset; 448 uint32_t r2y_offset; 449 }; 450 451 #define VOP_FEATURE_OUTPUT_10BIT BIT(0) 452 453 struct vop_data { 454 uint32_t version; 455 const struct vop_ctrl *ctrl; 456 const struct vop_win *win; 457 const struct vop_line_flag *line_flag; 458 const struct vop_grf_ctrl *grf_ctrl; 459 const struct vop_csc_table *csc_table; 460 const struct vop_csc *win_csc; 461 int win_offset; 462 int reg_len; 463 u64 feature; 464 struct vop_rect max_output; 465 }; 466 467 struct vop { 468 u32 *regsbak; 469 void *regs; 470 void *grf; 471 472 uint32_t version; 473 const struct vop_ctrl *ctrl; 474 const struct vop_win *win; 475 const struct vop_line_flag *line_flag; 476 const struct vop_grf_ctrl *grf_ctrl; 477 const struct vop_csc_table *csc_table; 478 const struct vop_csc *win_csc; 479 int win_offset; 480 struct vop_rect max_output; 481 }; 482 483 static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v) 484 { 485 writel(v, vop->regs + offset); 486 vop->regsbak[offset >> 2] = v; 487 } 488 489 static inline uint32_t vop_readl(struct vop *vop, uint32_t offset) 490 { 491 return readl(vop->regs + offset); 492 } 493 494 static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base, 495 const struct vop_reg *reg) 496 { 497 return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask; 498 } 499 500 static inline void vop_mask_write(struct vop *vop, uint32_t offset, 501 uint32_t mask, uint32_t shift, uint32_t v, 502 bool write_mask) 503 { 504 if (!mask) 505 return; 506 507 if (write_mask) { 508 v = ((v & mask) << shift) | (mask << (shift + 16)); 509 } else { 510 uint32_t cached_val = vop->regsbak[offset >> 2]; 511 512 v = (cached_val & ~(mask << shift)) | ((v & mask) << shift); 513 vop->regsbak[offset >> 2] = v; 514 } 515 516 writel(v, vop->regs + offset); 517 } 518 519 static inline void vop_cfg_done(struct vop *vop) 520 { 521 VOP_CTRL_SET(vop, cfg_done, 1); 522 } 523 524 static inline void vop_grf_writel(struct vop *vop, struct vop_reg reg, u32 v) 525 { 526 u32 val = 0; 527 528 if (VOP_REG_SUPPORT(vop, reg)) { 529 val = (v << reg.shift) | (reg.mask << (reg.shift + 16)); 530 writel(val, vop->grf + reg.offset); 531 } 532 } 533 534 /** 535 * drm_format_horz_chroma_subsampling - get the horizontal chroma subsampling factor 536 * @format: pixel format (DRM_FORMAT_*) 537 * 538 * Returns: 539 * The horizontal chroma subsampling factor for the 540 * specified pixel format. 541 */ 542 static inline int drm_format_horz_chroma_subsampling(uint32_t format) 543 { 544 /* uboot only support RGB format */ 545 return 1; 546 } 547 548 /** 549 * drm_format_vert_chroma_subsampling - get the vertical chroma subsampling factor 550 * @format: pixel format (DRM_FORMAT_*) 551 * 552 * Returns: 553 * The vertical chroma subsampling factor for the 554 * specified pixel format. 555 */ 556 static inline int drm_format_vert_chroma_subsampling(uint32_t format) 557 { 558 /* uboot only support RGB format */ 559 return 1; 560 } 561 562 #endif 563