1 /* 2 **Copyright (C) 2021 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <dm.h> 9 #include <errno.h> 10 #include <irq-generic.h> 11 #include <power/rk8xx_pmic.h> 12 #include <power/pmic.h> 13 #include <spi.h> 14 15 DECLARE_GLOBAL_DATA_PTR; 16 17 #define RK806_CHIP_NAME 0x5A 18 #define RK806_CHIP_VER 0x5B 19 20 #define RK806_CMD_READ 0 21 #define RK806_CMD_WRITE BIT(7) 22 #define RK806_CMD_CRC_EN BIT(6) 23 #define RK806_CMD_CRC_DIS 0 24 #define RK806_CMD_LEN_MSK 0x0f 25 #define RK806_REG_H 0x00 26 27 #define RK806_SYS_CFG1 0x5f 28 #define RK806_SYS_CFG3 0x72 29 #define RK806_PWRON_KEY 0x76 30 #define RK806_INT_STS0 0x77 31 #define RK806_INT_MSK0 0x78 32 #define RK806_INT_STS1 0x79 33 #define RK806_INT_MSK1 0x7A 34 #define RK806_GPIO_INT_CONFIG 0x7B 35 #define RK806_IRQ_PWRON_FALL_MSK BIT(0) 36 #define RK806_IRQ_PWRON_RISE_MSK BIT(1) 37 #define RK806_DEV_OFF BIT(0) 38 #define RK806_RST_MODE1 0x01 39 #define RK806_RST_MODE2 0x02 40 #define VERSION_AB 0x01 41 42 #if CONFIG_IS_ENABLED(IRQ) 43 /* RK805 */ 44 static const struct virq_reg rk806_irqs[] = { 45 [RK8XX_IRQ_PWRON_FALL] = { 46 .mask = RK806_IRQ_PWRON_FALL_MSK, 47 .reg_offset = 0, 48 }, 49 [RK8XX_IRQ_PWRON_RISE] = { 50 .mask = RK806_IRQ_PWRON_RISE_MSK, 51 .reg_offset = 0, 52 }, 53 }; 54 55 static struct virq_chip rk806_irq_chip = { 56 .status_base = RK806_INT_STS0, 57 .mask_base = RK806_INT_MSK0, 58 .num_regs = 1, 59 .read = pmic_reg_read, 60 .write = pmic_reg_write, 61 .irqs = rk806_irqs, 62 .num_irqs = ARRAY_SIZE(rk806_irqs), 63 }; 64 #endif 65 66 static const struct pmic_child_info pmic_children_info[] = { 67 { .prefix = "DCDC", .driver = "rk8xx_spi_buck"}, 68 { .prefix = "NLDO", .driver = "rk8xx_spi_ldo"}, 69 { .prefix = "PLDO", .driver = "rk8xx_spi_pldo"}, 70 { }, 71 }; 72 73 static const struct pmic_child_info power_key_info[] = { 74 { .prefix = "pwrkey", .driver = "rk8xx_pwrkey"}, 75 { }, 76 }; 77 78 static int _spi_read(struct udevice *dev, u32 reg, u8 *buffer, int len) 79 { 80 struct rk8xx_priv *priv = dev_get_priv(dev); 81 u8 txbuf[3]; 82 int ret; 83 84 if (spi_claim_bus(priv->slave)) 85 return -EBUSY; 86 87 txbuf[0] = RK806_CMD_READ; 88 txbuf[1] = reg; 89 txbuf[2] = RK806_REG_H; 90 91 ret = spi_write_then_read(priv->slave, txbuf, 3, NULL, buffer, 1); 92 spi_release_bus(priv->slave); 93 94 return ret; 95 } 96 97 static int _spi_write(struct udevice *dev, uint reg, const u8 *buffer, int len) 98 { 99 struct rk8xx_priv *priv = dev_get_priv(dev); 100 u8 txbuf[4]; 101 int ret; 102 103 if (len < 1) { 104 dev_err(dev, "rk806 write error: len < 1\n"); 105 return -EINVAL; 106 } 107 108 if (spi_claim_bus(priv->slave)) 109 return -EBUSY; 110 111 txbuf[0] = RK806_CMD_WRITE; 112 txbuf[1] = reg; 113 txbuf[2] = RK806_REG_H; 114 txbuf[3] = *buffer; 115 116 ret = spi_write_then_read(priv->slave, txbuf, 4, NULL, NULL, 0); 117 spi_release_bus(priv->slave); 118 119 return ret; 120 } 121 122 static int rk806_spi_read(struct udevice *dev, 123 uint reg, 124 u8 *buffer, 125 int len) 126 { 127 int ret; 128 129 ret = _spi_read(dev, reg, buffer, len); 130 if (ret) 131 dev_err(dev, "rk806 read reg(0x%x) error: %d\n", reg, ret); 132 133 return ret; 134 } 135 136 static int rk806_spi_write(struct udevice *dev, 137 uint reg, 138 const u8 *buffer, 139 int len) 140 { 141 int ret; 142 143 ret = _spi_write(dev, reg, buffer, len); 144 if (ret) 145 dev_err(dev, "rk806 write reg(0x%x) error: %d\n", reg, ret); 146 147 return ret; 148 } 149 150 static int rk8xx_spi_reg_count(struct udevice *dev) 151 { 152 return 0xff; 153 } 154 155 #if CONFIG_IS_ENABLED(PMIC_CHILDREN) 156 static int rk8xx_spi_bind(struct udevice *dev) 157 { 158 ofnode regulators_node; 159 int children; 160 161 regulators_node = dev_read_subnode(dev, "regulators"); 162 if (!ofnode_valid(regulators_node)) { 163 debug("%s: %s regulators subnode not found!\n", __func__, 164 dev->name); 165 return -ENXIO; 166 } 167 168 children = pmic_bind_children(dev, regulators_node, pmic_children_info); 169 if (!children) 170 debug("%s: %s - no child found\n", __func__, dev->name); 171 172 children = pmic_bind_children(dev, dev->node, power_key_info); 173 if (!children) 174 debug("%s: %s - no child found\n", __func__, dev->name); 175 176 return 0; 177 } 178 #endif 179 #if CONFIG_IS_ENABLED(IRQ) 180 static int rk8xx_spi_ofdata_to_platdata(struct udevice *dev) 181 { 182 struct rk8xx_priv *rk8xx = dev_get_priv(dev); 183 u32 interrupt, phandle; 184 int ret; 185 186 rk8xx->rst_fun = dev_read_u32_default(dev, "pmic-reset-func", 0); 187 188 phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA); 189 if (phandle == -ENODATA) { 190 printf("Read 'interrupt-parent' failed, ret=%d\n", phandle); 191 return phandle; 192 } 193 194 ret = dev_read_u32_array(dev, "interrupts", &interrupt, 1); 195 if (ret) { 196 printf("Read 'interrupts' failed, ret=%d\n", ret); 197 return ret; 198 } 199 200 rk8xx->irq = phandle_gpio_to_irq(phandle, interrupt); 201 if (rk8xx->irq < 0) 202 printf("Failed to request rk8xx irq, ret=%d\n", rk8xx->irq); 203 204 return 0; 205 } 206 207 static int rk8xx_spi_irq_chip_init(struct udevice *dev) 208 { 209 struct rk8xx_priv *priv = dev_get_priv(dev); 210 struct virq_chip *irq_chip = NULL; 211 u8 value; 212 int ret; 213 214 value = 0xff; 215 rk806_spi_write(dev, RK806_INT_STS0, &value, 1); 216 rk806_spi_write(dev, RK806_INT_STS1, &value, 1); 217 rk806_spi_write(dev, RK806_INT_MSK0, &value, 1); 218 rk806_spi_write(dev, RK806_INT_MSK1, &value, 1); 219 value = 0x00; 220 rk806_spi_write(dev, RK806_GPIO_INT_CONFIG, &value, 1); 221 222 irq_chip = &rk806_irq_chip; 223 224 if (irq_chip && priv->irq > 0) { 225 ret = virq_add_chip(dev, irq_chip, priv->irq); 226 if (ret) { 227 printf("Failed to add irqchip(irq=%d), ret=%d\n", 228 priv->irq, ret); 229 return ret; 230 } 231 priv->irq_chip = irq_chip; 232 } 233 234 return 0; 235 } 236 #else 237 static inline int rk8xx_spi_ofdata_to_platdata(struct udevice *dev) 238 { 239 return 0; 240 } 241 242 static inline int rk8xx_spi_irq_chip_init(struct udevice *dev) 243 { 244 return 0; 245 } 246 #endif 247 248 static int rk8xx_spi_probe(struct udevice *dev) 249 { 250 struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); 251 struct rk8xx_priv *priv = dev_get_priv(dev); 252 struct udevice *spi = dev_get_parent(dev); 253 struct spi_slave *slave = NULL; 254 u8 msb, lsb, value; 255 int ret; 256 257 if (spi->seq < 0) { 258 dev_err(dev, "Failed to configure the spi num\n"); 259 return -EINVAL; 260 } 261 262 slave = spi_setup_slave(spi->seq, plat->cs, plat->max_hz, 263 plat->mode); 264 if (!slave) 265 return -ENODEV; 266 priv->slave = slave; 267 268 /* read Chip variant */ 269 ret = rk806_spi_read(dev, RK806_CHIP_NAME, &msb, 1); 270 if (ret) { 271 dev_err(dev, "rk806 name read error: %d\n", ret); 272 return ret; 273 } 274 275 ret = rk806_spi_read(dev, RK806_CHIP_VER, &lsb, 1); 276 if (ret) { 277 dev_err(dev, "rk806 version read error: %d\n", ret); 278 return ret; 279 } 280 281 priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK; 282 printf("spi%d: RK%x%x: %d\n", spi->seq, msb, (lsb >> 4), lsb & 0x0f); 283 284 if ((lsb & 0x0f) == VERSION_AB) { 285 ret = rk806_spi_read(dev, RK806_SYS_CFG1, &value, 1); 286 if (ret) { 287 dev_err(dev, "rk806 RK806_SYS_CFG1 read error: %d\n", ret); 288 return ret; 289 } 290 value |= 0x80; 291 rk806_spi_write(dev, RK806_SYS_CFG1, &value, 1); 292 } 293 294 if (priv->rst_fun) { 295 rk806_spi_read(dev, RK806_SYS_CFG3, &value, 1); 296 value &= 0x3f; 297 if (priv->rst_fun == RK806_RST_MODE1) { 298 value |= (RK806_RST_MODE1 << 6); 299 rk806_spi_write(dev, RK806_SYS_CFG3, &value, 1); 300 } else if (priv->rst_fun == RK806_RST_MODE2) { 301 value |= (RK806_RST_MODE2 << 6); 302 rk806_spi_write(dev, RK806_SYS_CFG3, &value, 1); 303 } 304 } 305 306 rk8xx_spi_irq_chip_init(dev); 307 308 return 0; 309 } 310 311 static int rk8xx_spi_shutdown(struct udevice *dev) 312 { 313 u8 dev_off; 314 int ret = 0; 315 316 ret = rk806_spi_read(dev, RK806_SYS_CFG3, &dev_off, 1); 317 if (ret) 318 return ret; 319 320 dev_off |= RK806_DEV_OFF; 321 ret = rk806_spi_write(dev, RK806_SYS_CFG3, &dev_off, 1); 322 if (ret) { 323 dev_err(dev, "rk806 shutdown error: %d\n", ret); 324 return ret; 325 } 326 327 while (1) 328 ; 329 330 return 0; 331 } 332 333 static struct dm_pmic_ops rk8xx_spi_ops = { 334 .reg_count = rk8xx_spi_reg_count, 335 .read = rk806_spi_read, 336 .write = rk806_spi_write, 337 .shutdown = rk8xx_spi_shutdown, 338 }; 339 340 static const struct udevice_id rk8xx_spi_ids[] = { 341 { .compatible = "rockchip,rk806" }, 342 { } 343 }; 344 345 U_BOOT_DRIVER(pmic_rk8xx_spi) = { 346 .name = "rk806-pmic", 347 .id = UCLASS_PMIC, 348 .of_match = rk8xx_spi_ids, 349 #if CONFIG_IS_ENABLED(PMIC_CHILDREN) 350 .bind = rk8xx_spi_bind, 351 #endif 352 .ofdata_to_platdata = rk8xx_spi_ofdata_to_platdata, 353 .priv_auto_alloc_size = sizeof(struct rk8xx_priv), 354 .probe = rk8xx_spi_probe, 355 .ops = &rk8xx_spi_ops, 356 }; 357