1 /*
2 **Copyright (C) 2021 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <irq-generic.h>
11 #include <power/rk8xx_pmic.h>
12 #include <power/pmic.h>
13 #include <spi.h>
14
15 DECLARE_GLOBAL_DATA_PTR;
16
17 #if CONFIG_IS_ENABLED(IRQ)
18 /* RK806 */
19 static const struct virq_reg rk806_irqs[] = {
20 [RK8XX_IRQ_PWRON_FALL] = {
21 .mask = RK806_IRQ_PWRON_FALL_MSK,
22 .reg_offset = 0,
23 },
24 [RK8XX_IRQ_PWRON_RISE] = {
25 .mask = RK806_IRQ_PWRON_RISE_MSK,
26 .reg_offset = 0,
27 },
28 };
29
30 static struct virq_chip rk806_irq_chip = {
31 .status_base = RK806_INT_STS0,
32 .mask_base = RK806_INT_MSK0,
33 .num_regs = 1,
34 .read = pmic_reg_read,
35 .write = pmic_reg_write,
36 .irqs = rk806_irqs,
37 .num_irqs = ARRAY_SIZE(rk806_irqs),
38 };
39 #endif
40
41 static const struct pmic_child_info pmic_children_info[] = {
42 { .prefix = "DCDC", .driver = "rk8xx_buck"},
43 { .prefix = "NLDO", .driver = "rk8xx_ldo"},
44 { .prefix = "PLDO", .driver = "rk8xx_pldo"},
45 { },
46 };
47
48 static const struct pmic_child_info power_key_info[] = {
49 { .prefix = "pwrkey", .driver = "rk8xx_pwrkey"},
50 { },
51 };
52
_spi_read(struct udevice * dev,u32 reg,u8 * buffer,int len)53 static int _spi_read(struct udevice *dev, u32 reg, u8 *buffer, int len)
54 {
55 struct rk8xx_priv *priv = dev_get_priv(dev);
56 u8 txbuf[3];
57 int ret;
58
59 if (spi_claim_bus(priv->slave))
60 return -EBUSY;
61
62 txbuf[0] = RK806_CMD_READ;
63 txbuf[1] = reg;
64 txbuf[2] = RK806_REG_H;
65
66 ret = spi_write_then_read(priv->slave, txbuf, 3, NULL, buffer, 1);
67 spi_release_bus(priv->slave);
68
69 return ret;
70 }
71
_spi_write(struct udevice * dev,uint reg,const u8 * buffer,int len)72 static int _spi_write(struct udevice *dev, uint reg, const u8 *buffer, int len)
73 {
74 struct rk8xx_priv *priv = dev_get_priv(dev);
75 u8 txbuf[4];
76 int ret;
77
78 if (len < 1) {
79 dev_err(dev, "rk806 write error: len < 1\n");
80 return -EINVAL;
81 }
82
83 if (spi_claim_bus(priv->slave))
84 return -EBUSY;
85
86 txbuf[0] = RK806_CMD_WRITE;
87 txbuf[1] = reg;
88 txbuf[2] = RK806_REG_H;
89 txbuf[3] = *buffer;
90
91 ret = spi_write_then_read(priv->slave, txbuf, 4, NULL, NULL, 0);
92 spi_release_bus(priv->slave);
93
94 return ret;
95 }
96
rk806_spi_read(struct udevice * dev,uint reg,u8 * buffer,int len)97 static int rk806_spi_read(struct udevice *dev,
98 uint reg,
99 u8 *buffer,
100 int len)
101 {
102 int ret;
103
104 ret = _spi_read(dev, reg, buffer, len);
105 if (ret)
106 dev_err(dev, "rk806 read reg(0x%x) error: %d\n", reg, ret);
107
108 return ret;
109 }
110
rk806_spi_write(struct udevice * dev,uint reg,const u8 * buffer,int len)111 static int rk806_spi_write(struct udevice *dev,
112 uint reg,
113 const u8 *buffer,
114 int len)
115 {
116 int ret;
117
118 ret = _spi_write(dev, reg, buffer, len);
119 if (ret)
120 dev_err(dev, "rk806 write reg(0x%x) error: %d\n", reg, ret);
121
122 return ret;
123 }
124
rk8xx_spi_reg_count(struct udevice * dev)125 static int rk8xx_spi_reg_count(struct udevice *dev)
126 {
127 return 0xff;
128 }
129
130 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
rk8xx_spi_bind(struct udevice * dev)131 static int rk8xx_spi_bind(struct udevice *dev)
132 {
133 ofnode regulators_node;
134 int children;
135
136 regulators_node = dev_read_subnode(dev, "regulators");
137 if (!ofnode_valid(regulators_node)) {
138 debug("%s: %s regulators subnode not found!\n", __func__,
139 dev->name);
140 return -ENXIO;
141 }
142
143 children = pmic_bind_children(dev, regulators_node, pmic_children_info);
144 if (!children)
145 debug("%s: %s - no child found\n", __func__, dev->name);
146
147 children = pmic_bind_children(dev, dev->node, power_key_info);
148 if (!children)
149 debug("%s: %s - no child found\n", __func__, dev->name);
150
151 return 0;
152 }
153 #endif
154 #if CONFIG_IS_ENABLED(IRQ)
rk8xx_spi_ofdata_to_platdata(struct udevice * dev)155 static int rk8xx_spi_ofdata_to_platdata(struct udevice *dev)
156 {
157 struct rk8xx_priv *rk8xx = dev_get_priv(dev);
158 u32 interrupt, phandle;
159 int ret;
160
161 rk8xx->rst_fun = dev_read_u32_default(dev, "pmic-reset-func", 0);
162
163 phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA);
164 if (phandle == -ENODATA) {
165 printf("Read 'interrupt-parent' failed, ret=%d\n", phandle);
166 return phandle;
167 }
168
169 ret = dev_read_u32_array(dev, "interrupts", &interrupt, 1);
170 if (ret) {
171 printf("Read 'interrupts' failed, ret=%d\n", ret);
172 return ret;
173 }
174
175 rk8xx->irq = phandle_gpio_to_irq(phandle, interrupt);
176 if (rk8xx->irq < 0 && rk8xx->irq != -EBUSY)
177 printf("Failed to request rk8xx irq, ret=%d\n", rk8xx->irq);
178
179 return 0;
180 }
181
rk8xx_spi_irq_chip_init(struct udevice * dev)182 static int rk8xx_spi_irq_chip_init(struct udevice *dev)
183 {
184 struct rk8xx_priv *priv = dev_get_priv(dev);
185 struct virq_chip *irq_chip = NULL;
186 u8 value;
187 int ret;
188
189 value = 0xff;
190 rk806_spi_write(dev, RK806_INT_STS0, &value, 1);
191 rk806_spi_write(dev, RK806_INT_STS1, &value, 1);
192 rk806_spi_write(dev, RK806_INT_MSK0, &value, 1);
193 rk806_spi_write(dev, RK806_INT_MSK1, &value, 1);
194 value = 0x00;
195 rk806_spi_write(dev, RK806_GPIO_INT_CONFIG, &value, 1);
196
197 irq_chip = &rk806_irq_chip;
198
199 if (irq_chip && priv->irq > 0) {
200 ret = virq_add_chip(dev, irq_chip, priv->irq);
201 if (ret) {
202 printf("Failed to add irqchip(irq=%d), ret=%d\n",
203 priv->irq, ret);
204 return ret;
205 }
206 priv->irq_chip = irq_chip;
207 }
208
209 return 0;
210 }
211 #else
rk8xx_spi_ofdata_to_platdata(struct udevice * dev)212 static inline int rk8xx_spi_ofdata_to_platdata(struct udevice *dev)
213 {
214 struct rk8xx_priv *rk8xx = dev_get_priv(dev);
215
216 rk8xx->rst_fun = dev_read_u32_default(dev, "pmic-reset-func", 0);
217
218 return 0;
219 }
220
rk8xx_spi_irq_chip_init(struct udevice * dev)221 static inline int rk8xx_spi_irq_chip_init(struct udevice *dev)
222 {
223 return 0;
224 }
225 #endif
226
rk8xx_spi_probe(struct udevice * dev)227 static int rk8xx_spi_probe(struct udevice *dev)
228 {
229 struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
230 struct rk8xx_priv *priv = dev_get_priv(dev);
231 struct udevice *spi = dev_get_parent(dev);
232 struct spi_slave *slave = NULL;
233 u8 on_source, off_source;
234 u8 msb, lsb, value = 0;
235 int ret;
236
237 if (spi->seq < 0) {
238 dev_err(dev, "Failed to configure the spi num\n");
239 return -EINVAL;
240 }
241
242 slave = spi_setup_slave(spi->seq, plat->cs, plat->max_hz,
243 plat->mode);
244 if (!slave)
245 return -ENODEV;
246 priv->slave = slave;
247
248 /* read Chip variant */
249 ret = rk806_spi_read(dev, RK806_CHIP_NAME, &msb, 1);
250 if (ret) {
251 dev_err(dev, "rk806 name read error: %d\n", ret);
252 return ret;
253 }
254
255 ret = rk806_spi_read(dev, RK806_CHIP_VER, &lsb, 1);
256 if (ret) {
257 dev_err(dev, "rk806 version read error: %d\n", ret);
258 return ret;
259 }
260
261 priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
262 printf("spi%d: RK%x%x: %d\n", spi->seq, msb, (lsb >> 4), lsb & 0x0f);
263
264 rk806_spi_read(dev, RK806_ON_SOURCE, &on_source, 1);
265 rk806_spi_read(dev, RK806_OFF_SOURCE, &off_source, 1);
266 printf("ON=0x%02x, OFF=0x%02x\n", on_source, off_source);
267
268 ret = rk806_spi_read(dev, RK806_HW_VER, &value, 1);
269 if (ret)
270 panic("RK806: read RK806_HW_VER error!\n");
271 /* dual rk806 dev name: "rk806master@0", "rk806slave@1"
272 * single rk806 dev name: " rk806single@0"
273 */
274 if ((!strcmp(dev->name, "rk806master@0")) || (!strcmp(dev->name, "rk806slave@1"))) {
275 if (value != HW_DUAL_PMIC) {
276 dev_err(dev, "HW single pmic, the firmware dual pmic(0x%x)!\n", value);
277 run_command("download", 0);
278 }
279 } else {
280 if (value != HW_SINGLE_PMIC) {
281 dev_err(dev, "HW dual pmic, the firmware single pmic(0x%x)!\n", value);
282 run_command("download", 0);
283 }
284 }
285
286 if ((lsb & RK806_VERSION_MSK) == RK806_VERSION_AB) {
287 ret = rk806_spi_read(dev, RK806_SYS_CFG1, &value, 1);
288 if (ret) {
289 dev_err(dev, "rk806 RK806_SYS_CFG1 read error: %d\n", ret);
290 return ret;
291 }
292 value |= RK806_ABNORDET_EN;
293 rk806_spi_write(dev, RK806_SYS_CFG1, &value, 1);
294 }
295
296 if (priv->rst_fun) {
297 rk806_spi_read(dev, RK806_SYS_CFG3, &value, 1);
298 value &= RK806_RESET_FUN_CLR;
299 if (priv->rst_fun == RK806_RST_MODE1) {
300 value |= (RK806_RST_MODE1 << 6);
301 rk806_spi_write(dev, RK806_SYS_CFG3, &value, 1);
302 } else if (priv->rst_fun == RK806_RST_MODE2) {
303 value |= (RK806_RST_MODE2 << 6);
304 rk806_spi_write(dev, RK806_SYS_CFG3, &value, 1);
305 }
306 }
307
308 rk8xx_spi_irq_chip_init(dev);
309
310 return 0;
311 }
312
rk8xx_spi_shutdown(struct udevice * dev)313 static int rk8xx_spi_shutdown(struct udevice *dev)
314 {
315 u8 dev_off;
316 int ret = 0;
317
318 ret = rk806_spi_read(dev, RK806_SYS_CFG3, &dev_off, 1);
319 if (ret)
320 return ret;
321
322 dev_off |= RK806_DEV_OFF;
323 ret = rk806_spi_write(dev, RK806_SYS_CFG3, &dev_off, 1);
324 if (ret) {
325 dev_err(dev, "rk806 shutdown error: %d\n", ret);
326 return ret;
327 }
328
329 while (1)
330 ;
331
332 return 0;
333 }
334
rk806_suspend(struct udevice * dev)335 static int rk806_suspend(struct udevice *dev)
336 {
337 int ret = 0;
338 u8 i, val;
339
340 ret = rk806_spi_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
341 if (ret)
342 return ret;
343 val &= RK806_PWRCTRL_FUN_MSK;
344 ret = rk806_spi_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
345 if (ret)
346 return ret;
347
348 ret = rk806_spi_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1);
349 if (ret)
350 return ret;
351 val &= RK806_PWRCTRL_FUN_MSK;
352 ret = rk806_spi_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1);
353 if (ret)
354 return ret;
355
356 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) {
357 ret = rk806_spi_read(dev, i, &val, 1);
358 if (ret)
359 return ret;
360 val &= RK806_VSEL_CTRL_MSK;
361 ret = rk806_spi_write(dev, i, &val, 1);
362 if (ret)
363 return ret;
364 }
365
366 ret = rk806_spi_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
367 if (ret)
368 return ret;
369 val &= RK806_PWRCTRL_FUN_MSK;
370 val |= RK806_ENABLE_PWRCTRL;
371 ret = rk806_spi_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
372 if (ret)
373 return ret;
374
375 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) {
376 ret = rk806_spi_read(dev, i, &val, 1);
377 if (ret)
378 return ret;
379 val &= RK806_VSEL_CTRL_MSK;
380 val |= RK806_VSEL_PWRCTRL1;
381 ret = rk806_spi_write(dev, i, &val, 1);
382 if (ret)
383 return ret;
384 }
385
386 return ret;
387 }
388
rk806_resume(struct udevice * dev)389 static int rk806_resume(struct udevice *dev)
390 {
391 int ret = 0;
392 u8 i, val;
393
394 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) {
395 ret = rk806_spi_read(dev, i, &val, 1);
396 if (ret)
397 return ret;
398 val &= RK806_VSEL_CTRL_MSK;
399 ret = rk806_spi_write(dev, i, &val, 1);
400 if (ret)
401 return ret;
402 }
403
404 ret = rk806_spi_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
405 if (ret)
406 return ret;
407 val &= RK806_PWRCTRL_FUN_MSK;
408 ret = rk806_spi_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1);
409 if (ret)
410 return ret;
411
412 ret = rk806_spi_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1);
413 if (ret)
414 return ret;
415 val &= RK806_PWRCTRL_FUN_MSK;
416 ret = rk806_spi_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1);
417 if (ret)
418 return ret;
419
420 return ret;
421 }
422
423 static struct dm_pmic_ops rk8xx_spi_ops = {
424 .reg_count = rk8xx_spi_reg_count,
425 .read = rk806_spi_read,
426 .write = rk806_spi_write,
427 .shutdown = rk8xx_spi_shutdown,
428 .suspend = rk806_suspend,
429 .resume = rk806_resume,
430 };
431
432 static const struct udevice_id rk8xx_spi_ids[] = {
433 { .compatible = "rockchip,rk806" },
434 { }
435 };
436
437 U_BOOT_DRIVER(pmic_rk8xx_spi) = {
438 .name = "rk806-pmic",
439 .id = UCLASS_PMIC,
440 .of_match = rk8xx_spi_ids,
441 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
442 .bind = rk8xx_spi_bind,
443 #endif
444 .ofdata_to_platdata = rk8xx_spi_ofdata_to_platdata,
445 .priv_auto_alloc_size = sizeof(struct rk8xx_priv),
446 .probe = rk8xx_spi_probe,
447 .ops = &rk8xx_spi_ops,
448 };
449