1 /* 2 **Copyright (C) 2021 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <dm.h> 9 #include <errno.h> 10 #include <irq-generic.h> 11 #include <power/rk8xx_pmic.h> 12 #include <power/pmic.h> 13 #include <spi.h> 14 15 DECLARE_GLOBAL_DATA_PTR; 16 17 #if CONFIG_IS_ENABLED(IRQ) 18 /* RK806 */ 19 static const struct virq_reg rk806_irqs[] = { 20 [RK8XX_IRQ_PWRON_FALL] = { 21 .mask = RK806_IRQ_PWRON_FALL_MSK, 22 .reg_offset = 0, 23 }, 24 [RK8XX_IRQ_PWRON_RISE] = { 25 .mask = RK806_IRQ_PWRON_RISE_MSK, 26 .reg_offset = 0, 27 }, 28 }; 29 30 static struct virq_chip rk806_irq_chip = { 31 .status_base = RK806_INT_STS0, 32 .mask_base = RK806_INT_MSK0, 33 .num_regs = 1, 34 .read = pmic_reg_read, 35 .write = pmic_reg_write, 36 .irqs = rk806_irqs, 37 .num_irqs = ARRAY_SIZE(rk806_irqs), 38 }; 39 #endif 40 41 static const struct pmic_child_info pmic_children_info[] = { 42 { .prefix = "DCDC", .driver = "rk8xx_buck"}, 43 { .prefix = "NLDO", .driver = "rk8xx_ldo"}, 44 { .prefix = "PLDO", .driver = "rk8xx_pldo"}, 45 { }, 46 }; 47 48 static const struct pmic_child_info power_key_info[] = { 49 { .prefix = "pwrkey", .driver = "rk8xx_pwrkey"}, 50 { }, 51 }; 52 53 static int _spi_read(struct udevice *dev, u32 reg, u8 *buffer, int len) 54 { 55 struct rk8xx_priv *priv = dev_get_priv(dev); 56 u8 txbuf[3]; 57 int ret; 58 59 if (spi_claim_bus(priv->slave)) 60 return -EBUSY; 61 62 txbuf[0] = RK806_CMD_READ; 63 txbuf[1] = reg; 64 txbuf[2] = RK806_REG_H; 65 66 ret = spi_write_then_read(priv->slave, txbuf, 3, NULL, buffer, 1); 67 spi_release_bus(priv->slave); 68 69 return ret; 70 } 71 72 static int _spi_write(struct udevice *dev, uint reg, const u8 *buffer, int len) 73 { 74 struct rk8xx_priv *priv = dev_get_priv(dev); 75 u8 txbuf[4]; 76 int ret; 77 78 if (len < 1) { 79 dev_err(dev, "rk806 write error: len < 1\n"); 80 return -EINVAL; 81 } 82 83 if (spi_claim_bus(priv->slave)) 84 return -EBUSY; 85 86 txbuf[0] = RK806_CMD_WRITE; 87 txbuf[1] = reg; 88 txbuf[2] = RK806_REG_H; 89 txbuf[3] = *buffer; 90 91 ret = spi_write_then_read(priv->slave, txbuf, 4, NULL, NULL, 0); 92 spi_release_bus(priv->slave); 93 94 return ret; 95 } 96 97 static int rk806_spi_read(struct udevice *dev, 98 uint reg, 99 u8 *buffer, 100 int len) 101 { 102 int ret; 103 104 ret = _spi_read(dev, reg, buffer, len); 105 if (ret) 106 dev_err(dev, "rk806 read reg(0x%x) error: %d\n", reg, ret); 107 108 return ret; 109 } 110 111 static int rk806_spi_write(struct udevice *dev, 112 uint reg, 113 const u8 *buffer, 114 int len) 115 { 116 int ret; 117 118 ret = _spi_write(dev, reg, buffer, len); 119 if (ret) 120 dev_err(dev, "rk806 write reg(0x%x) error: %d\n", reg, ret); 121 122 return ret; 123 } 124 125 static int rk8xx_spi_reg_count(struct udevice *dev) 126 { 127 return 0xff; 128 } 129 130 #if CONFIG_IS_ENABLED(PMIC_CHILDREN) 131 static int rk8xx_spi_bind(struct udevice *dev) 132 { 133 ofnode regulators_node; 134 int children; 135 136 regulators_node = dev_read_subnode(dev, "regulators"); 137 if (!ofnode_valid(regulators_node)) { 138 debug("%s: %s regulators subnode not found!\n", __func__, 139 dev->name); 140 return -ENXIO; 141 } 142 143 children = pmic_bind_children(dev, regulators_node, pmic_children_info); 144 if (!children) 145 debug("%s: %s - no child found\n", __func__, dev->name); 146 147 children = pmic_bind_children(dev, dev->node, power_key_info); 148 if (!children) 149 debug("%s: %s - no child found\n", __func__, dev->name); 150 151 return 0; 152 } 153 #endif 154 #if CONFIG_IS_ENABLED(IRQ) 155 static int rk8xx_spi_ofdata_to_platdata(struct udevice *dev) 156 { 157 struct rk8xx_priv *rk8xx = dev_get_priv(dev); 158 u32 interrupt, phandle; 159 int ret; 160 161 rk8xx->rst_fun = dev_read_u32_default(dev, "pmic-reset-func", 0); 162 163 phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA); 164 if (phandle == -ENODATA) { 165 printf("Read 'interrupt-parent' failed, ret=%d\n", phandle); 166 return phandle; 167 } 168 169 ret = dev_read_u32_array(dev, "interrupts", &interrupt, 1); 170 if (ret) { 171 printf("Read 'interrupts' failed, ret=%d\n", ret); 172 return ret; 173 } 174 175 rk8xx->irq = phandle_gpio_to_irq(phandle, interrupt); 176 if (rk8xx->irq < 0 && rk8xx->irq != -EBUSY) 177 printf("Failed to request rk8xx irq, ret=%d\n", rk8xx->irq); 178 179 return 0; 180 } 181 182 static int rk8xx_spi_irq_chip_init(struct udevice *dev) 183 { 184 struct rk8xx_priv *priv = dev_get_priv(dev); 185 struct virq_chip *irq_chip = NULL; 186 u8 value; 187 int ret; 188 189 value = 0xff; 190 rk806_spi_write(dev, RK806_INT_STS0, &value, 1); 191 rk806_spi_write(dev, RK806_INT_STS1, &value, 1); 192 rk806_spi_write(dev, RK806_INT_MSK0, &value, 1); 193 rk806_spi_write(dev, RK806_INT_MSK1, &value, 1); 194 value = 0x00; 195 rk806_spi_write(dev, RK806_GPIO_INT_CONFIG, &value, 1); 196 197 irq_chip = &rk806_irq_chip; 198 199 if (irq_chip && priv->irq > 0) { 200 ret = virq_add_chip(dev, irq_chip, priv->irq); 201 if (ret) { 202 printf("Failed to add irqchip(irq=%d), ret=%d\n", 203 priv->irq, ret); 204 return ret; 205 } 206 priv->irq_chip = irq_chip; 207 } 208 209 return 0; 210 } 211 #else 212 static inline int rk8xx_spi_ofdata_to_platdata(struct udevice *dev) 213 { 214 return 0; 215 } 216 217 static inline int rk8xx_spi_irq_chip_init(struct udevice *dev) 218 { 219 return 0; 220 } 221 #endif 222 223 static int rk8xx_spi_probe(struct udevice *dev) 224 { 225 struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); 226 struct rk8xx_priv *priv = dev_get_priv(dev); 227 struct udevice *spi = dev_get_parent(dev); 228 struct spi_slave *slave = NULL; 229 u8 on_source, off_source; 230 u8 msb, lsb, value = 0; 231 int ret; 232 233 if (spi->seq < 0) { 234 dev_err(dev, "Failed to configure the spi num\n"); 235 return -EINVAL; 236 } 237 238 slave = spi_setup_slave(spi->seq, plat->cs, plat->max_hz, 239 plat->mode); 240 if (!slave) 241 return -ENODEV; 242 priv->slave = slave; 243 244 /* read Chip variant */ 245 ret = rk806_spi_read(dev, RK806_CHIP_NAME, &msb, 1); 246 if (ret) { 247 dev_err(dev, "rk806 name read error: %d\n", ret); 248 return ret; 249 } 250 251 ret = rk806_spi_read(dev, RK806_CHIP_VER, &lsb, 1); 252 if (ret) { 253 dev_err(dev, "rk806 version read error: %d\n", ret); 254 return ret; 255 } 256 257 priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK; 258 printf("spi%d: RK%x%x: %d\n", spi->seq, msb, (lsb >> 4), lsb & 0x0f); 259 260 rk806_spi_read(dev, RK806_ON_SOURCE, &on_source, 1); 261 rk806_spi_read(dev, RK806_OFF_SOURCE, &off_source, 1); 262 printf("ON=0x%02x, OFF=0x%02x\n", on_source, off_source); 263 264 ret = rk806_spi_read(dev, RK806_HW_VER, &value, 1); 265 if (ret) 266 panic("RK806: read RK806_HW_VER error!\n"); 267 /* dual rk806 dev name: "rk806master@0", "rk806slave@1" 268 * single rk806 dev name: " rk806single@0" 269 */ 270 if ((!strcmp(dev->name, "rk806master@0")) || (!strcmp(dev->name, "rk806slave@1"))) { 271 if (value != HW_DUAL_PMIC) { 272 dev_err(dev, "HW single pmic, the firmware dual pmic(0x%x)!\n", value); 273 run_command("download", 0); 274 } 275 } else { 276 if (value != HW_SINGLE_PMIC) { 277 dev_err(dev, "HW dual pmic, the firmware single pmic(0x%x)!\n", value); 278 run_command("download", 0); 279 } 280 } 281 282 if ((lsb & RK806_VERSION_MSK) == RK806_VERSION_AB) { 283 ret = rk806_spi_read(dev, RK806_SYS_CFG1, &value, 1); 284 if (ret) { 285 dev_err(dev, "rk806 RK806_SYS_CFG1 read error: %d\n", ret); 286 return ret; 287 } 288 value |= RK806_ABNORDET_EN; 289 rk806_spi_write(dev, RK806_SYS_CFG1, &value, 1); 290 } 291 292 if (priv->rst_fun) { 293 rk806_spi_read(dev, RK806_SYS_CFG3, &value, 1); 294 value &= RK806_RESET_FUN_CLR; 295 if (priv->rst_fun == RK806_RST_MODE1) { 296 value |= (RK806_RST_MODE1 << 6); 297 rk806_spi_write(dev, RK806_SYS_CFG3, &value, 1); 298 } else if (priv->rst_fun == RK806_RST_MODE2) { 299 value |= (RK806_RST_MODE2 << 6); 300 rk806_spi_write(dev, RK806_SYS_CFG3, &value, 1); 301 } 302 } 303 304 rk8xx_spi_irq_chip_init(dev); 305 306 return 0; 307 } 308 309 static int rk8xx_spi_shutdown(struct udevice *dev) 310 { 311 u8 dev_off; 312 int ret = 0; 313 314 ret = rk806_spi_read(dev, RK806_SYS_CFG3, &dev_off, 1); 315 if (ret) 316 return ret; 317 318 dev_off |= RK806_DEV_OFF; 319 ret = rk806_spi_write(dev, RK806_SYS_CFG3, &dev_off, 1); 320 if (ret) { 321 dev_err(dev, "rk806 shutdown error: %d\n", ret); 322 return ret; 323 } 324 325 while (1) 326 ; 327 328 return 0; 329 } 330 331 static int rk806_suspend(struct udevice *dev) 332 { 333 int ret = 0; 334 u8 i, val; 335 336 ret = rk806_spi_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 337 if (ret) 338 return ret; 339 val &= RK806_PWRCTRL_FUN_MSK; 340 ret = rk806_spi_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 341 if (ret) 342 return ret; 343 344 ret = rk806_spi_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 345 if (ret) 346 return ret; 347 val &= RK806_PWRCTRL_FUN_MSK; 348 ret = rk806_spi_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 349 if (ret) 350 return ret; 351 352 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 353 ret = rk806_spi_read(dev, i, &val, 1); 354 if (ret) 355 return ret; 356 val &= RK806_VSEL_CTRL_MSK; 357 ret = rk806_spi_write(dev, i, &val, 1); 358 if (ret) 359 return ret; 360 } 361 362 ret = rk806_spi_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 363 if (ret) 364 return ret; 365 val &= RK806_PWRCTRL_FUN_MSK; 366 val |= RK806_ENABLE_PWRCTRL; 367 ret = rk806_spi_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 368 if (ret) 369 return ret; 370 371 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 372 ret = rk806_spi_read(dev, i, &val, 1); 373 if (ret) 374 return ret; 375 val &= RK806_VSEL_CTRL_MSK; 376 val |= RK806_VSEL_PWRCTRL1; 377 ret = rk806_spi_write(dev, i, &val, 1); 378 if (ret) 379 return ret; 380 } 381 382 return ret; 383 } 384 385 static int rk806_resume(struct udevice *dev) 386 { 387 int ret = 0; 388 u8 i, val; 389 390 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 391 ret = rk806_spi_read(dev, i, &val, 1); 392 if (ret) 393 return ret; 394 val &= RK806_VSEL_CTRL_MSK; 395 ret = rk806_spi_write(dev, i, &val, 1); 396 if (ret) 397 return ret; 398 } 399 400 ret = rk806_spi_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 401 if (ret) 402 return ret; 403 val &= RK806_PWRCTRL_FUN_MSK; 404 ret = rk806_spi_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 405 if (ret) 406 return ret; 407 408 ret = rk806_spi_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 409 if (ret) 410 return ret; 411 val &= RK806_PWRCTRL_FUN_MSK; 412 ret = rk806_spi_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 413 if (ret) 414 return ret; 415 416 return ret; 417 } 418 419 static struct dm_pmic_ops rk8xx_spi_ops = { 420 .reg_count = rk8xx_spi_reg_count, 421 .read = rk806_spi_read, 422 .write = rk806_spi_write, 423 .shutdown = rk8xx_spi_shutdown, 424 .suspend = rk806_suspend, 425 .resume = rk806_resume, 426 }; 427 428 static const struct udevice_id rk8xx_spi_ids[] = { 429 { .compatible = "rockchip,rk806" }, 430 { } 431 }; 432 433 U_BOOT_DRIVER(pmic_rk8xx_spi) = { 434 .name = "rk806-pmic", 435 .id = UCLASS_PMIC, 436 .of_match = rk8xx_spi_ids, 437 #if CONFIG_IS_ENABLED(PMIC_CHILDREN) 438 .bind = rk8xx_spi_bind, 439 #endif 440 .ofdata_to_platdata = rk8xx_spi_ofdata_to_platdata, 441 .priv_auto_alloc_size = sizeof(struct rk8xx_priv), 442 .probe = rk8xx_spi_probe, 443 .ops = &rk8xx_spi_ops, 444 }; 445