1 /* 2 * SPI flash interface 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik 6 * 7 * Licensed under the GPL-2 or later. 8 */ 9 10 #include <common.h> 11 #include <fdtdec.h> 12 #include <malloc.h> 13 #include <spi.h> 14 #include <spi_flash.h> 15 #include <watchdog.h> 16 17 #include "spi_flash_internal.h" 18 19 DECLARE_GLOBAL_DATA_PTR; 20 21 static void spi_flash_addr(u32 addr, u8 *cmd) 22 { 23 /* cmd[0] is actual command */ 24 cmd[1] = addr >> 16; 25 cmd[2] = addr >> 8; 26 cmd[3] = addr >> 0; 27 } 28 29 static int spi_flash_read_write(struct spi_slave *spi, 30 const u8 *cmd, size_t cmd_len, 31 const u8 *data_out, u8 *data_in, 32 size_t data_len) 33 { 34 unsigned long flags = SPI_XFER_BEGIN; 35 int ret; 36 37 if (data_len == 0) 38 flags |= SPI_XFER_END; 39 40 ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); 41 if (ret) { 42 debug("SF: Failed to send command (%zu bytes): %d\n", 43 cmd_len, ret); 44 } else if (data_len != 0) { 45 ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END); 46 if (ret) 47 debug("SF: Failed to transfer %zu bytes of data: %d\n", 48 data_len, ret); 49 } 50 51 return ret; 52 } 53 54 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len) 55 { 56 return spi_flash_cmd_read(spi, &cmd, 1, response, len); 57 } 58 59 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, 60 size_t cmd_len, void *data, size_t data_len) 61 { 62 return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len); 63 } 64 65 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, 66 const void *data, size_t data_len) 67 { 68 return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len); 69 } 70 71 int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, 72 size_t len, const void *buf) 73 { 74 unsigned long page_addr, byte_addr, page_size; 75 size_t chunk_len, actual; 76 int ret; 77 u8 cmd[4], bank_sel; 78 79 page_size = flash->page_size; 80 81 ret = spi_claim_bus(flash->spi); 82 if (ret) { 83 debug("SF: unable to claim SPI bus\n"); 84 return ret; 85 } 86 87 cmd[0] = CMD_PAGE_PROGRAM; 88 for (actual = 0; actual < len; actual += chunk_len) { 89 bank_sel = offset / SPI_FLASH_16MB_BOUN; 90 91 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); 92 if (ret) { 93 debug("SF: fail to set bank%d\n", bank_sel); 94 return ret; 95 } 96 97 page_addr = offset / page_size; 98 byte_addr = offset % page_size; 99 chunk_len = min(len - actual, page_size - byte_addr); 100 101 if (flash->spi->max_write_size) 102 chunk_len = min(chunk_len, flash->spi->max_write_size); 103 104 cmd[1] = page_addr >> 8; 105 cmd[2] = page_addr; 106 cmd[3] = byte_addr; 107 108 debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n", 109 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); 110 111 ret = spi_flash_cmd_write_enable(flash); 112 if (ret < 0) { 113 debug("SF: enabling write failed\n"); 114 break; 115 } 116 117 ret = spi_flash_cmd_write(flash->spi, cmd, 4, 118 buf + actual, chunk_len); 119 if (ret < 0) { 120 debug("SF: write failed\n"); 121 break; 122 } 123 124 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); 125 if (ret) 126 break; 127 128 offset += chunk_len; 129 } 130 131 spi_release_bus(flash->spi); 132 return ret; 133 } 134 135 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, 136 size_t cmd_len, void *data, size_t data_len) 137 { 138 struct spi_slave *spi = flash->spi; 139 int ret; 140 141 spi_claim_bus(spi); 142 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len); 143 spi_release_bus(spi); 144 145 return ret; 146 } 147 148 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, 149 size_t len, void *data) 150 { 151 u8 cmd[5], bank_sel; 152 u32 remain_len, read_len; 153 int ret = -1; 154 155 /* Handle memory-mapped SPI */ 156 if (flash->memory_map) { 157 memcpy(data, flash->memory_map + offset, len); 158 return 0; 159 } 160 161 cmd[0] = CMD_READ_ARRAY_FAST; 162 cmd[4] = 0x00; 163 164 while (len) { 165 bank_sel = offset / SPI_FLASH_16MB_BOUN; 166 167 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); 168 if (ret) { 169 debug("SF: fail to set bank%d\n", bank_sel); 170 return ret; 171 } 172 173 remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset); 174 if (len < remain_len) 175 read_len = len; 176 else 177 read_len = remain_len; 178 179 spi_flash_addr(offset, cmd); 180 181 ret = spi_flash_read_common(flash, cmd, sizeof(cmd), 182 data, read_len); 183 if (ret < 0) { 184 debug("SF: read failed\n"); 185 break; 186 } 187 188 offset += read_len; 189 len -= read_len; 190 data += read_len; 191 } 192 193 return ret; 194 } 195 196 int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout, 197 u8 cmd, u8 poll_bit) 198 { 199 struct spi_slave *spi = flash->spi; 200 unsigned long timebase; 201 int ret; 202 u8 status; 203 204 ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); 205 if (ret) { 206 debug("SF: Failed to send command %02x: %d\n", cmd, ret); 207 return ret; 208 } 209 210 timebase = get_timer(0); 211 do { 212 WATCHDOG_RESET(); 213 214 ret = spi_xfer(spi, 8, NULL, &status, 0); 215 if (ret) 216 return -1; 217 218 if ((status & poll_bit) == 0) 219 break; 220 221 } while (get_timer(timebase) < timeout); 222 223 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); 224 225 if ((status & poll_bit) == 0) 226 return 0; 227 228 /* Timed out */ 229 debug("SF: time out!\n"); 230 return -1; 231 } 232 233 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) 234 { 235 return spi_flash_cmd_poll_bit(flash, timeout, 236 CMD_READ_STATUS, STATUS_WIP); 237 } 238 239 int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) 240 { 241 u32 erase_size; 242 int ret; 243 u8 cmd[4], bank_sel; 244 245 erase_size = flash->sector_size; 246 if (offset % erase_size || len % erase_size) { 247 debug("SF: Erase offset/length not multiple of erase size\n"); 248 return -1; 249 } 250 251 ret = spi_claim_bus(flash->spi); 252 if (ret) { 253 debug("SF: Unable to claim SPI bus\n"); 254 return ret; 255 } 256 257 if (erase_size == 4096) 258 cmd[0] = CMD_ERASE_4K; 259 else 260 cmd[0] = CMD_ERASE_64K; 261 262 while (len) { 263 bank_sel = offset / SPI_FLASH_16MB_BOUN; 264 265 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); 266 if (ret) { 267 debug("SF: fail to set bank%d\n", bank_sel); 268 return ret; 269 } 270 271 spi_flash_addr(offset, cmd); 272 273 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], 274 cmd[2], cmd[3], offset); 275 276 ret = spi_flash_cmd_write_enable(flash); 277 if (ret) 278 goto out; 279 280 ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0); 281 if (ret) 282 goto out; 283 284 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT); 285 if (ret) 286 goto out; 287 288 offset += erase_size; 289 len -= erase_size; 290 } 291 292 out: 293 spi_release_bus(flash->spi); 294 return ret; 295 } 296 297 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr) 298 { 299 u8 cmd; 300 int ret; 301 302 ret = spi_flash_cmd_write_enable(flash); 303 if (ret < 0) { 304 debug("SF: enabling write failed\n"); 305 return ret; 306 } 307 308 cmd = CMD_WRITE_STATUS; 309 ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1); 310 if (ret) { 311 debug("SF: fail to write status register\n"); 312 return ret; 313 } 314 315 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); 316 if (ret < 0) { 317 debug("SF: write status register timed out\n"); 318 return ret; 319 } 320 321 return 0; 322 } 323 324 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel) 325 { 326 u8 cmd; 327 int ret; 328 329 if (flash->bank_curr == bank_sel) { 330 debug("SF: not require to enable bank%d\n", bank_sel); 331 return 0; 332 } 333 334 cmd = flash->bank_write_cmd; 335 ret = spi_flash_cmd_write_enable(flash); 336 if (ret < 0) { 337 debug("SF: enabling write failed\n"); 338 return ret; 339 } 340 341 ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1); 342 if (ret) { 343 debug("SF: fail to write bank addr register\n"); 344 return ret; 345 } 346 flash->bank_curr = bank_sel; 347 348 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); 349 if (ret < 0) { 350 debug("SF: write bank addr register timed out\n"); 351 return ret; 352 } 353 354 return 0; 355 } 356 357 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0) 358 { 359 u8 cmd; 360 u8 curr_bank = 0; 361 362 /* discover bank cmds */ 363 switch (idcode0) { 364 case SPI_FLASH_SPANSION_IDCODE0: 365 flash->bank_read_cmd = CMD_BANKADDR_BRRD; 366 flash->bank_write_cmd = CMD_BANKADDR_BRWR; 367 break; 368 case SPI_FLASH_STMICRO_IDCODE0: 369 case SPI_FLASH_WINBOND_IDCODE0: 370 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR; 371 flash->bank_write_cmd = CMD_EXTNADDR_WREAR; 372 break; 373 default: 374 printf("SF: Unsupported bank commands %02x\n", idcode0); 375 return -1; 376 } 377 378 /* read the bank reg - on which bank the flash is in currently */ 379 cmd = flash->bank_read_cmd; 380 if (flash->size > SPI_FLASH_16MB_BOUN) { 381 if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) { 382 debug("SF: fail to read bank addr register\n"); 383 return -1; 384 } 385 flash->bank_curr = curr_bank; 386 } else { 387 flash->bank_curr = curr_bank; 388 } 389 390 return 0; 391 } 392 393 #ifdef CONFIG_OF_CONTROL 394 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) 395 { 396 fdt_addr_t addr; 397 fdt_size_t size; 398 int node; 399 400 /* If there is no node, do nothing */ 401 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); 402 if (node < 0) 403 return 0; 404 405 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); 406 if (addr == FDT_ADDR_T_NONE) { 407 debug("%s: Cannot decode address\n", __func__); 408 return 0; 409 } 410 411 if (flash->size != size) { 412 debug("%s: Memory map must cover entire device\n", __func__); 413 return -1; 414 } 415 flash->memory_map = (void *)addr; 416 417 return 0; 418 } 419 #endif /* CONFIG_OF_CONTROL */ 420 421 /* 422 * The following table holds all device probe functions 423 * 424 * shift: number of continuation bytes before the ID 425 * idcode: the expected IDCODE or 0xff for non JEDEC devices 426 * probe: the function to call 427 * 428 * Non JEDEC devices should be ordered in the table such that 429 * the probe functions with best detection algorithms come first. 430 * 431 * Several matching entries are permitted, they will be tried 432 * in sequence until a probe function returns non NULL. 433 * 434 * IDCODE_CONT_LEN may be redefined if a device needs to declare a 435 * larger "shift" value. IDCODE_PART_LEN generally shouldn't be 436 * changed. This is the max number of bytes probe functions may 437 * examine when looking up part-specific identification info. 438 * 439 * Probe functions will be given the idcode buffer starting at their 440 * manu id byte (the "idcode" in the table below). In other words, 441 * all of the continuation bytes will be skipped (the "shift" below). 442 */ 443 #define IDCODE_CONT_LEN 0 444 #define IDCODE_PART_LEN 5 445 static const struct { 446 const u8 shift; 447 const u8 idcode; 448 struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode); 449 } flashes[] = { 450 /* Keep it sorted by define name */ 451 #ifdef CONFIG_SPI_FLASH_ATMEL 452 { 0, 0x1f, spi_flash_probe_atmel, }, 453 #endif 454 #ifdef CONFIG_SPI_FLASH_EON 455 { 0, 0x1c, spi_flash_probe_eon, }, 456 #endif 457 #ifdef CONFIG_SPI_FLASH_MACRONIX 458 { 0, 0xc2, spi_flash_probe_macronix, }, 459 #endif 460 #ifdef CONFIG_SPI_FLASH_SPANSION 461 { 0, 0x01, spi_flash_probe_spansion, }, 462 #endif 463 #ifdef CONFIG_SPI_FLASH_SST 464 { 0, 0xbf, spi_flash_probe_sst, }, 465 #endif 466 #ifdef CONFIG_SPI_FLASH_STMICRO 467 { 0, 0x20, spi_flash_probe_stmicro, }, 468 #endif 469 #ifdef CONFIG_SPI_FLASH_WINBOND 470 { 0, 0xef, spi_flash_probe_winbond, }, 471 #endif 472 #ifdef CONFIG_SPI_FRAM_RAMTRON 473 { 6, 0xc2, spi_fram_probe_ramtron, }, 474 # undef IDCODE_CONT_LEN 475 # define IDCODE_CONT_LEN 6 476 #endif 477 /* Keep it sorted by best detection */ 478 #ifdef CONFIG_SPI_FLASH_STMICRO 479 { 0, 0xff, spi_flash_probe_stmicro, }, 480 #endif 481 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC 482 { 0, 0xff, spi_fram_probe_ramtron, }, 483 #endif 484 }; 485 #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN) 486 487 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, 488 unsigned int max_hz, unsigned int spi_mode) 489 { 490 struct spi_slave *spi; 491 struct spi_flash *flash = NULL; 492 int ret, i, shift; 493 u8 idcode[IDCODE_LEN], *idp; 494 495 spi = spi_setup_slave(bus, cs, max_hz, spi_mode); 496 if (!spi) { 497 printf("SF: Failed to set up slave\n"); 498 return NULL; 499 } 500 501 ret = spi_claim_bus(spi); 502 if (ret) { 503 debug("SF: Failed to claim SPI bus: %d\n", ret); 504 goto err_claim_bus; 505 } 506 507 /* Read the ID codes */ 508 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); 509 if (ret) 510 goto err_read_id; 511 512 #ifdef DEBUG 513 printf("SF: Got idcodes\n"); 514 print_buffer(0, idcode, 1, sizeof(idcode), 0); 515 #endif 516 517 /* count the number of continuation bytes */ 518 for (shift = 0, idp = idcode; 519 shift < IDCODE_CONT_LEN && *idp == 0x7f; 520 ++shift, ++idp) 521 continue; 522 523 /* search the table for matches in shift and id */ 524 for (i = 0; i < ARRAY_SIZE(flashes); ++i) 525 if (flashes[i].shift == shift && flashes[i].idcode == *idp) { 526 /* we have a match, call probe */ 527 flash = flashes[i].probe(spi, idp); 528 if (flash) 529 break; 530 } 531 532 if (!flash) { 533 printf("SF: Unsupported manufacturer %02x\n", *idp); 534 goto err_manufacturer_probe; 535 } 536 537 /* Configure the BAR - disover bank cmds and read current bank */ 538 ret = spi_flash_bank_config(flash, *idp); 539 if (ret < 0) 540 goto err_manufacturer_probe; 541 542 #ifdef CONFIG_OF_CONTROL 543 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { 544 debug("SF: FDT decode error\n"); 545 goto err_manufacturer_probe; 546 } 547 #endif 548 printf("SF: Detected %s with page size ", flash->name); 549 print_size(flash->sector_size, ", total "); 550 print_size(flash->size, ""); 551 if (flash->memory_map) 552 printf(", mapped at %p", flash->memory_map); 553 puts("\n"); 554 555 spi_release_bus(spi); 556 557 return flash; 558 559 err_manufacturer_probe: 560 err_read_id: 561 spi_release_bus(spi); 562 err_claim_bus: 563 spi_free_slave(spi); 564 return NULL; 565 } 566 567 void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi, 568 const char *name) 569 { 570 struct spi_flash *flash; 571 void *ptr; 572 573 ptr = malloc(size); 574 if (!ptr) { 575 debug("SF: Failed to allocate memory\n"); 576 return NULL; 577 } 578 memset(ptr, '\0', size); 579 flash = (struct spi_flash *)(ptr + offset); 580 581 /* Set up some basic fields - caller will sort out sizes */ 582 flash->spi = spi; 583 flash->name = name; 584 585 flash->read = spi_flash_cmd_read_fast; 586 flash->write = spi_flash_cmd_write_multi; 587 flash->erase = spi_flash_cmd_erase; 588 589 return flash; 590 } 591 592 void spi_flash_free(struct spi_flash *flash) 593 { 594 spi_free_slave(flash->spi); 595 free(flash); 596 } 597