1 /* 2 * SPI flash interface 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik 6 * 7 * Licensed under the GPL-2 or later. 8 */ 9 10 #include <common.h> 11 #include <fdtdec.h> 12 #include <malloc.h> 13 #include <spi.h> 14 #include <spi_flash.h> 15 #include <watchdog.h> 16 17 #include "spi_flash_internal.h" 18 19 DECLARE_GLOBAL_DATA_PTR; 20 21 static void spi_flash_addr(u32 addr, u8 *cmd) 22 { 23 /* cmd[0] is actual command */ 24 cmd[1] = addr >> 16; 25 cmd[2] = addr >> 8; 26 cmd[3] = addr >> 0; 27 } 28 29 static int spi_flash_read_write(struct spi_slave *spi, 30 const u8 *cmd, size_t cmd_len, 31 const u8 *data_out, u8 *data_in, 32 size_t data_len) 33 { 34 unsigned long flags = SPI_XFER_BEGIN; 35 int ret; 36 37 if (data_len == 0) 38 flags |= SPI_XFER_END; 39 40 ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); 41 if (ret) { 42 debug("SF: Failed to send command (%zu bytes): %d\n", 43 cmd_len, ret); 44 } else if (data_len != 0) { 45 ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END); 46 if (ret) 47 debug("SF: Failed to transfer %zu bytes of data: %d\n", 48 data_len, ret); 49 } 50 51 return ret; 52 } 53 54 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len) 55 { 56 return spi_flash_cmd_read(spi, &cmd, 1, response, len); 57 } 58 59 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, 60 size_t cmd_len, void *data, size_t data_len) 61 { 62 return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len); 63 } 64 65 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, 66 const void *data, size_t data_len) 67 { 68 return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len); 69 } 70 71 int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, 72 size_t len, const void *buf) 73 { 74 unsigned long page_addr, byte_addr, page_size; 75 size_t chunk_len, actual; 76 int ret; 77 u8 cmd[4]; 78 79 page_size = flash->page_size; 80 page_addr = offset / page_size; 81 byte_addr = offset % page_size; 82 83 ret = spi_claim_bus(flash->spi); 84 if (ret) { 85 debug("SF: unable to claim SPI bus\n"); 86 return ret; 87 } 88 89 cmd[0] = CMD_PAGE_PROGRAM; 90 for (actual = 0; actual < len; actual += chunk_len) { 91 chunk_len = min(len - actual, page_size - byte_addr); 92 93 if (flash->spi->max_write_size) 94 chunk_len = min(chunk_len, flash->spi->max_write_size); 95 96 cmd[1] = page_addr >> 8; 97 cmd[2] = page_addr; 98 cmd[3] = byte_addr; 99 100 debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n", 101 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); 102 103 ret = spi_flash_cmd_write_enable(flash); 104 if (ret < 0) { 105 debug("SF: enabling write failed\n"); 106 break; 107 } 108 109 ret = spi_flash_cmd_write(flash->spi, cmd, 4, 110 buf + actual, chunk_len); 111 if (ret < 0) { 112 debug("SF: write failed\n"); 113 break; 114 } 115 116 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); 117 if (ret) 118 break; 119 120 byte_addr += chunk_len; 121 if (byte_addr == page_size) { 122 page_addr++; 123 byte_addr = 0; 124 } 125 } 126 127 spi_release_bus(flash->spi); 128 return ret; 129 } 130 131 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, 132 size_t cmd_len, void *data, size_t data_len) 133 { 134 struct spi_slave *spi = flash->spi; 135 int ret; 136 137 spi_claim_bus(spi); 138 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len); 139 spi_release_bus(spi); 140 141 return ret; 142 } 143 144 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, 145 size_t len, void *data) 146 { 147 u8 cmd[5]; 148 149 /* Handle memory-mapped SPI */ 150 if (flash->memory_map) { 151 memcpy(data, flash->memory_map + offset, len); 152 return 0; 153 } 154 155 cmd[0] = CMD_READ_ARRAY_FAST; 156 spi_flash_addr(offset, cmd); 157 cmd[4] = 0x00; 158 159 return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len); 160 } 161 162 int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout, 163 u8 cmd, u8 poll_bit) 164 { 165 struct spi_slave *spi = flash->spi; 166 unsigned long timebase; 167 int ret; 168 u8 status; 169 170 ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); 171 if (ret) { 172 debug("SF: Failed to send command %02x: %d\n", cmd, ret); 173 return ret; 174 } 175 176 timebase = get_timer(0); 177 do { 178 WATCHDOG_RESET(); 179 180 ret = spi_xfer(spi, 8, NULL, &status, 0); 181 if (ret) 182 return -1; 183 184 if ((status & poll_bit) == 0) 185 break; 186 187 } while (get_timer(timebase) < timeout); 188 189 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); 190 191 if ((status & poll_bit) == 0) 192 return 0; 193 194 /* Timed out */ 195 debug("SF: time out!\n"); 196 return -1; 197 } 198 199 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) 200 { 201 return spi_flash_cmd_poll_bit(flash, timeout, 202 CMD_READ_STATUS, STATUS_WIP); 203 } 204 205 int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) 206 { 207 u32 end, erase_size; 208 int ret; 209 u8 cmd[4]; 210 211 erase_size = flash->sector_size; 212 if (offset % erase_size || len % erase_size) { 213 debug("SF: Erase offset/length not multiple of erase size\n"); 214 return -1; 215 } 216 217 ret = spi_claim_bus(flash->spi); 218 if (ret) { 219 debug("SF: Unable to claim SPI bus\n"); 220 return ret; 221 } 222 223 if (erase_size == 4096) 224 cmd[0] = CMD_ERASE_4K; 225 else 226 cmd[0] = CMD_ERASE_64K; 227 end = offset + len; 228 229 while (offset < end) { 230 spi_flash_addr(offset, cmd); 231 offset += erase_size; 232 233 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], 234 cmd[2], cmd[3], offset); 235 236 ret = spi_flash_cmd_write_enable(flash); 237 if (ret) 238 goto out; 239 240 ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0); 241 if (ret) 242 goto out; 243 244 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT); 245 if (ret) 246 goto out; 247 } 248 249 out: 250 spi_release_bus(flash->spi); 251 return ret; 252 } 253 254 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr) 255 { 256 u8 cmd; 257 int ret; 258 259 ret = spi_flash_cmd_write_enable(flash); 260 if (ret < 0) { 261 debug("SF: enabling write failed\n"); 262 return ret; 263 } 264 265 cmd = CMD_WRITE_STATUS; 266 ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1); 267 if (ret) { 268 debug("SF: fail to write status register\n"); 269 return ret; 270 } 271 272 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); 273 if (ret < 0) { 274 debug("SF: write status register timed out\n"); 275 return ret; 276 } 277 278 return 0; 279 } 280 281 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel) 282 { 283 u8 cmd; 284 int ret; 285 286 if (flash->bank_curr == bank_sel) { 287 debug("SF: not require to enable bank%d\n", bank_sel); 288 return 0; 289 } 290 291 cmd = flash->bank_write_cmd; 292 ret = spi_flash_cmd_write_enable(flash); 293 if (ret < 0) { 294 debug("SF: enabling write failed\n"); 295 return ret; 296 } 297 298 ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1); 299 if (ret) { 300 debug("SF: fail to write bank addr register\n"); 301 return ret; 302 } 303 flash->bank_curr = bank_sel; 304 305 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); 306 if (ret < 0) { 307 debug("SF: write bank addr register timed out\n"); 308 return ret; 309 } 310 311 return 0; 312 } 313 314 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0) 315 { 316 u8 cmd; 317 u8 curr_bank = 0; 318 319 /* discover bank cmds */ 320 switch (idcode0) { 321 case SPI_FLASH_SPANSION_IDCODE0: 322 flash->bank_read_cmd = CMD_BANKADDR_BRRD; 323 flash->bank_write_cmd = CMD_BANKADDR_BRWR; 324 break; 325 case SPI_FLASH_STMICRO_IDCODE0: 326 case SPI_FLASH_WINBOND_IDCODE0: 327 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR; 328 flash->bank_write_cmd = CMD_EXTNADDR_WREAR; 329 break; 330 default: 331 printf("SF: Unsupported bank commands %02x\n", idcode0); 332 return -1; 333 } 334 335 /* read the bank reg - on which bank the flash is in currently */ 336 cmd = flash->bank_read_cmd; 337 if (flash->size > SPI_FLASH_16MB_BOUN) { 338 if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) { 339 debug("SF: fail to read bank addr register\n"); 340 return -1; 341 } 342 flash->bank_curr = curr_bank; 343 } else { 344 flash->bank_curr = curr_bank; 345 } 346 347 return 0; 348 } 349 350 #ifdef CONFIG_OF_CONTROL 351 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) 352 { 353 fdt_addr_t addr; 354 fdt_size_t size; 355 int node; 356 357 /* If there is no node, do nothing */ 358 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); 359 if (node < 0) 360 return 0; 361 362 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); 363 if (addr == FDT_ADDR_T_NONE) { 364 debug("%s: Cannot decode address\n", __func__); 365 return 0; 366 } 367 368 if (flash->size != size) { 369 debug("%s: Memory map must cover entire device\n", __func__); 370 return -1; 371 } 372 flash->memory_map = (void *)addr; 373 374 return 0; 375 } 376 #endif /* CONFIG_OF_CONTROL */ 377 378 /* 379 * The following table holds all device probe functions 380 * 381 * shift: number of continuation bytes before the ID 382 * idcode: the expected IDCODE or 0xff for non JEDEC devices 383 * probe: the function to call 384 * 385 * Non JEDEC devices should be ordered in the table such that 386 * the probe functions with best detection algorithms come first. 387 * 388 * Several matching entries are permitted, they will be tried 389 * in sequence until a probe function returns non NULL. 390 * 391 * IDCODE_CONT_LEN may be redefined if a device needs to declare a 392 * larger "shift" value. IDCODE_PART_LEN generally shouldn't be 393 * changed. This is the max number of bytes probe functions may 394 * examine when looking up part-specific identification info. 395 * 396 * Probe functions will be given the idcode buffer starting at their 397 * manu id byte (the "idcode" in the table below). In other words, 398 * all of the continuation bytes will be skipped (the "shift" below). 399 */ 400 #define IDCODE_CONT_LEN 0 401 #define IDCODE_PART_LEN 5 402 static const struct { 403 const u8 shift; 404 const u8 idcode; 405 struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode); 406 } flashes[] = { 407 /* Keep it sorted by define name */ 408 #ifdef CONFIG_SPI_FLASH_ATMEL 409 { 0, 0x1f, spi_flash_probe_atmel, }, 410 #endif 411 #ifdef CONFIG_SPI_FLASH_EON 412 { 0, 0x1c, spi_flash_probe_eon, }, 413 #endif 414 #ifdef CONFIG_SPI_FLASH_MACRONIX 415 { 0, 0xc2, spi_flash_probe_macronix, }, 416 #endif 417 #ifdef CONFIG_SPI_FLASH_SPANSION 418 { 0, 0x01, spi_flash_probe_spansion, }, 419 #endif 420 #ifdef CONFIG_SPI_FLASH_SST 421 { 0, 0xbf, spi_flash_probe_sst, }, 422 #endif 423 #ifdef CONFIG_SPI_FLASH_STMICRO 424 { 0, 0x20, spi_flash_probe_stmicro, }, 425 #endif 426 #ifdef CONFIG_SPI_FLASH_WINBOND 427 { 0, 0xef, spi_flash_probe_winbond, }, 428 #endif 429 #ifdef CONFIG_SPI_FRAM_RAMTRON 430 { 6, 0xc2, spi_fram_probe_ramtron, }, 431 # undef IDCODE_CONT_LEN 432 # define IDCODE_CONT_LEN 6 433 #endif 434 /* Keep it sorted by best detection */ 435 #ifdef CONFIG_SPI_FLASH_STMICRO 436 { 0, 0xff, spi_flash_probe_stmicro, }, 437 #endif 438 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC 439 { 0, 0xff, spi_fram_probe_ramtron, }, 440 #endif 441 }; 442 #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN) 443 444 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, 445 unsigned int max_hz, unsigned int spi_mode) 446 { 447 struct spi_slave *spi; 448 struct spi_flash *flash = NULL; 449 int ret, i, shift; 450 u8 idcode[IDCODE_LEN], *idp; 451 452 spi = spi_setup_slave(bus, cs, max_hz, spi_mode); 453 if (!spi) { 454 printf("SF: Failed to set up slave\n"); 455 return NULL; 456 } 457 458 ret = spi_claim_bus(spi); 459 if (ret) { 460 debug("SF: Failed to claim SPI bus: %d\n", ret); 461 goto err_claim_bus; 462 } 463 464 /* Read the ID codes */ 465 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); 466 if (ret) 467 goto err_read_id; 468 469 #ifdef DEBUG 470 printf("SF: Got idcodes\n"); 471 print_buffer(0, idcode, 1, sizeof(idcode), 0); 472 #endif 473 474 /* count the number of continuation bytes */ 475 for (shift = 0, idp = idcode; 476 shift < IDCODE_CONT_LEN && *idp == 0x7f; 477 ++shift, ++idp) 478 continue; 479 480 /* search the table for matches in shift and id */ 481 for (i = 0; i < ARRAY_SIZE(flashes); ++i) 482 if (flashes[i].shift == shift && flashes[i].idcode == *idp) { 483 /* we have a match, call probe */ 484 flash = flashes[i].probe(spi, idp); 485 if (flash) 486 break; 487 } 488 489 if (!flash) { 490 printf("SF: Unsupported manufacturer %02x\n", *idp); 491 goto err_manufacturer_probe; 492 } 493 494 /* Configure the BAR - disover bank cmds and read current bank */ 495 ret = spi_flash_bank_config(flash, *idp); 496 if (ret < 0) 497 goto err_manufacturer_probe; 498 499 #ifdef CONFIG_OF_CONTROL 500 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { 501 debug("SF: FDT decode error\n"); 502 goto err_manufacturer_probe; 503 } 504 #endif 505 printf("SF: Detected %s with page size ", flash->name); 506 print_size(flash->sector_size, ", total "); 507 print_size(flash->size, ""); 508 if (flash->memory_map) 509 printf(", mapped at %p", flash->memory_map); 510 puts("\n"); 511 512 spi_release_bus(spi); 513 514 return flash; 515 516 err_manufacturer_probe: 517 err_read_id: 518 spi_release_bus(spi); 519 err_claim_bus: 520 spi_free_slave(spi); 521 return NULL; 522 } 523 524 void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi, 525 const char *name) 526 { 527 struct spi_flash *flash; 528 void *ptr; 529 530 ptr = malloc(size); 531 if (!ptr) { 532 debug("SF: Failed to allocate memory\n"); 533 return NULL; 534 } 535 memset(ptr, '\0', size); 536 flash = (struct spi_flash *)(ptr + offset); 537 538 /* Set up some basic fields - caller will sort out sizes */ 539 flash->spi = spi; 540 flash->name = name; 541 542 flash->read = spi_flash_cmd_read_fast; 543 flash->write = spi_flash_cmd_write_multi; 544 flash->erase = spi_flash_cmd_erase; 545 546 return flash; 547 } 548 549 void spi_flash_free(struct spi_flash *flash) 550 { 551 spi_free_slave(flash->spi); 552 free(flash); 553 } 554