xref: /rk3399_rockchip-uboot/drivers/mtd/spi/spi_flash.c (revision e3ff9d51ecf5fb00eccafa35965112e487f8b522)
1 /*
2  * SPI flash interface
3  *
4  * Copyright (C) 2008 Atmel Corporation
5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
6  *
7  * Licensed under the GPL-2 or later.
8  */
9 
10 #include <common.h>
11 #include <fdtdec.h>
12 #include <malloc.h>
13 #include <spi.h>
14 #include <spi_flash.h>
15 #include <watchdog.h>
16 
17 #include "spi_flash_internal.h"
18 
19 DECLARE_GLOBAL_DATA_PTR;
20 
21 static void spi_flash_addr(u32 addr, u8 *cmd)
22 {
23 	/* cmd[0] is actual command */
24 	cmd[1] = addr >> 16;
25 	cmd[2] = addr >> 8;
26 	cmd[3] = addr >> 0;
27 }
28 
29 static int spi_flash_read_write(struct spi_slave *spi,
30 				const u8 *cmd, size_t cmd_len,
31 				const u8 *data_out, u8 *data_in,
32 				size_t data_len)
33 {
34 	unsigned long flags = SPI_XFER_BEGIN;
35 	int ret;
36 
37 	if (data_len == 0)
38 		flags |= SPI_XFER_END;
39 
40 	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
41 	if (ret) {
42 		debug("SF: Failed to send command (%zu bytes): %d\n",
43 				cmd_len, ret);
44 	} else if (data_len != 0) {
45 		ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END);
46 		if (ret)
47 			debug("SF: Failed to transfer %zu bytes of data: %d\n",
48 					data_len, ret);
49 	}
50 
51 	return ret;
52 }
53 
54 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
55 {
56 	return spi_flash_cmd_read(spi, &cmd, 1, response, len);
57 }
58 
59 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
60 		size_t cmd_len, void *data, size_t data_len)
61 {
62 	return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
63 }
64 
65 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
66 		const void *data, size_t data_len)
67 {
68 	return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
69 }
70 
71 int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
72 		size_t len, const void *buf)
73 {
74 	unsigned long page_addr, byte_addr, page_size;
75 	size_t chunk_len, actual;
76 	int ret;
77 	u8 cmd[4], bank_sel;
78 
79 	page_size = flash->page_size;
80 
81 	ret = spi_claim_bus(flash->spi);
82 	if (ret) {
83 		debug("SF: unable to claim SPI bus\n");
84 		return ret;
85 	}
86 
87 	cmd[0] = CMD_PAGE_PROGRAM;
88 	for (actual = 0; actual < len; actual += chunk_len) {
89 		bank_sel = offset / SPI_FLASH_16MB_BOUN;
90 
91 		ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
92 		if (ret) {
93 			debug("SF: fail to set bank%d\n", bank_sel);
94 			return ret;
95 		}
96 
97 		page_addr = offset / page_size;
98 		byte_addr = offset % page_size;
99 		chunk_len = min(len - actual, page_size - byte_addr);
100 
101 		if (flash->spi->max_write_size)
102 			chunk_len = min(chunk_len, flash->spi->max_write_size);
103 
104 		cmd[1] = page_addr >> 8;
105 		cmd[2] = page_addr;
106 		cmd[3] = byte_addr;
107 
108 		debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
109 		      buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
110 
111 		ret = spi_flash_cmd_write_enable(flash);
112 		if (ret < 0) {
113 			debug("SF: enabling write failed\n");
114 			break;
115 		}
116 
117 		ret = spi_flash_cmd_write(flash->spi, cmd, 4,
118 					  buf + actual, chunk_len);
119 		if (ret < 0) {
120 			debug("SF: write failed\n");
121 			break;
122 		}
123 
124 		ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
125 		if (ret)
126 			break;
127 
128 		offset += chunk_len;
129 	}
130 
131 	spi_release_bus(flash->spi);
132 	return ret;
133 }
134 
135 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
136 		size_t cmd_len, void *data, size_t data_len)
137 {
138 	struct spi_slave *spi = flash->spi;
139 	int ret;
140 
141 	spi_claim_bus(spi);
142 	ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
143 	spi_release_bus(spi);
144 
145 	return ret;
146 }
147 
148 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
149 		size_t len, void *data)
150 {
151 	u8 cmd[5];
152 
153 	/* Handle memory-mapped SPI */
154 	if (flash->memory_map) {
155 		memcpy(data, flash->memory_map + offset, len);
156 		return 0;
157 	}
158 
159 	cmd[0] = CMD_READ_ARRAY_FAST;
160 	spi_flash_addr(offset, cmd);
161 	cmd[4] = 0x00;
162 
163 	return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len);
164 }
165 
166 int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
167 			   u8 cmd, u8 poll_bit)
168 {
169 	struct spi_slave *spi = flash->spi;
170 	unsigned long timebase;
171 	int ret;
172 	u8 status;
173 
174 	ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
175 	if (ret) {
176 		debug("SF: Failed to send command %02x: %d\n", cmd, ret);
177 		return ret;
178 	}
179 
180 	timebase = get_timer(0);
181 	do {
182 		WATCHDOG_RESET();
183 
184 		ret = spi_xfer(spi, 8, NULL, &status, 0);
185 		if (ret)
186 			return -1;
187 
188 		if ((status & poll_bit) == 0)
189 			break;
190 
191 	} while (get_timer(timebase) < timeout);
192 
193 	spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
194 
195 	if ((status & poll_bit) == 0)
196 		return 0;
197 
198 	/* Timed out */
199 	debug("SF: time out!\n");
200 	return -1;
201 }
202 
203 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
204 {
205 	return spi_flash_cmd_poll_bit(flash, timeout,
206 		CMD_READ_STATUS, STATUS_WIP);
207 }
208 
209 int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
210 {
211 	u32 erase_size;
212 	int ret;
213 	u8 cmd[4], bank_sel;
214 
215 	erase_size = flash->sector_size;
216 	if (offset % erase_size || len % erase_size) {
217 		debug("SF: Erase offset/length not multiple of erase size\n");
218 		return -1;
219 	}
220 
221 	ret = spi_claim_bus(flash->spi);
222 	if (ret) {
223 		debug("SF: Unable to claim SPI bus\n");
224 		return ret;
225 	}
226 
227 	if (erase_size == 4096)
228 		cmd[0] = CMD_ERASE_4K;
229 	else
230 		cmd[0] = CMD_ERASE_64K;
231 
232 	while (len) {
233 		bank_sel = offset / SPI_FLASH_16MB_BOUN;
234 
235 		ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
236 		if (ret) {
237 			debug("SF: fail to set bank%d\n", bank_sel);
238 			return ret;
239 		}
240 
241 		spi_flash_addr(offset, cmd);
242 
243 		debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
244 		      cmd[2], cmd[3], offset);
245 
246 		ret = spi_flash_cmd_write_enable(flash);
247 		if (ret)
248 			goto out;
249 
250 		ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0);
251 		if (ret)
252 			goto out;
253 
254 		ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
255 		if (ret)
256 			goto out;
257 
258 		offset += erase_size;
259 		len -= erase_size;
260 	}
261 
262  out:
263 	spi_release_bus(flash->spi);
264 	return ret;
265 }
266 
267 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
268 {
269 	u8 cmd;
270 	int ret;
271 
272 	ret = spi_flash_cmd_write_enable(flash);
273 	if (ret < 0) {
274 		debug("SF: enabling write failed\n");
275 		return ret;
276 	}
277 
278 	cmd = CMD_WRITE_STATUS;
279 	ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1);
280 	if (ret) {
281 		debug("SF: fail to write status register\n");
282 		return ret;
283 	}
284 
285 	ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
286 	if (ret < 0) {
287 		debug("SF: write status register timed out\n");
288 		return ret;
289 	}
290 
291 	return 0;
292 }
293 
294 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
295 {
296 	u8 cmd;
297 	int ret;
298 
299 	if (flash->bank_curr == bank_sel) {
300 		debug("SF: not require to enable bank%d\n", bank_sel);
301 		return 0;
302 	}
303 
304 	cmd = flash->bank_write_cmd;
305 	ret = spi_flash_cmd_write_enable(flash);
306 	if (ret < 0) {
307 		debug("SF: enabling write failed\n");
308 		return ret;
309 	}
310 
311 	ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1);
312 	if (ret) {
313 		debug("SF: fail to write bank addr register\n");
314 		return ret;
315 	}
316 	flash->bank_curr = bank_sel;
317 
318 	ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
319 	if (ret < 0) {
320 		debug("SF: write bank addr register timed out\n");
321 		return ret;
322 	}
323 
324 	return 0;
325 }
326 
327 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
328 {
329 	u8 cmd;
330 	u8 curr_bank = 0;
331 
332 	/* discover bank cmds */
333 	switch (idcode0) {
334 	case SPI_FLASH_SPANSION_IDCODE0:
335 		flash->bank_read_cmd = CMD_BANKADDR_BRRD;
336 		flash->bank_write_cmd = CMD_BANKADDR_BRWR;
337 		break;
338 	case SPI_FLASH_STMICRO_IDCODE0:
339 	case SPI_FLASH_WINBOND_IDCODE0:
340 		flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
341 		flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
342 		break;
343 	default:
344 		printf("SF: Unsupported bank commands %02x\n", idcode0);
345 		return -1;
346 	}
347 
348 	/* read the bank reg - on which bank the flash is in currently */
349 	cmd = flash->bank_read_cmd;
350 	if (flash->size > SPI_FLASH_16MB_BOUN) {
351 		if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
352 			debug("SF: fail to read bank addr register\n");
353 			return -1;
354 		}
355 		flash->bank_curr = curr_bank;
356 	} else {
357 		flash->bank_curr = curr_bank;
358 	}
359 
360 	return 0;
361 }
362 
363 #ifdef CONFIG_OF_CONTROL
364 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
365 {
366 	fdt_addr_t addr;
367 	fdt_size_t size;
368 	int node;
369 
370 	/* If there is no node, do nothing */
371 	node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
372 	if (node < 0)
373 		return 0;
374 
375 	addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
376 	if (addr == FDT_ADDR_T_NONE) {
377 		debug("%s: Cannot decode address\n", __func__);
378 		return 0;
379 	}
380 
381 	if (flash->size != size) {
382 		debug("%s: Memory map must cover entire device\n", __func__);
383 		return -1;
384 	}
385 	flash->memory_map = (void *)addr;
386 
387 	return 0;
388 }
389 #endif /* CONFIG_OF_CONTROL */
390 
391 /*
392  * The following table holds all device probe functions
393  *
394  * shift:  number of continuation bytes before the ID
395  * idcode: the expected IDCODE or 0xff for non JEDEC devices
396  * probe:  the function to call
397  *
398  * Non JEDEC devices should be ordered in the table such that
399  * the probe functions with best detection algorithms come first.
400  *
401  * Several matching entries are permitted, they will be tried
402  * in sequence until a probe function returns non NULL.
403  *
404  * IDCODE_CONT_LEN may be redefined if a device needs to declare a
405  * larger "shift" value.  IDCODE_PART_LEN generally shouldn't be
406  * changed.  This is the max number of bytes probe functions may
407  * examine when looking up part-specific identification info.
408  *
409  * Probe functions will be given the idcode buffer starting at their
410  * manu id byte (the "idcode" in the table below).  In other words,
411  * all of the continuation bytes will be skipped (the "shift" below).
412  */
413 #define IDCODE_CONT_LEN 0
414 #define IDCODE_PART_LEN 5
415 static const struct {
416 	const u8 shift;
417 	const u8 idcode;
418 	struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
419 } flashes[] = {
420 	/* Keep it sorted by define name */
421 #ifdef CONFIG_SPI_FLASH_ATMEL
422 	{ 0, 0x1f, spi_flash_probe_atmel, },
423 #endif
424 #ifdef CONFIG_SPI_FLASH_EON
425 	{ 0, 0x1c, spi_flash_probe_eon, },
426 #endif
427 #ifdef CONFIG_SPI_FLASH_MACRONIX
428 	{ 0, 0xc2, spi_flash_probe_macronix, },
429 #endif
430 #ifdef CONFIG_SPI_FLASH_SPANSION
431 	{ 0, 0x01, spi_flash_probe_spansion, },
432 #endif
433 #ifdef CONFIG_SPI_FLASH_SST
434 	{ 0, 0xbf, spi_flash_probe_sst, },
435 #endif
436 #ifdef CONFIG_SPI_FLASH_STMICRO
437 	{ 0, 0x20, spi_flash_probe_stmicro, },
438 #endif
439 #ifdef CONFIG_SPI_FLASH_WINBOND
440 	{ 0, 0xef, spi_flash_probe_winbond, },
441 #endif
442 #ifdef CONFIG_SPI_FRAM_RAMTRON
443 	{ 6, 0xc2, spi_fram_probe_ramtron, },
444 # undef IDCODE_CONT_LEN
445 # define IDCODE_CONT_LEN 6
446 #endif
447 	/* Keep it sorted by best detection */
448 #ifdef CONFIG_SPI_FLASH_STMICRO
449 	{ 0, 0xff, spi_flash_probe_stmicro, },
450 #endif
451 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
452 	{ 0, 0xff, spi_fram_probe_ramtron, },
453 #endif
454 };
455 #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
456 
457 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
458 		unsigned int max_hz, unsigned int spi_mode)
459 {
460 	struct spi_slave *spi;
461 	struct spi_flash *flash = NULL;
462 	int ret, i, shift;
463 	u8 idcode[IDCODE_LEN], *idp;
464 
465 	spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
466 	if (!spi) {
467 		printf("SF: Failed to set up slave\n");
468 		return NULL;
469 	}
470 
471 	ret = spi_claim_bus(spi);
472 	if (ret) {
473 		debug("SF: Failed to claim SPI bus: %d\n", ret);
474 		goto err_claim_bus;
475 	}
476 
477 	/* Read the ID codes */
478 	ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
479 	if (ret)
480 		goto err_read_id;
481 
482 #ifdef DEBUG
483 	printf("SF: Got idcodes\n");
484 	print_buffer(0, idcode, 1, sizeof(idcode), 0);
485 #endif
486 
487 	/* count the number of continuation bytes */
488 	for (shift = 0, idp = idcode;
489 	     shift < IDCODE_CONT_LEN && *idp == 0x7f;
490 	     ++shift, ++idp)
491 		continue;
492 
493 	/* search the table for matches in shift and id */
494 	for (i = 0; i < ARRAY_SIZE(flashes); ++i)
495 		if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
496 			/* we have a match, call probe */
497 			flash = flashes[i].probe(spi, idp);
498 			if (flash)
499 				break;
500 		}
501 
502 	if (!flash) {
503 		printf("SF: Unsupported manufacturer %02x\n", *idp);
504 		goto err_manufacturer_probe;
505 	}
506 
507 	/* Configure the BAR - disover bank cmds and read current bank  */
508 	ret = spi_flash_bank_config(flash, *idp);
509 	if (ret < 0)
510 		goto err_manufacturer_probe;
511 
512 #ifdef CONFIG_OF_CONTROL
513 	if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
514 		debug("SF: FDT decode error\n");
515 		goto err_manufacturer_probe;
516 	}
517 #endif
518 	printf("SF: Detected %s with page size ", flash->name);
519 	print_size(flash->sector_size, ", total ");
520 	print_size(flash->size, "");
521 	if (flash->memory_map)
522 		printf(", mapped at %p", flash->memory_map);
523 	puts("\n");
524 
525 	spi_release_bus(spi);
526 
527 	return flash;
528 
529 err_manufacturer_probe:
530 err_read_id:
531 	spi_release_bus(spi);
532 err_claim_bus:
533 	spi_free_slave(spi);
534 	return NULL;
535 }
536 
537 void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
538 			 const char *name)
539 {
540 	struct spi_flash *flash;
541 	void *ptr;
542 
543 	ptr = malloc(size);
544 	if (!ptr) {
545 		debug("SF: Failed to allocate memory\n");
546 		return NULL;
547 	}
548 	memset(ptr, '\0', size);
549 	flash = (struct spi_flash *)(ptr + offset);
550 
551 	/* Set up some basic fields - caller will sort out sizes */
552 	flash->spi = spi;
553 	flash->name = name;
554 
555 	flash->read = spi_flash_cmd_read_fast;
556 	flash->write = spi_flash_cmd_write_multi;
557 	flash->erase = spi_flash_cmd_erase;
558 
559 	return flash;
560 }
561 
562 void spi_flash_free(struct spi_flash *flash)
563 {
564 	spi_free_slave(flash->spi);
565 	free(flash);
566 }
567