xref: /rk3399_rockchip-uboot/drivers/mtd/spi/spi_flash.c (revision cf6b11dcda2f13d1c05c2f20e2a1735a833a41fe)
1 /*
2  * SPI flash interface
3  *
4  * Copyright (C) 2008 Atmel Corporation
5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
6  *
7  * Licensed under the GPL-2 or later.
8  */
9 
10 #include <common.h>
11 #include <fdtdec.h>
12 #include <malloc.h>
13 #include <spi.h>
14 #include <spi_flash.h>
15 #include <watchdog.h>
16 
17 #include "spi_flash_internal.h"
18 
19 DECLARE_GLOBAL_DATA_PTR;
20 
21 static void spi_flash_addr(u32 addr, u8 *cmd)
22 {
23 	/* cmd[0] is actual command */
24 	cmd[1] = addr >> 16;
25 	cmd[2] = addr >> 8;
26 	cmd[3] = addr >> 0;
27 }
28 
29 static int spi_flash_read_write(struct spi_slave *spi,
30 				const u8 *cmd, size_t cmd_len,
31 				const u8 *data_out, u8 *data_in,
32 				size_t data_len)
33 {
34 	unsigned long flags = SPI_XFER_BEGIN;
35 	int ret;
36 
37 	if (data_len == 0)
38 		flags |= SPI_XFER_END;
39 
40 	ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
41 	if (ret) {
42 		debug("SF: Failed to send command (%zu bytes): %d\n",
43 				cmd_len, ret);
44 	} else if (data_len != 0) {
45 		ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END);
46 		if (ret)
47 			debug("SF: Failed to transfer %zu bytes of data: %d\n",
48 					data_len, ret);
49 	}
50 
51 	return ret;
52 }
53 
54 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
55 {
56 	return spi_flash_cmd_read(spi, &cmd, 1, response, len);
57 }
58 
59 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
60 		size_t cmd_len, void *data, size_t data_len)
61 {
62 	return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
63 }
64 
65 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
66 		const void *data, size_t data_len)
67 {
68 	return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
69 }
70 
71 int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
72 		size_t len, const void *buf)
73 {
74 	unsigned long page_addr, byte_addr, page_size;
75 	size_t chunk_len, actual;
76 	int ret;
77 	u8 cmd[4];
78 
79 	page_size = flash->page_size;
80 	page_addr = offset / page_size;
81 	byte_addr = offset % page_size;
82 
83 	ret = spi_claim_bus(flash->spi);
84 	if (ret) {
85 		debug("SF: unable to claim SPI bus\n");
86 		return ret;
87 	}
88 
89 	cmd[0] = CMD_PAGE_PROGRAM;
90 	for (actual = 0; actual < len; actual += chunk_len) {
91 		chunk_len = min(len - actual, page_size - byte_addr);
92 
93 		if (flash->spi->max_write_size)
94 			chunk_len = min(chunk_len, flash->spi->max_write_size);
95 
96 		cmd[1] = page_addr >> 8;
97 		cmd[2] = page_addr;
98 		cmd[3] = byte_addr;
99 
100 		debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
101 		      buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
102 
103 		ret = spi_flash_cmd_write_enable(flash);
104 		if (ret < 0) {
105 			debug("SF: enabling write failed\n");
106 			break;
107 		}
108 
109 		ret = spi_flash_cmd_write(flash->spi, cmd, 4,
110 					  buf + actual, chunk_len);
111 		if (ret < 0) {
112 			debug("SF: write failed\n");
113 			break;
114 		}
115 
116 		ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
117 		if (ret)
118 			break;
119 
120 		byte_addr += chunk_len;
121 		if (byte_addr == page_size) {
122 			page_addr++;
123 			byte_addr = 0;
124 		}
125 	}
126 
127 	spi_release_bus(flash->spi);
128 	return ret;
129 }
130 
131 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
132 		size_t cmd_len, void *data, size_t data_len)
133 {
134 	struct spi_slave *spi = flash->spi;
135 	int ret;
136 
137 	spi_claim_bus(spi);
138 	ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
139 	spi_release_bus(spi);
140 
141 	return ret;
142 }
143 
144 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
145 		size_t len, void *data)
146 {
147 	u8 cmd[5];
148 
149 	/* Handle memory-mapped SPI */
150 	if (flash->memory_map) {
151 		memcpy(data, flash->memory_map + offset, len);
152 		return 0;
153 	}
154 
155 	cmd[0] = CMD_READ_ARRAY_FAST;
156 	spi_flash_addr(offset, cmd);
157 	cmd[4] = 0x00;
158 
159 	return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len);
160 }
161 
162 int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
163 			   u8 cmd, u8 poll_bit)
164 {
165 	struct spi_slave *spi = flash->spi;
166 	unsigned long timebase;
167 	int ret;
168 	u8 status;
169 
170 	ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
171 	if (ret) {
172 		debug("SF: Failed to send command %02x: %d\n", cmd, ret);
173 		return ret;
174 	}
175 
176 	timebase = get_timer(0);
177 	do {
178 		WATCHDOG_RESET();
179 
180 		ret = spi_xfer(spi, 8, NULL, &status, 0);
181 		if (ret)
182 			return -1;
183 
184 		if ((status & poll_bit) == 0)
185 			break;
186 
187 	} while (get_timer(timebase) < timeout);
188 
189 	spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
190 
191 	if ((status & poll_bit) == 0)
192 		return 0;
193 
194 	/* Timed out */
195 	debug("SF: time out!\n");
196 	return -1;
197 }
198 
199 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
200 {
201 	return spi_flash_cmd_poll_bit(flash, timeout,
202 		CMD_READ_STATUS, STATUS_WIP);
203 }
204 
205 int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
206 {
207 	u32 end, erase_size;
208 	int ret;
209 	u8 cmd[4];
210 
211 	erase_size = flash->sector_size;
212 	if (offset % erase_size || len % erase_size) {
213 		debug("SF: Erase offset/length not multiple of erase size\n");
214 		return -1;
215 	}
216 
217 	ret = spi_claim_bus(flash->spi);
218 	if (ret) {
219 		debug("SF: Unable to claim SPI bus\n");
220 		return ret;
221 	}
222 
223 	if (erase_size == 4096)
224 		cmd[0] = CMD_ERASE_4K;
225 	else
226 		cmd[0] = CMD_ERASE_64K;
227 	end = offset + len;
228 
229 	while (offset < end) {
230 		spi_flash_addr(offset, cmd);
231 		offset += erase_size;
232 
233 		debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
234 		      cmd[2], cmd[3], offset);
235 
236 		ret = spi_flash_cmd_write_enable(flash);
237 		if (ret)
238 			goto out;
239 
240 		ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0);
241 		if (ret)
242 			goto out;
243 
244 		ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
245 		if (ret)
246 			goto out;
247 	}
248 
249  out:
250 	spi_release_bus(flash->spi);
251 	return ret;
252 }
253 
254 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
255 {
256 	u8 cmd;
257 	int ret;
258 
259 	ret = spi_flash_cmd_write_enable(flash);
260 	if (ret < 0) {
261 		debug("SF: enabling write failed\n");
262 		return ret;
263 	}
264 
265 	cmd = CMD_WRITE_STATUS;
266 	ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1);
267 	if (ret) {
268 		debug("SF: fail to write status register\n");
269 		return ret;
270 	}
271 
272 	ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
273 	if (ret < 0) {
274 		debug("SF: write status register timed out\n");
275 		return ret;
276 	}
277 
278 	return 0;
279 }
280 
281 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
282 {
283 	u8 cmd;
284 	int ret;
285 
286 	ret = spi_flash_cmd_write_enable(flash);
287 	if (ret < 0) {
288 		debug("SF: enabling write failed\n");
289 		return ret;
290 	}
291 
292 	ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1);
293 	if (ret) {
294 		debug("SF: fail to write bank addr register\n");
295 		return ret;
296 	}
297 
298 	ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
299 	if (ret < 0) {
300 		debug("SF: write bank addr register timed out\n");
301 		return ret;
302 	}
303 
304 	return 0;
305 }
306 
307 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
308 {
309 	/* discover bank cmds */
310 	switch (idcode0) {
311 	case SPI_FLASH_SPANSION_IDCODE0:
312 		flash->bank_read_cmd = CMD_BANKADDR_BRRD;
313 		flash->bank_write_cmd = CMD_BANKADDR_BRWR;
314 		break;
315 	case SPI_FLASH_STMICRO_IDCODE0:
316 	case SPI_FLASH_WINBOND_IDCODE0:
317 		flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
318 		flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
319 		break;
320 	default:
321 		printf("SF: Unsupported bank commands %02x\n", idcode0);
322 		return -1;
323 	}
324 
325 	return 0;
326 }
327 
328 #ifdef CONFIG_OF_CONTROL
329 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
330 {
331 	fdt_addr_t addr;
332 	fdt_size_t size;
333 	int node;
334 
335 	/* If there is no node, do nothing */
336 	node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
337 	if (node < 0)
338 		return 0;
339 
340 	addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
341 	if (addr == FDT_ADDR_T_NONE) {
342 		debug("%s: Cannot decode address\n", __func__);
343 		return 0;
344 	}
345 
346 	if (flash->size != size) {
347 		debug("%s: Memory map must cover entire device\n", __func__);
348 		return -1;
349 	}
350 	flash->memory_map = (void *)addr;
351 
352 	return 0;
353 }
354 #endif /* CONFIG_OF_CONTROL */
355 
356 /*
357  * The following table holds all device probe functions
358  *
359  * shift:  number of continuation bytes before the ID
360  * idcode: the expected IDCODE or 0xff for non JEDEC devices
361  * probe:  the function to call
362  *
363  * Non JEDEC devices should be ordered in the table such that
364  * the probe functions with best detection algorithms come first.
365  *
366  * Several matching entries are permitted, they will be tried
367  * in sequence until a probe function returns non NULL.
368  *
369  * IDCODE_CONT_LEN may be redefined if a device needs to declare a
370  * larger "shift" value.  IDCODE_PART_LEN generally shouldn't be
371  * changed.  This is the max number of bytes probe functions may
372  * examine when looking up part-specific identification info.
373  *
374  * Probe functions will be given the idcode buffer starting at their
375  * manu id byte (the "idcode" in the table below).  In other words,
376  * all of the continuation bytes will be skipped (the "shift" below).
377  */
378 #define IDCODE_CONT_LEN 0
379 #define IDCODE_PART_LEN 5
380 static const struct {
381 	const u8 shift;
382 	const u8 idcode;
383 	struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
384 } flashes[] = {
385 	/* Keep it sorted by define name */
386 #ifdef CONFIG_SPI_FLASH_ATMEL
387 	{ 0, 0x1f, spi_flash_probe_atmel, },
388 #endif
389 #ifdef CONFIG_SPI_FLASH_EON
390 	{ 0, 0x1c, spi_flash_probe_eon, },
391 #endif
392 #ifdef CONFIG_SPI_FLASH_MACRONIX
393 	{ 0, 0xc2, spi_flash_probe_macronix, },
394 #endif
395 #ifdef CONFIG_SPI_FLASH_SPANSION
396 	{ 0, 0x01, spi_flash_probe_spansion, },
397 #endif
398 #ifdef CONFIG_SPI_FLASH_SST
399 	{ 0, 0xbf, spi_flash_probe_sst, },
400 #endif
401 #ifdef CONFIG_SPI_FLASH_STMICRO
402 	{ 0, 0x20, spi_flash_probe_stmicro, },
403 #endif
404 #ifdef CONFIG_SPI_FLASH_WINBOND
405 	{ 0, 0xef, spi_flash_probe_winbond, },
406 #endif
407 #ifdef CONFIG_SPI_FRAM_RAMTRON
408 	{ 6, 0xc2, spi_fram_probe_ramtron, },
409 # undef IDCODE_CONT_LEN
410 # define IDCODE_CONT_LEN 6
411 #endif
412 	/* Keep it sorted by best detection */
413 #ifdef CONFIG_SPI_FLASH_STMICRO
414 	{ 0, 0xff, spi_flash_probe_stmicro, },
415 #endif
416 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
417 	{ 0, 0xff, spi_fram_probe_ramtron, },
418 #endif
419 };
420 #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
421 
422 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
423 		unsigned int max_hz, unsigned int spi_mode)
424 {
425 	struct spi_slave *spi;
426 	struct spi_flash *flash = NULL;
427 	int ret, i, shift;
428 	u8 idcode[IDCODE_LEN], *idp;
429 
430 	spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
431 	if (!spi) {
432 		printf("SF: Failed to set up slave\n");
433 		return NULL;
434 	}
435 
436 	ret = spi_claim_bus(spi);
437 	if (ret) {
438 		debug("SF: Failed to claim SPI bus: %d\n", ret);
439 		goto err_claim_bus;
440 	}
441 
442 	/* Read the ID codes */
443 	ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
444 	if (ret)
445 		goto err_read_id;
446 
447 #ifdef DEBUG
448 	printf("SF: Got idcodes\n");
449 	print_buffer(0, idcode, 1, sizeof(idcode), 0);
450 #endif
451 
452 	/* count the number of continuation bytes */
453 	for (shift = 0, idp = idcode;
454 	     shift < IDCODE_CONT_LEN && *idp == 0x7f;
455 	     ++shift, ++idp)
456 		continue;
457 
458 	/* search the table for matches in shift and id */
459 	for (i = 0; i < ARRAY_SIZE(flashes); ++i)
460 		if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
461 			/* we have a match, call probe */
462 			flash = flashes[i].probe(spi, idp);
463 			if (flash)
464 				break;
465 		}
466 
467 	if (!flash) {
468 		printf("SF: Unsupported manufacturer %02x\n", *idp);
469 		goto err_manufacturer_probe;
470 	}
471 
472 #ifdef CONFIG_OF_CONTROL
473 	if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
474 		debug("SF: FDT decode error\n");
475 		goto err_manufacturer_probe;
476 	}
477 #endif
478 	printf("SF: Detected %s with page size ", flash->name);
479 	print_size(flash->sector_size, ", total ");
480 	print_size(flash->size, "");
481 	if (flash->memory_map)
482 		printf(", mapped at %p", flash->memory_map);
483 	puts("\n");
484 
485 	spi_release_bus(spi);
486 
487 	return flash;
488 
489 err_manufacturer_probe:
490 err_read_id:
491 	spi_release_bus(spi);
492 err_claim_bus:
493 	spi_free_slave(spi);
494 	return NULL;
495 }
496 
497 void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
498 			 const char *name)
499 {
500 	struct spi_flash *flash;
501 	void *ptr;
502 
503 	ptr = malloc(size);
504 	if (!ptr) {
505 		debug("SF: Failed to allocate memory\n");
506 		return NULL;
507 	}
508 	memset(ptr, '\0', size);
509 	flash = (struct spi_flash *)(ptr + offset);
510 
511 	/* Set up some basic fields - caller will sort out sizes */
512 	flash->spi = spi;
513 	flash->name = name;
514 
515 	flash->read = spi_flash_cmd_read_fast;
516 	flash->write = spi_flash_cmd_write_multi;
517 	flash->erase = spi_flash_cmd_erase;
518 
519 	return flash;
520 }
521 
522 void spi_flash_free(struct spi_flash *flash)
523 {
524 	spi_free_slave(flash->spi);
525 	free(flash);
526 }
527