xref: /rk3399_rockchip-uboot/drivers/mtd/spi/sf_internal.h (revision 898e76c938eb169fd19733d4e4c44ba26c6dbd87)
1*898e76c9SJagannadha Sutradharudu Teki /*
2*898e76c9SJagannadha Sutradharudu Teki  * SPI flash internal definitions
3*898e76c9SJagannadha Sutradharudu Teki  *
4*898e76c9SJagannadha Sutradharudu Teki  * Copyright (C) 2008 Atmel Corporation
5*898e76c9SJagannadha Sutradharudu Teki  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6*898e76c9SJagannadha Sutradharudu Teki  *
7*898e76c9SJagannadha Sutradharudu Teki  * Licensed under the GPL-2 or later.
8*898e76c9SJagannadha Sutradharudu Teki  */
9*898e76c9SJagannadha Sutradharudu Teki 
10*898e76c9SJagannadha Sutradharudu Teki #ifndef _SPI_FLASH_INTERNAL_H_
11*898e76c9SJagannadha Sutradharudu Teki #define _SPI_FLASH_INTERNAL_H_
12*898e76c9SJagannadha Sutradharudu Teki 
13*898e76c9SJagannadha Sutradharudu Teki #define SPI_FLASH_16MB_BOUN		0x1000000
14*898e76c9SJagannadha Sutradharudu Teki 
15*898e76c9SJagannadha Sutradharudu Teki /* SECT flags */
16*898e76c9SJagannadha Sutradharudu Teki #define SECT_4K			(1 << 1)
17*898e76c9SJagannadha Sutradharudu Teki #define SECT_32K			(1 << 2)
18*898e76c9SJagannadha Sutradharudu Teki #define E_FSR				(1 << 3)
19*898e76c9SJagannadha Sutradharudu Teki 
20*898e76c9SJagannadha Sutradharudu Teki /* Erase commands */
21*898e76c9SJagannadha Sutradharudu Teki #define CMD_ERASE_4K			0x20
22*898e76c9SJagannadha Sutradharudu Teki #define CMD_ERASE_32K			0x52
23*898e76c9SJagannadha Sutradharudu Teki #define CMD_ERASE_CHIP			0xc7
24*898e76c9SJagannadha Sutradharudu Teki #define CMD_ERASE_64K			0xd8
25*898e76c9SJagannadha Sutradharudu Teki 
26*898e76c9SJagannadha Sutradharudu Teki /* Write commands */
27*898e76c9SJagannadha Sutradharudu Teki #define CMD_WRITE_STATUS		0x01
28*898e76c9SJagannadha Sutradharudu Teki #define CMD_PAGE_PROGRAM		0x02
29*898e76c9SJagannadha Sutradharudu Teki #define CMD_WRITE_DISABLE		0x04
30*898e76c9SJagannadha Sutradharudu Teki #define CMD_READ_STATUS			0x05
31*898e76c9SJagannadha Sutradharudu Teki #define CMD_WRITE_ENABLE		0x06
32*898e76c9SJagannadha Sutradharudu Teki #define CMD_READ_CONFIG		0x35
33*898e76c9SJagannadha Sutradharudu Teki #define CMD_FLAG_STATUS		0x70
34*898e76c9SJagannadha Sutradharudu Teki 
35*898e76c9SJagannadha Sutradharudu Teki /* Read commands */
36*898e76c9SJagannadha Sutradharudu Teki #define CMD_READ_ARRAY_SLOW		0x03
37*898e76c9SJagannadha Sutradharudu Teki #define CMD_READ_ARRAY_FAST		0x0b
38*898e76c9SJagannadha Sutradharudu Teki #define CMD_READ_ID			0x9f
39*898e76c9SJagannadha Sutradharudu Teki 
40*898e76c9SJagannadha Sutradharudu Teki /* Bank addr access commands */
41*898e76c9SJagannadha Sutradharudu Teki #ifdef CONFIG_SPI_FLASH_BAR
42*898e76c9SJagannadha Sutradharudu Teki # define CMD_BANKADDR_BRWR		0x17
43*898e76c9SJagannadha Sutradharudu Teki # define CMD_BANKADDR_BRRD		0x16
44*898e76c9SJagannadha Sutradharudu Teki # define CMD_EXTNADDR_WREAR		0xC5
45*898e76c9SJagannadha Sutradharudu Teki # define CMD_EXTNADDR_RDEAR		0xC8
46*898e76c9SJagannadha Sutradharudu Teki #endif
47*898e76c9SJagannadha Sutradharudu Teki 
48*898e76c9SJagannadha Sutradharudu Teki /* Common status */
49*898e76c9SJagannadha Sutradharudu Teki #define STATUS_WIP			0x01
50*898e76c9SJagannadha Sutradharudu Teki #define STATUS_PEC			0x80
51*898e76c9SJagannadha Sutradharudu Teki 
52*898e76c9SJagannadha Sutradharudu Teki /* Flash timeout values */
53*898e76c9SJagannadha Sutradharudu Teki #define SPI_FLASH_PROG_TIMEOUT		(2 * CONFIG_SYS_HZ)
54*898e76c9SJagannadha Sutradharudu Teki #define SPI_FLASH_PAGE_ERASE_TIMEOUT	(5 * CONFIG_SYS_HZ)
55*898e76c9SJagannadha Sutradharudu Teki #define SPI_FLASH_SECTOR_ERASE_TIMEOUT	(10 * CONFIG_SYS_HZ)
56*898e76c9SJagannadha Sutradharudu Teki 
57*898e76c9SJagannadha Sutradharudu Teki /* SST specific */
58*898e76c9SJagannadha Sutradharudu Teki #ifdef CONFIG_SPI_FLASH_SST
59*898e76c9SJagannadha Sutradharudu Teki # define SST_WP			0x01	/* Supports AAI word program */
60*898e76c9SJagannadha Sutradharudu Teki # define CMD_SST_BP			0x02    /* Byte Program */
61*898e76c9SJagannadha Sutradharudu Teki # define CMD_SST_AAI_WP		0xAD	/* Auto Address Incr Word Program */
62*898e76c9SJagannadha Sutradharudu Teki 
63*898e76c9SJagannadha Sutradharudu Teki int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
64*898e76c9SJagannadha Sutradharudu Teki 		const void *buf);
65*898e76c9SJagannadha Sutradharudu Teki #endif
66*898e76c9SJagannadha Sutradharudu Teki 
67*898e76c9SJagannadha Sutradharudu Teki /* Send a single-byte command to the device and read the response */
68*898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
69*898e76c9SJagannadha Sutradharudu Teki 
70*898e76c9SJagannadha Sutradharudu Teki /*
71*898e76c9SJagannadha Sutradharudu Teki  * Send a multi-byte command to the device and read the response. Used
72*898e76c9SJagannadha Sutradharudu Teki  * for flash array reads, etc.
73*898e76c9SJagannadha Sutradharudu Teki  */
74*898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
75*898e76c9SJagannadha Sutradharudu Teki 		size_t cmd_len, void *data, size_t data_len);
76*898e76c9SJagannadha Sutradharudu Teki 
77*898e76c9SJagannadha Sutradharudu Teki /*
78*898e76c9SJagannadha Sutradharudu Teki  * Send a multi-byte command to the device followed by (optional)
79*898e76c9SJagannadha Sutradharudu Teki  * data. Used for programming the flash array, etc.
80*898e76c9SJagannadha Sutradharudu Teki  */
81*898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
82*898e76c9SJagannadha Sutradharudu Teki 		const void *data, size_t data_len);
83*898e76c9SJagannadha Sutradharudu Teki 
84*898e76c9SJagannadha Sutradharudu Teki 
85*898e76c9SJagannadha Sutradharudu Teki /* Flash erase(sectors) operation, support all possible erase commands */
86*898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
87*898e76c9SJagannadha Sutradharudu Teki 
88*898e76c9SJagannadha Sutradharudu Teki /* Program the status register */
89*898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
90*898e76c9SJagannadha Sutradharudu Teki 
91*898e76c9SJagannadha Sutradharudu Teki /* Set quad enbale bit */
92*898e76c9SJagannadha Sutradharudu Teki int spi_flash_set_qeb(struct spi_flash *flash);
93*898e76c9SJagannadha Sutradharudu Teki 
94*898e76c9SJagannadha Sutradharudu Teki /* Enable writing on the SPI flash */
95*898e76c9SJagannadha Sutradharudu Teki static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
96*898e76c9SJagannadha Sutradharudu Teki {
97*898e76c9SJagannadha Sutradharudu Teki 	return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
98*898e76c9SJagannadha Sutradharudu Teki }
99*898e76c9SJagannadha Sutradharudu Teki 
100*898e76c9SJagannadha Sutradharudu Teki /* Disable writing on the SPI flash */
101*898e76c9SJagannadha Sutradharudu Teki static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
102*898e76c9SJagannadha Sutradharudu Teki {
103*898e76c9SJagannadha Sutradharudu Teki 	return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
104*898e76c9SJagannadha Sutradharudu Teki }
105*898e76c9SJagannadha Sutradharudu Teki 
106*898e76c9SJagannadha Sutradharudu Teki /*
107*898e76c9SJagannadha Sutradharudu Teki  * Send the read status command to the device and wait for the wip
108*898e76c9SJagannadha Sutradharudu Teki  * (write-in-progress) bit to clear itself.
109*898e76c9SJagannadha Sutradharudu Teki  */
110*898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
111*898e76c9SJagannadha Sutradharudu Teki 
112*898e76c9SJagannadha Sutradharudu Teki /*
113*898e76c9SJagannadha Sutradharudu Teki  * Used for spi_flash write operation
114*898e76c9SJagannadha Sutradharudu Teki  * - SPI claim
115*898e76c9SJagannadha Sutradharudu Teki  * - spi_flash_cmd_write_enable
116*898e76c9SJagannadha Sutradharudu Teki  * - spi_flash_cmd_write
117*898e76c9SJagannadha Sutradharudu Teki  * - spi_flash_cmd_wait_ready
118*898e76c9SJagannadha Sutradharudu Teki  * - SPI release
119*898e76c9SJagannadha Sutradharudu Teki  */
120*898e76c9SJagannadha Sutradharudu Teki int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
121*898e76c9SJagannadha Sutradharudu Teki 		size_t cmd_len, const void *buf, size_t buf_len);
122*898e76c9SJagannadha Sutradharudu Teki 
123*898e76c9SJagannadha Sutradharudu Teki /*
124*898e76c9SJagannadha Sutradharudu Teki  * Flash write operation, support all possible write commands.
125*898e76c9SJagannadha Sutradharudu Teki  * Write the requested data out breaking it up into multiple write
126*898e76c9SJagannadha Sutradharudu Teki  * commands as needed per the write size.
127*898e76c9SJagannadha Sutradharudu Teki  */
128*898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
129*898e76c9SJagannadha Sutradharudu Teki 		size_t len, const void *buf);
130*898e76c9SJagannadha Sutradharudu Teki 
131*898e76c9SJagannadha Sutradharudu Teki /*
132*898e76c9SJagannadha Sutradharudu Teki  * Same as spi_flash_cmd_read() except it also claims/releases the SPI
133*898e76c9SJagannadha Sutradharudu Teki  * bus. Used as common part of the ->read() operation.
134*898e76c9SJagannadha Sutradharudu Teki  */
135*898e76c9SJagannadha Sutradharudu Teki int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
136*898e76c9SJagannadha Sutradharudu Teki 		size_t cmd_len, void *data, size_t data_len);
137*898e76c9SJagannadha Sutradharudu Teki 
138*898e76c9SJagannadha Sutradharudu Teki /* Flash read operation, support all possible read commands */
139*898e76c9SJagannadha Sutradharudu Teki int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
140*898e76c9SJagannadha Sutradharudu Teki 		size_t len, void *data);
141*898e76c9SJagannadha Sutradharudu Teki 
142*898e76c9SJagannadha Sutradharudu Teki #endif /* _SPI_FLASH_INTERNAL_H_ */
143