1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2018 Macronix 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8 #ifndef __UBOOT__ 9 #include <linux/device.h> 10 #include <linux/kernel.h> 11 #endif 12 #include <linux/mtd/spinand.h> 13 14 #define SPINAND_MFR_MACRONIX 0xC2 15 16 static SPINAND_OP_VARIANTS(read_cache_variants, 17 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), 18 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), 19 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), 20 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); 21 22 static SPINAND_OP_VARIANTS(write_cache_variants, 23 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), 24 SPINAND_PROG_LOAD(true, 0, NULL, 0)); 25 26 static SPINAND_OP_VARIANTS(update_cache_variants, 27 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), 28 SPINAND_PROG_LOAD(false, 0, NULL, 0)); 29 30 static int mx35lfxge4ab_ooblayout_ecc(struct mtd_info *mtd, int section, 31 struct mtd_oob_region *region) 32 { 33 return -ERANGE; 34 } 35 36 static int mx35lfxge4ab_ooblayout_free(struct mtd_info *mtd, int section, 37 struct mtd_oob_region *region) 38 { 39 if (section) 40 return -ERANGE; 41 42 region->offset = 2; 43 region->length = mtd->oobsize - 2; 44 45 return 0; 46 } 47 48 static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = { 49 .ecc = mx35lfxge4ab_ooblayout_ecc, 50 .rfree = mx35lfxge4ab_ooblayout_free, 51 }; 52 53 static int mx35ufxge4ac_ooblayout_free(struct mtd_info *mtd, int section, 54 struct mtd_oob_region *region) 55 { 56 if (section > 3) 57 return -ERANGE; 58 59 region->offset = (16 * section) + 2; 60 region->length = 14; 61 62 return 0; 63 } 64 65 static const struct mtd_ooblayout_ops mx35ufxge4ac_ooblayout = { 66 .ecc = mx35lfxge4ab_ooblayout_ecc, 67 .rfree = mx35ufxge4ac_ooblayout_free, 68 }; 69 70 static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr) 71 { 72 struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x7c, 1), 73 SPI_MEM_OP_NO_ADDR, 74 SPI_MEM_OP_DUMMY(1, 1), 75 SPI_MEM_OP_DATA_IN(1, eccsr, 1)); 76 77 return spi_mem_exec_op(spinand->slave, &op); 78 } 79 80 static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand, 81 u8 status) 82 { 83 struct nand_device *nand = spinand_to_nand(spinand); 84 u8 eccsr; 85 86 switch (status & STATUS_ECC_MASK) { 87 case STATUS_ECC_NO_BITFLIPS: 88 return 0; 89 90 case STATUS_ECC_UNCOR_ERROR: 91 return -EBADMSG; 92 93 case STATUS_ECC_HAS_BITFLIPS: 94 /* 95 * Let's try to retrieve the real maximum number of bitflips 96 * in order to avoid forcing the wear-leveling layer to move 97 * data around if it's not necessary. 98 */ 99 if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr)) 100 return nand->eccreq.strength; 101 102 if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr)) 103 return nand->eccreq.strength; 104 105 return eccsr; 106 107 default: 108 break; 109 } 110 111 return -EINVAL; 112 } 113 114 static const struct spinand_info macronix_spinand_table[] = { 115 SPINAND_INFO("MX35LF1GE4AB", 0x12, 116 NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1), 117 NAND_ECCREQ(4, 512), 118 SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 119 &write_cache_variants, 120 &update_cache_variants), 121 SPINAND_HAS_QE_BIT, 122 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, 123 mx35lf1ge4ab_ecc_get_status)), 124 SPINAND_INFO("MX35LF2GE4AB", 0x22, 125 NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1), 126 NAND_ECCREQ(4, 512), 127 SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 128 &write_cache_variants, 129 &update_cache_variants), 130 SPINAND_HAS_QE_BIT, 131 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)), 132 SPINAND_INFO("MX35LF2GE4AD", 0x26, 133 NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1), 134 NAND_ECCREQ(8, 512), 135 SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 136 &write_cache_variants, 137 &update_cache_variants), 138 SPINAND_HAS_QE_BIT, 139 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, 140 mx35lf1ge4ab_ecc_get_status)), 141 SPINAND_INFO("MX35LF4GE4AD", 0x37, 142 NAND_MEMORG(1, 4096, 128, 64, 2048, 2, 1, 1), 143 NAND_ECCREQ(8, 512), 144 SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 145 &write_cache_variants, 146 &update_cache_variants), 147 SPINAND_HAS_QE_BIT, 148 SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, 149 mx35lf1ge4ab_ecc_get_status)), 150 SPINAND_INFO("MX35UF1GE4AC", 0x92, 151 NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1), 152 NAND_ECCREQ(4, 512), 153 SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 154 &write_cache_variants, 155 &update_cache_variants), 156 SPINAND_HAS_QE_BIT, 157 SPINAND_ECCINFO(&mx35ufxge4ac_ooblayout, 158 mx35lf1ge4ab_ecc_get_status)), 159 SPINAND_INFO("MX35UF2GE4AC", 0xA2, 160 NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1), 161 NAND_ECCREQ(4, 512), 162 SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 163 &write_cache_variants, 164 &update_cache_variants), 165 SPINAND_HAS_QE_BIT, 166 SPINAND_ECCINFO(&mx35ufxge4ac_ooblayout, 167 mx35lf1ge4ab_ecc_get_status)), 168 }; 169 170 static int macronix_spinand_detect(struct spinand_device *spinand) 171 { 172 u8 *id = spinand->id.data; 173 int ret; 174 175 /* 176 * Macronix SPI NAND read ID needs a dummy byte, so the first byte in 177 * raw_id is garbage. 178 */ 179 if (id[1] != SPINAND_MFR_MACRONIX) 180 return 0; 181 182 ret = spinand_match_and_init(spinand, macronix_spinand_table, 183 ARRAY_SIZE(macronix_spinand_table), 184 id[2]); 185 if (ret) 186 return ret; 187 188 return 1; 189 } 190 191 static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = { 192 .detect = macronix_spinand_detect, 193 }; 194 195 const struct spinand_manufacturer macronix_spinand_manufacturer = { 196 .id = SPINAND_MFR_MACRONIX, 197 .name = "Macronix", 198 .ops = ¯onix_spinand_manuf_ops, 199 }; 200