xref: /rk3399_rockchip-uboot/drivers/i2c/rk_i2c.c (revision daae0a01d6548c381f7126747a8ef273189b547e)
1 /*
2  * (C) Copyright 2015 Google, Inc
3  *
4  * (C) Copyright 2008-2014 Rockchip Electronics
5  * Peter, Software Engineering, <superpeter.cai@gmail.com>.
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 
10 #include <common.h>
11 #include <clk.h>
12 #include <dm.h>
13 #include <errno.h>
14 #include <i2c.h>
15 #include <asm/io.h>
16 #include <asm/arch/clock.h>
17 #include <asm/arch/i2c.h>
18 #include <asm/arch/periph.h>
19 #include <dm/pinctrl.h>
20 #include <linux/sizes.h>
21 
22 DECLARE_GLOBAL_DATA_PTR;
23 
24 /* i2c timerout */
25 #define I2C_TIMEOUT_MS		100
26 #define I2C_RETRY_COUNT		3
27 
28 /* rk i2c fifo max transfer bytes */
29 #define RK_I2C_FIFO_SIZE	32
30 
31 struct rk_i2c {
32 	struct clk clk;
33 	struct i2c_regs *regs;
34 	unsigned int speed;
35 };
36 
37 static inline void rk_i2c_get_div(int div, int *divh, int *divl)
38 {
39 	*divl = div / 2;
40 	if (div % 2 == 0)
41 		*divh = div / 2;
42 	else
43 		*divh = DIV_ROUND_UP(div, 2);
44 }
45 
46 /*
47  * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
48  * SCL = PCLK / SCLK Divisor
49  * i2c_rate = PCLK
50  */
51 static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
52 {
53 	uint32_t i2c_rate;
54 	int div, divl, divh;
55 
56 	/* First get i2c rate from pclk */
57 	i2c_rate = clk_get_rate(&i2c->clk);
58 
59 	div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
60 	divh = 0;
61 	divl = 0;
62 	if (div >= 0)
63 		rk_i2c_get_div(div, &divh, &divl);
64 	writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);
65 
66 	debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
67 	      scl_rate);
68 	debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
69 	debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
70 }
71 
72 static void rk_i2c_show_regs(struct i2c_regs *regs)
73 {
74 #ifdef DEBUG
75 	uint i;
76 
77 	debug("i2c_con: 0x%08x\n", readl(&regs->con));
78 	debug("i2c_clkdiv: 0x%08x\n", readl(&regs->clkdiv));
79 	debug("i2c_mrxaddr: 0x%08x\n", readl(&regs->mrxaddr));
80 	debug("i2c_mrxraddR: 0x%08x\n", readl(&regs->mrxraddr));
81 	debug("i2c_mtxcnt: 0x%08x\n", readl(&regs->mtxcnt));
82 	debug("i2c_mrxcnt: 0x%08x\n", readl(&regs->mrxcnt));
83 	debug("i2c_ien: 0x%08x\n", readl(&regs->ien));
84 	debug("i2c_ipd: 0x%08x\n", readl(&regs->ipd));
85 	debug("i2c_fcnt: 0x%08x\n", readl(&regs->fcnt));
86 	for (i = 0; i < 8; i++)
87 		debug("i2c_txdata%d: 0x%08x\n", i, readl(&regs->txdata[i]));
88 	for (i = 0; i < 8; i++)
89 		debug("i2c_rxdata%d: 0x%08x\n", i, readl(&regs->rxdata[i]));
90 #endif
91 }
92 
93 static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
94 {
95 	struct i2c_regs *regs = i2c->regs;
96 	ulong start;
97 
98 	debug("I2c Send Start bit.\n");
99 	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
100 
101 	writel(I2C_CON_EN | I2C_CON_START, &regs->con);
102 	writel(I2C_STARTIEN, &regs->ien);
103 
104 	start = get_timer(0);
105 	while (1) {
106 		if (readl(&regs->ipd) & I2C_STARTIPD) {
107 			writel(I2C_STARTIPD, &regs->ipd);
108 			break;
109 		}
110 		if (get_timer(start) > I2C_TIMEOUT_MS) {
111 			debug("I2C Send Start Bit Timeout\n");
112 			rk_i2c_show_regs(regs);
113 			return -ETIMEDOUT;
114 		}
115 		udelay(1);
116 	}
117 
118 	return 0;
119 }
120 
121 static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
122 {
123 	struct i2c_regs *regs = i2c->regs;
124 	ulong start;
125 
126 	debug("I2c Send Stop bit.\n");
127 	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
128 
129 	writel(I2C_CON_EN | I2C_CON_STOP, &regs->con);
130 	writel(I2C_CON_STOP, &regs->ien);
131 
132 	start = get_timer(0);
133 	while (1) {
134 		if (readl(&regs->ipd) & I2C_STOPIPD) {
135 			writel(I2C_STOPIPD, &regs->ipd);
136 			break;
137 		}
138 		if (get_timer(start) > I2C_TIMEOUT_MS) {
139 			debug("I2C Send Start Bit Timeout\n");
140 			rk_i2c_show_regs(regs);
141 			return -ETIMEDOUT;
142 		}
143 		udelay(1);
144 	}
145 
146 	return 0;
147 }
148 
149 static inline void rk_i2c_disable(struct rk_i2c *i2c)
150 {
151 	writel(0, &i2c->regs->con);
152 }
153 
154 static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
155 		       uchar *buf, uint b_len)
156 {
157 	struct i2c_regs *regs = i2c->regs;
158 	uchar *pbuf = buf;
159 	uint bytes_remain_len = b_len;
160 	uint bytes_xferred = 0;
161 	uint words_xferred = 0;
162 	ulong start;
163 	uint con = 0;
164 	uint rxdata;
165 	uint i, j;
166 	int err;
167 	bool snd_chunk = false;
168 
169 	debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
170 	      chip, reg, r_len, b_len);
171 
172 	err = rk_i2c_send_start_bit(i2c);
173 	if (err)
174 		return err;
175 
176 	writel(I2C_MRXADDR_SET(1, chip << 1 | 1), &regs->mrxaddr);
177 	if (r_len == 0) {
178 		writel(0, &regs->mrxraddr);
179 	} else if (r_len < 4) {
180 		writel(I2C_MRXRADDR_SET(r_len, reg), &regs->mrxraddr);
181 	} else {
182 		debug("I2C Read: addr len %d not supported\n", r_len);
183 		return -EIO;
184 	}
185 
186 	while (bytes_remain_len) {
187 		if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
188 			con = I2C_CON_EN;
189 			bytes_xferred = 32;
190 		} else {
191 			/*
192 			 * The hw can read up to 32 bytes at a time. If we need
193 			 * more than one chunk, send an ACK after the last byte.
194 			 */
195 			con = I2C_CON_EN | I2C_CON_LASTACK;
196 			bytes_xferred = bytes_remain_len;
197 		}
198 		words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
199 
200 		/*
201 		 * make sure we are in plain RX mode if we read a second chunk
202 		 */
203 		if (snd_chunk)
204 			con |= I2C_CON_MOD(I2C_MODE_RX);
205 		else
206 			con |= I2C_CON_MOD(I2C_MODE_TRX);
207 
208 		writel(con, &regs->con);
209 		writel(bytes_xferred, &regs->mrxcnt);
210 		writel(I2C_MBRFIEN | I2C_NAKRCVIEN, &regs->ien);
211 
212 		start = get_timer(0);
213 		while (1) {
214 			if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
215 				writel(I2C_NAKRCVIPD, &regs->ipd);
216 				err = -EREMOTEIO;
217 			}
218 			if (readl(&regs->ipd) & I2C_MBRFIPD) {
219 				writel(I2C_MBRFIPD, &regs->ipd);
220 				break;
221 			}
222 			if (get_timer(start) > I2C_TIMEOUT_MS) {
223 				debug("I2C Read Data Timeout\n");
224 				err =  -ETIMEDOUT;
225 				rk_i2c_show_regs(regs);
226 				goto i2c_exit;
227 			}
228 			udelay(1);
229 		}
230 
231 		for (i = 0; i < words_xferred; i++) {
232 			rxdata = readl(&regs->rxdata[i]);
233 			debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
234 			for (j = 0; j < 4; j++) {
235 				if ((i * 4 + j) == bytes_xferred)
236 					break;
237 				*pbuf++ = (rxdata >> (j * 8)) & 0xff;
238 			}
239 		}
240 
241 		bytes_remain_len -= bytes_xferred;
242 		snd_chunk = true;
243 		debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
244 	}
245 
246 i2c_exit:
247 	rk_i2c_disable(i2c);
248 
249 	return err;
250 }
251 
252 static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
253 			uchar *buf, uint b_len)
254 {
255 	struct i2c_regs *regs = i2c->regs;
256 	int err;
257 	uchar *pbuf = buf;
258 	uint bytes_remain_len = b_len + r_len + 1;
259 	uint bytes_xferred = 0;
260 	uint words_xferred = 0;
261 	ulong start;
262 	uint txdata;
263 	uint i, j;
264 
265 	debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
266 	      chip, reg, r_len, b_len);
267 	err = rk_i2c_send_start_bit(i2c);
268 	if (err)
269 		return err;
270 
271 	while (bytes_remain_len) {
272 		if (bytes_remain_len > RK_I2C_FIFO_SIZE)
273 			bytes_xferred = RK_I2C_FIFO_SIZE;
274 		else
275 			bytes_xferred = bytes_remain_len;
276 		words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
277 
278 		for (i = 0; i < words_xferred; i++) {
279 			txdata = 0;
280 			for (j = 0; j < 4; j++) {
281 				if ((i * 4 + j) == bytes_xferred)
282 					break;
283 
284 				if (i == 0 && j == 0 && pbuf == buf) {
285 					txdata |= (chip << 1);
286 				} else if (i == 0 && j <= r_len && pbuf == buf) {
287 					txdata |= (reg &
288 						(0xff << ((j - 1) * 8))) << 8;
289 				} else {
290 					txdata |= (*pbuf++)<<(j * 8);
291 				}
292 			}
293 			writel(txdata, &regs->txdata[i]);
294 			debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
295 		}
296 
297 		writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), &regs->con);
298 		writel(bytes_xferred, &regs->mtxcnt);
299 		writel(I2C_MBTFIEN | I2C_NAKRCVIEN, &regs->ien);
300 
301 		start = get_timer(0);
302 		while (1) {
303 			if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
304 				writel(I2C_NAKRCVIPD, &regs->ipd);
305 				err = -EREMOTEIO;
306 			}
307 			if (readl(&regs->ipd) & I2C_MBTFIPD) {
308 				writel(I2C_MBTFIPD, &regs->ipd);
309 				break;
310 			}
311 			if (get_timer(start) > I2C_TIMEOUT_MS) {
312 				debug("I2C Write Data Timeout\n");
313 				err =  -ETIMEDOUT;
314 				rk_i2c_show_regs(regs);
315 				goto i2c_exit;
316 			}
317 			udelay(1);
318 		}
319 
320 		bytes_remain_len -= bytes_xferred;
321 		debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
322 	}
323 
324 i2c_exit:
325 	rk_i2c_disable(i2c);
326 
327 	return err;
328 }
329 
330 static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
331 			     int nmsgs)
332 {
333 	struct rk_i2c *i2c = dev_get_priv(bus);
334 	int ret;
335 
336 	debug("i2c_xfer: %d messages\n", nmsgs);
337 	for (; nmsgs > 0; nmsgs--, msg++) {
338 		debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
339 		if (msg->flags & I2C_M_RD) {
340 			ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
341 					  msg->len);
342 		} else {
343 			ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
344 					   msg->len);
345 		}
346 		if (ret) {
347 			debug("i2c_write: error sending\n");
348 			return -EREMOTEIO;
349 		}
350 	}
351 
352 	rk_i2c_send_stop_bit(i2c);
353 	rk_i2c_disable(i2c);
354 
355 	return 0;
356 }
357 
358 int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
359 {
360 	struct rk_i2c *i2c = dev_get_priv(bus);
361 
362 	rk_i2c_set_clk(i2c, speed);
363 
364 	return 0;
365 }
366 
367 static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
368 {
369 	struct rk_i2c *priv = dev_get_priv(bus);
370 	int ret;
371 
372 	ret = clk_get_by_index(bus, 0, &priv->clk);
373 	if (ret < 0) {
374 		debug("%s: Could not get clock for %s: %d\n", __func__,
375 		      bus->name, ret);
376 		return ret;
377 	}
378 
379 	return 0;
380 }
381 
382 static int rockchip_i2c_probe(struct udevice *bus)
383 {
384 	struct rk_i2c *priv = dev_get_priv(bus);
385 
386 	priv->regs = dev_read_addr_ptr(bus);
387 
388 	return 0;
389 }
390 
391 static const struct dm_i2c_ops rockchip_i2c_ops = {
392 	.xfer		= rockchip_i2c_xfer,
393 	.set_bus_speed	= rockchip_i2c_set_bus_speed,
394 };
395 
396 static const struct udevice_id rockchip_i2c_ids[] = {
397 	{ .compatible = "rockchip,rk3066-i2c" },
398 	{ .compatible = "rockchip,rk3188-i2c" },
399 	{ .compatible = "rockchip,rk3288-i2c" },
400 	{ .compatible = "rockchip,rk3328-i2c" },
401 	{ .compatible = "rockchip,rk3399-i2c" },
402 	{ .compatible = "rockchip,rk3228-i2c" },
403 	{ .compatible = "rockchip,rv1108-i2c" },
404 	{ }
405 };
406 
407 U_BOOT_DRIVER(i2c_rockchip) = {
408 	.name	= "i2c_rockchip",
409 	.id	= UCLASS_I2C,
410 	.of_match = rockchip_i2c_ids,
411 	.ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
412 	.probe	= rockchip_i2c_probe,
413 	.priv_auto_alloc_size = sizeof(struct rk_i2c),
414 	.ops	= &rockchip_i2c_ops,
415 };
416