xref: /rk3399_rockchip-uboot/drivers/i2c/rk_i2c.c (revision c7de5349c9abcd4e28cc34f9eb02efdc19b877b3)
1 /*
2  * (C) Copyright 2015 Google, Inc
3  *
4  * (C) Copyright 2008-2014 Rockchip Electronics
5  * Peter, Software Engineering, <superpeter.cai@gmail.com>.
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 
10 #include <common.h>
11 #include <clk.h>
12 #include <dm.h>
13 #include <errno.h>
14 #include <i2c.h>
15 #include <asm/io.h>
16 #include <asm/arch/clock.h>
17 #include <asm/arch/i2c.h>
18 #include <asm/arch/periph.h>
19 #include <dm/pinctrl.h>
20 #include <linux/sizes.h>
21 
22 DECLARE_GLOBAL_DATA_PTR;
23 
24 /* i2c timerout */
25 #define I2C_TIMEOUT_MS		100
26 #define I2C_RETRY_COUNT		3
27 
28 /* rk i2c fifo max transfer bytes */
29 #define RK_I2C_FIFO_SIZE	32
30 
31 struct rk_i2c {
32 	struct clk clk;
33 	struct i2c_regs *regs;
34 	unsigned int speed;
35 };
36 
37 static inline void rk_i2c_get_div(int div, int *divh, int *divl)
38 {
39 	*divl = div / 2;
40 	if (div % 2 == 0)
41 		*divh = div / 2;
42 	else
43 		*divh = DIV_ROUND_UP(div, 2);
44 }
45 
46 /*
47  * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
48  * SCL = PCLK / SCLK Divisor
49  * i2c_rate = PCLK
50  */
51 static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
52 {
53 	uint32_t i2c_rate;
54 	int div, divl, divh;
55 
56 	/* First get i2c rate from pclk */
57 	i2c_rate = clk_get_rate(&i2c->clk);
58 
59 	div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
60 	divh = 0;
61 	divl = 0;
62 	if (div >= 0)
63 		rk_i2c_get_div(div, &divh, &divl);
64 	writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);
65 
66 	debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
67 	      scl_rate);
68 	debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
69 	debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
70 }
71 
72 static void rk_i2c_show_regs(struct i2c_regs *regs)
73 {
74 #ifdef DEBUG
75 	uint i;
76 
77 	debug("i2c_con: 0x%08x\n", readl(&regs->con));
78 	debug("i2c_clkdiv: 0x%08x\n", readl(&regs->clkdiv));
79 	debug("i2c_mrxaddr: 0x%08x\n", readl(&regs->mrxaddr));
80 	debug("i2c_mrxraddR: 0x%08x\n", readl(&regs->mrxraddr));
81 	debug("i2c_mtxcnt: 0x%08x\n", readl(&regs->mtxcnt));
82 	debug("i2c_mrxcnt: 0x%08x\n", readl(&regs->mrxcnt));
83 	debug("i2c_ien: 0x%08x\n", readl(&regs->ien));
84 	debug("i2c_ipd: 0x%08x\n", readl(&regs->ipd));
85 	debug("i2c_fcnt: 0x%08x\n", readl(&regs->fcnt));
86 	for (i = 0; i < 8; i++)
87 		debug("i2c_txdata%d: 0x%08x\n", i, readl(&regs->txdata[i]));
88 	for (i = 0; i < 8; i++)
89 		debug("i2c_rxdata%d: 0x%08x\n", i, readl(&regs->rxdata[i]));
90 #endif
91 }
92 
93 static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
94 {
95 	struct i2c_regs *regs = i2c->regs;
96 	ulong start;
97 
98 	debug("I2c Send Start bit.\n");
99 	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
100 
101 	writel(I2C_CON_EN | I2C_CON_START, &regs->con);
102 	writel(I2C_STARTIEN, &regs->ien);
103 
104 	start = get_timer(0);
105 	while (1) {
106 		if (readl(&regs->ipd) & I2C_STARTIPD) {
107 			writel(I2C_STARTIPD, &regs->ipd);
108 			break;
109 		}
110 		if (get_timer(start) > I2C_TIMEOUT_MS) {
111 			debug("I2C Send Start Bit Timeout\n");
112 			rk_i2c_show_regs(regs);
113 			return -ETIMEDOUT;
114 		}
115 		udelay(1);
116 	}
117 
118 	return 0;
119 }
120 
121 static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
122 {
123 	struct i2c_regs *regs = i2c->regs;
124 	ulong start;
125 
126 	debug("I2c Send Stop bit.\n");
127 	writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
128 
129 	writel(I2C_CON_EN | I2C_CON_STOP, &regs->con);
130 	writel(I2C_CON_STOP, &regs->ien);
131 
132 	start = get_timer(0);
133 	while (1) {
134 		if (readl(&regs->ipd) & I2C_STOPIPD) {
135 			writel(I2C_STOPIPD, &regs->ipd);
136 			break;
137 		}
138 		if (get_timer(start) > I2C_TIMEOUT_MS) {
139 			debug("I2C Send Start Bit Timeout\n");
140 			rk_i2c_show_regs(regs);
141 			return -ETIMEDOUT;
142 		}
143 		udelay(1);
144 	}
145 
146 	return 0;
147 }
148 
149 static inline void rk_i2c_disable(struct rk_i2c *i2c)
150 {
151 	writel(0, &i2c->regs->ien);
152 	writel(I2C_IPD_ALL_CLEAN, &i2c->regs->ipd);
153 	writel(0, &i2c->regs->con);
154 }
155 
156 static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
157 		       uchar *buf, uint b_len)
158 {
159 	struct i2c_regs *regs = i2c->regs;
160 	uchar *pbuf = buf;
161 	uint bytes_remain_len = b_len;
162 	uint bytes_xferred = 0;
163 	uint words_xferred = 0;
164 	ulong start;
165 	uint con = 0;
166 	uint rxdata;
167 	uint i, j;
168 	int err;
169 	bool snd_chunk = false;
170 
171 	debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
172 	      chip, reg, r_len, b_len);
173 
174 	err = rk_i2c_send_start_bit(i2c);
175 	if (err)
176 		return err;
177 
178 	writel(I2C_MRXADDR_SET(1, chip << 1 | 1), &regs->mrxaddr);
179 	if (r_len == 0) {
180 		writel(0, &regs->mrxraddr);
181 	} else if (r_len < 4) {
182 		writel(I2C_MRXRADDR_SET(r_len, reg), &regs->mrxraddr);
183 	} else {
184 		debug("I2C Read: addr len %d not supported\n", r_len);
185 		return -EIO;
186 	}
187 
188 	while (bytes_remain_len) {
189 		if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
190 			con = I2C_CON_EN;
191 			bytes_xferred = 32;
192 		} else {
193 			/*
194 			 * The hw can read up to 32 bytes at a time. If we need
195 			 * more than one chunk, send an ACK after the last byte.
196 			 */
197 			con = I2C_CON_EN | I2C_CON_LASTACK;
198 			bytes_xferred = bytes_remain_len;
199 		}
200 		words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
201 
202 		/*
203 		 * make sure we are in plain RX mode if we read a second chunk
204 		 */
205 		if (snd_chunk)
206 			con |= I2C_CON_MOD(I2C_MODE_RX);
207 		else
208 			con |= I2C_CON_MOD(I2C_MODE_TRX);
209 
210 		writel(con, &regs->con);
211 		writel(bytes_xferred, &regs->mrxcnt);
212 		writel(I2C_MBRFIEN | I2C_NAKRCVIEN, &regs->ien);
213 
214 		start = get_timer(0);
215 		while (1) {
216 			if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
217 				writel(I2C_NAKRCVIPD, &regs->ipd);
218 				err = -EREMOTEIO;
219 			}
220 			if (readl(&regs->ipd) & I2C_MBRFIPD) {
221 				writel(I2C_MBRFIPD, &regs->ipd);
222 				break;
223 			}
224 			if (get_timer(start) > I2C_TIMEOUT_MS) {
225 				debug("I2C Read Data Timeout\n");
226 				err =  -ETIMEDOUT;
227 				rk_i2c_show_regs(regs);
228 				goto i2c_exit;
229 			}
230 			udelay(1);
231 		}
232 
233 		for (i = 0; i < words_xferred; i++) {
234 			rxdata = readl(&regs->rxdata[i]);
235 			debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
236 			for (j = 0; j < 4; j++) {
237 				if ((i * 4 + j) == bytes_xferred)
238 					break;
239 				*pbuf++ = (rxdata >> (j * 8)) & 0xff;
240 			}
241 		}
242 
243 		bytes_remain_len -= bytes_xferred;
244 		snd_chunk = true;
245 		debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
246 	}
247 
248 i2c_exit:
249 	rk_i2c_disable(i2c);
250 
251 	return err;
252 }
253 
254 static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
255 			uchar *buf, uint b_len)
256 {
257 	struct i2c_regs *regs = i2c->regs;
258 	int err;
259 	uchar *pbuf = buf;
260 	uint bytes_remain_len = b_len + r_len + 1;
261 	uint bytes_xferred = 0;
262 	uint words_xferred = 0;
263 	ulong start;
264 	uint txdata;
265 	uint i, j;
266 
267 	debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
268 	      chip, reg, r_len, b_len);
269 	err = rk_i2c_send_start_bit(i2c);
270 	if (err)
271 		return err;
272 
273 	while (bytes_remain_len) {
274 		if (bytes_remain_len > RK_I2C_FIFO_SIZE)
275 			bytes_xferred = RK_I2C_FIFO_SIZE;
276 		else
277 			bytes_xferred = bytes_remain_len;
278 		words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
279 
280 		for (i = 0; i < words_xferred; i++) {
281 			txdata = 0;
282 			for (j = 0; j < 4; j++) {
283 				if ((i * 4 + j) == bytes_xferred)
284 					break;
285 
286 				if (i == 0 && j == 0 && pbuf == buf) {
287 					txdata |= (chip << 1);
288 				} else if (i == 0 && j <= r_len && pbuf == buf) {
289 					txdata |= (reg &
290 						(0xff << ((j - 1) * 8))) << 8;
291 				} else {
292 					txdata |= (*pbuf++)<<(j * 8);
293 				}
294 			}
295 			writel(txdata, &regs->txdata[i]);
296 			debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
297 		}
298 
299 		writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), &regs->con);
300 		writel(bytes_xferred, &regs->mtxcnt);
301 		writel(I2C_MBTFIEN | I2C_NAKRCVIEN, &regs->ien);
302 
303 		start = get_timer(0);
304 		while (1) {
305 			if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
306 				writel(I2C_NAKRCVIPD, &regs->ipd);
307 				err = -EREMOTEIO;
308 			}
309 			if (readl(&regs->ipd) & I2C_MBTFIPD) {
310 				writel(I2C_MBTFIPD, &regs->ipd);
311 				break;
312 			}
313 			if (get_timer(start) > I2C_TIMEOUT_MS) {
314 				debug("I2C Write Data Timeout\n");
315 				err =  -ETIMEDOUT;
316 				rk_i2c_show_regs(regs);
317 				goto i2c_exit;
318 			}
319 			udelay(1);
320 		}
321 
322 		bytes_remain_len -= bytes_xferred;
323 		debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
324 	}
325 
326 i2c_exit:
327 	rk_i2c_disable(i2c);
328 
329 	return err;
330 }
331 
332 static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
333 			     int nmsgs)
334 {
335 	struct rk_i2c *i2c = dev_get_priv(bus);
336 	int ret;
337 
338 	debug("i2c_xfer: %d messages\n", nmsgs);
339 	for (; nmsgs > 0; nmsgs--, msg++) {
340 		debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
341 		if (msg->flags & I2C_M_RD) {
342 			ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
343 					  msg->len);
344 		} else {
345 			ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
346 					   msg->len);
347 		}
348 		if (ret) {
349 			debug("i2c_write: error sending\n");
350 			return -EREMOTEIO;
351 		}
352 	}
353 
354 	rk_i2c_send_stop_bit(i2c);
355 	rk_i2c_disable(i2c);
356 
357 	return 0;
358 }
359 
360 int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
361 {
362 	struct rk_i2c *i2c = dev_get_priv(bus);
363 
364 	rk_i2c_set_clk(i2c, speed);
365 
366 	return 0;
367 }
368 
369 static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
370 {
371 	struct rk_i2c *priv = dev_get_priv(bus);
372 	int ret;
373 
374 	ret = clk_get_by_index(bus, 0, &priv->clk);
375 	if (ret < 0) {
376 		debug("%s: Could not get clock for %s: %d\n", __func__,
377 		      bus->name, ret);
378 		return ret;
379 	}
380 
381 	return 0;
382 }
383 
384 static int rockchip_i2c_probe(struct udevice *bus)
385 {
386 	struct rk_i2c *priv = dev_get_priv(bus);
387 
388 	priv->regs = dev_read_addr_ptr(bus);
389 
390 	return 0;
391 }
392 
393 static const struct dm_i2c_ops rockchip_i2c_ops = {
394 	.xfer		= rockchip_i2c_xfer,
395 	.set_bus_speed	= rockchip_i2c_set_bus_speed,
396 };
397 
398 static const struct udevice_id rockchip_i2c_ids[] = {
399 	{ .compatible = "rockchip,rk3066-i2c" },
400 	{ .compatible = "rockchip,rk3188-i2c" },
401 	{ .compatible = "rockchip,rk3288-i2c" },
402 	{ .compatible = "rockchip,rk3328-i2c" },
403 	{ .compatible = "rockchip,rk3399-i2c" },
404 	{ .compatible = "rockchip,rk3228-i2c" },
405 	{ .compatible = "rockchip,rv1108-i2c" },
406 	{ }
407 };
408 
409 U_BOOT_DRIVER(i2c_rockchip) = {
410 	.name	= "i2c_rockchip",
411 	.id	= UCLASS_I2C,
412 	.of_match = rockchip_i2c_ids,
413 	.ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
414 	.probe	= rockchip_i2c_probe,
415 	.priv_auto_alloc_size = sizeof(struct rk_i2c),
416 	.ops	= &rockchip_i2c_ops,
417 };
418