1 /* 2 * (C) Copyright 2010 3 * Texas Instruments, <www.ti.com> 4 * 5 * Aneesh V <aneesh@ti.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <dm.h> 12 #include <spl.h> 13 #include <asm/sections.h> 14 #include <asm/u-boot.h> 15 #include <nand.h> 16 #include <fat.h> 17 #include <version.h> 18 #include <image.h> 19 #include <malloc.h> 20 #include <dm/root.h> 21 #include <linux/compiler.h> 22 #include <fdt_support.h> 23 24 DECLARE_GLOBAL_DATA_PTR; 25 26 #ifndef CONFIG_SYS_UBOOT_START 27 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 28 #endif 29 #ifndef CONFIG_SYS_MONITOR_LEN 30 /* Unknown U-Boot size, let's assume it will not be more than 200 KB */ 31 #define CONFIG_SYS_MONITOR_LEN (200 * 1024) 32 #endif 33 34 u32 *boot_params_ptr = NULL; 35 36 /* Define board data structure */ 37 static bd_t bdata __attribute__ ((section(".data"))); 38 39 /* 40 * Board-specific Platform code can reimplement show_boot_progress () if needed 41 */ 42 __weak void show_boot_progress(int val) {} 43 44 /* 45 * Default function to determine if u-boot or the OS should 46 * be started. This implementation always returns 1. 47 * 48 * Please implement your own board specific funcion to do this. 49 * 50 * RETURN 51 * 0 to not start u-boot 52 * positive if u-boot should start 53 */ 54 #ifdef CONFIG_SPL_OS_BOOT 55 __weak int spl_start_uboot(void) 56 { 57 puts("SPL: Please implement spl_start_uboot() for your board\n"); 58 puts("SPL: Direct Linux boot not active!\n"); 59 return 1; 60 } 61 62 /* weak default platform specific function to initialize 63 * dram banks 64 */ 65 __weak int dram_init_banksize(void) 66 { 67 return 0; 68 } 69 70 /* 71 * Weak default function for arch specific zImage check. Return zero 72 * and fill start and end address if image is recognized. 73 */ 74 int __weak bootz_setup(ulong image, ulong *start, ulong *end) 75 { 76 return 1; 77 } 78 #endif 79 80 /* Weak default function for arch/board-specific fixups to the spl_image_info */ 81 void __weak spl_perform_fixups(struct spl_image_info *spl_image) 82 { 83 } 84 85 /* Get the next stage process */ 86 __weak void spl_next_stage(struct spl_image_info *spl) {} 87 88 void spl_fixup_fdt(void) 89 { 90 #if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR) 91 void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR; 92 int err; 93 94 err = fdt_check_header(fdt_blob); 95 if (err < 0) { 96 printf("fdt_root: %s\n", fdt_strerror(err)); 97 return; 98 } 99 100 /* fixup the memory dt node */ 101 err = fdt_shrink_to_minimum(fdt_blob, 0); 102 if (err == 0) { 103 printf("spl: fdt_shrink_to_minimum err - %d\n", err); 104 return; 105 } 106 107 err = arch_fixup_fdt(fdt_blob); 108 if (err) { 109 printf("spl: arch_fixup_fdt err - %d\n", err); 110 return; 111 } 112 #endif 113 } 114 115 /* 116 * Weak default function for board specific cleanup/preparation before 117 * Linux boot. Some boards/platforms might not need it, so just provide 118 * an empty stub here. 119 */ 120 __weak void spl_board_prepare_for_linux(void) 121 { 122 /* Nothing to do! */ 123 } 124 125 __weak void spl_board_prepare_for_boot(void) 126 { 127 /* Nothing to do! */ 128 } 129 130 void spl_set_header_raw_uboot(struct spl_image_info *spl_image) 131 { 132 spl_image->size = CONFIG_SYS_MONITOR_LEN; 133 spl_image->entry_point = CONFIG_SYS_UBOOT_START; 134 spl_image->load_addr = CONFIG_SYS_TEXT_BASE; 135 spl_image->os = IH_OS_U_BOOT; 136 spl_image->name = "U-Boot"; 137 } 138 139 int spl_parse_image_header(struct spl_image_info *spl_image, 140 const struct image_header *header) 141 { 142 if (image_get_magic(header) == IH_MAGIC) { 143 #ifdef CONFIG_SPL_LEGACY_IMAGE_SUPPORT 144 u32 header_size = sizeof(struct image_header); 145 146 if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY) { 147 /* 148 * On some system (e.g. powerpc), the load-address and 149 * entry-point is located at address 0. We can't load 150 * to 0-0x40. So skip header in this case. 151 */ 152 spl_image->load_addr = image_get_load(header); 153 spl_image->entry_point = image_get_ep(header); 154 spl_image->size = image_get_data_size(header); 155 } else { 156 spl_image->entry_point = image_get_load(header); 157 /* Load including the header */ 158 spl_image->load_addr = spl_image->entry_point - 159 header_size; 160 spl_image->size = image_get_data_size(header) + 161 header_size; 162 } 163 spl_image->os = image_get_os(header); 164 spl_image->name = image_get_name(header); 165 debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n", 166 IH_NMLEN, spl_image->name, 167 spl_image->load_addr, spl_image->size); 168 #else 169 /* LEGACY image not supported */ 170 debug("Legacy boot image support not enabled, proceeding to other boot methods\n"); 171 return -EINVAL; 172 #endif 173 } else { 174 #ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE 175 /* 176 * CONFIG_SPL_PANIC_ON_RAW_IMAGE is defined when the 177 * code which loads images in SPL cannot guarantee that 178 * absolutely all read errors will be reported. 179 * An example is the LPC32XX MLC NAND driver, which 180 * will consider that a completely unreadable NAND block 181 * is bad, and thus should be skipped silently. 182 */ 183 panic("** no mkimage signature but raw image not supported"); 184 #endif 185 186 #ifdef CONFIG_SPL_OS_BOOT 187 ulong start, end; 188 189 if (!bootz_setup((ulong)header, &start, &end)) { 190 spl_image->name = "Linux"; 191 spl_image->os = IH_OS_LINUX; 192 spl_image->load_addr = CONFIG_SYS_LOAD_ADDR; 193 spl_image->entry_point = CONFIG_SYS_LOAD_ADDR; 194 spl_image->size = end - start; 195 debug("spl: payload zImage, load addr: 0x%lx size: %d\n", 196 spl_image->load_addr, spl_image->size); 197 return 0; 198 } 199 #endif 200 201 #ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT 202 /* Signature not found - assume u-boot.bin */ 203 debug("mkimage signature not found - ih_magic = %x\n", 204 header->ih_magic); 205 spl_set_header_raw_uboot(spl_image); 206 #else 207 /* RAW image not supported, proceed to other boot methods. */ 208 debug("Raw boot image support not enabled, proceeding to other boot methods\n"); 209 return -EINVAL; 210 #endif 211 } 212 213 return 0; 214 } 215 216 __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 217 { 218 typedef void __noreturn (*image_entry_noargs_t)(void); 219 220 image_entry_noargs_t image_entry = 221 (image_entry_noargs_t)spl_image->entry_point; 222 223 debug("image entry point: 0x%lX\n", spl_image->entry_point); 224 image_entry(); 225 } 226 227 /* 228 * 64-bit: No special operation. 229 * 230 * 32-bit: Initial gd->bd->bi_dram[] to active dcache attr of memory. 231 * Assuming 256MB is enough for SPL(MMU still maps 4GB size). 232 */ 233 #ifndef CONFIG_SPL_SYS_DCACHE_OFF 234 static int spl_dcache_enable(void) 235 { 236 bool free_bd = false; 237 238 #ifndef CONFIG_ARM64 239 if (!gd->bd) { 240 gd->bd = calloc(1, sizeof(bd_t)); 241 if (!gd->bd) { 242 debug("spl: no bd_t memory\n"); 243 return -ENOMEM; 244 } 245 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 246 gd->bd->bi_dram[0].size = SZ_256M; 247 free_bd = true; 248 } 249 #endif 250 /* TLB memory should be 64KB base align and 4KB end align */ 251 gd->arch.tlb_size = PGTABLE_SIZE; 252 gd->arch.tlb_addr = (ulong)memalign(SZ_64K, ALIGN(PGTABLE_SIZE, SZ_4K)); 253 if (!gd->arch.tlb_addr) { 254 debug("spl: no TLB memory\n"); 255 return -ENOMEM; 256 } 257 258 dcache_enable(); 259 if (free_bd) 260 free(gd->bd); 261 262 return 0; 263 } 264 #endif 265 266 static int spl_common_init(bool setup_malloc) 267 { 268 int ret; 269 270 debug("spl_early_init()\n"); 271 272 #if CONFIG_VAL(SYS_MALLOC_F_LEN) 273 if (setup_malloc) { 274 #ifdef CONFIG_MALLOC_F_ADDR 275 gd->malloc_base = CONFIG_MALLOC_F_ADDR; 276 #endif 277 gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN); 278 gd->malloc_ptr = 0; 279 } 280 #endif 281 282 /* 283 * setup D-cache as early as possible after malloc setup 284 * I-cache has been setup at early assembly code by default. 285 */ 286 #ifndef CONFIG_SPL_SYS_DCACHE_OFF 287 ret = spl_dcache_enable(); 288 if (ret) { 289 debug("spl_dcache_enable() return error %d\n", ret); 290 return ret; 291 } 292 #endif 293 ret = bootstage_init(true); 294 if (ret) { 295 debug("%s: Failed to set up bootstage: ret=%d\n", __func__, 296 ret); 297 return ret; 298 } 299 bootstage_mark_name(BOOTSTAGE_ID_START_SPL, "spl"); 300 if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) { 301 ret = fdtdec_setup(); 302 if (ret) { 303 debug("fdtdec_setup() returned error %d\n", ret); 304 return ret; 305 } 306 } 307 if (CONFIG_IS_ENABLED(DM)) { 308 bootstage_start(BOOTSTATE_ID_ACCUM_DM_SPL, "dm_spl"); 309 /* With CONFIG_SPL_OF_PLATDATA, bring in all devices */ 310 ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA)); 311 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_SPL); 312 if (ret) { 313 debug("dm_init_and_scan() returned error %d\n", ret); 314 return ret; 315 } 316 } 317 318 return 0; 319 } 320 321 #if !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD) 322 static void spl_setup_relocate(void) 323 { 324 gd->relocaddr = CONFIG_SPL_RELOC_TEXT_BASE; 325 gd->new_gd = (gd_t *)gd; 326 gd->start_addr_sp = gd->relocaddr; 327 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 328 329 gd->start_addr_sp -= gd->fdt_size; 330 gd->new_fdt = (void *)gd->start_addr_sp; 331 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 332 gd->fdt_blob = gd->new_fdt; 333 334 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start; 335 } 336 #else 337 static void spl_setup_relocate(void) 338 { 339 340 } 341 #endif 342 343 void spl_set_bd(void) 344 { 345 if (!gd->bd) 346 gd->bd = &bdata; 347 } 348 349 int spl_early_init(void) 350 { 351 int ret; 352 353 ret = spl_common_init(true); 354 if (ret) 355 return ret; 356 gd->flags |= GD_FLG_SPL_EARLY_INIT; 357 358 spl_setup_relocate(); 359 360 return 0; 361 } 362 363 int spl_init(void) 364 { 365 int ret; 366 bool setup_malloc = !(IS_ENABLED(CONFIG_SPL_STACK_R) && 367 IS_ENABLED(CONFIG_SPL_SYS_MALLOC_SIMPLE)); 368 369 if (!(gd->flags & GD_FLG_SPL_EARLY_INIT)) { 370 ret = spl_common_init(setup_malloc); 371 if (ret) 372 return ret; 373 } 374 gd->flags |= GD_FLG_SPL_INIT; 375 376 return 0; 377 } 378 379 #ifndef BOOT_DEVICE_NONE 380 #define BOOT_DEVICE_NONE 0xdeadbeef 381 #endif 382 383 __weak void board_boot_order(u32 *spl_boot_list) 384 { 385 spl_boot_list[0] = spl_boot_device(); 386 } 387 388 static struct spl_image_loader *spl_ll_find_loader(uint boot_device) 389 { 390 struct spl_image_loader *drv = 391 ll_entry_start(struct spl_image_loader, spl_image_loader); 392 const int n_ents = 393 ll_entry_count(struct spl_image_loader, spl_image_loader); 394 struct spl_image_loader *entry; 395 396 for (entry = drv; entry != drv + n_ents; entry++) { 397 if (boot_device == entry->boot_device) 398 return entry; 399 } 400 401 /* Not found */ 402 return NULL; 403 } 404 405 static int spl_load_image(struct spl_image_info *spl_image, 406 struct spl_image_loader *loader) 407 { 408 struct spl_boot_device bootdev; 409 410 bootdev.boot_device = loader->boot_device; 411 bootdev.boot_device_name = NULL; 412 413 return loader->load_image(spl_image, &bootdev); 414 } 415 416 /** 417 * boot_from_devices() - Try loading an booting U-Boot from a list of devices 418 * 419 * @spl_image: Place to put the image details if successful 420 * @spl_boot_list: List of boot devices to try 421 * @count: Number of elements in spl_boot_list 422 * @return 0 if OK, -ve on error 423 */ 424 static int boot_from_devices(struct spl_image_info *spl_image, 425 u32 spl_boot_list[], int count) 426 { 427 int i; 428 429 for (i = 0; i < count && spl_boot_list[i] != BOOT_DEVICE_NONE; i++) { 430 struct spl_image_loader *loader; 431 432 loader = spl_ll_find_loader(spl_boot_list[i]); 433 #if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 434 if (loader) 435 printf("Trying to boot from %s\n", loader->name); 436 else 437 puts("SPL: Unsupported Boot Device!\n"); 438 #endif 439 if (loader && !spl_load_image(spl_image, loader)) { 440 spl_image->boot_device = spl_boot_list[i]; 441 return 0; 442 } 443 } 444 445 return -ENODEV; 446 } 447 448 #if defined(CONFIG_DM) && !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD) 449 static int spl_initr_dm(void) 450 { 451 int ret; 452 453 /* Save the pre-reloc driver model and start a new one */ 454 gd->dm_root_f = gd->dm_root; 455 gd->dm_root = NULL; 456 bootstage_start(BOOTSTATE_ID_ACCUM_DM_R, "dm_r"); 457 ret = dm_init_and_scan(false); 458 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_R); 459 if (ret) 460 return ret; 461 462 #if defined(CONFIG_TIMER) 463 gd->timer = NULL; 464 #endif 465 serial_init(); 466 467 return 0; 468 } 469 #else 470 static int spl_initr_dm(void) 471 { 472 return 0; 473 } 474 #endif 475 476 void board_init_r(gd_t *dummy1, ulong dummy2) 477 { 478 u32 spl_boot_list[] = { 479 BOOT_DEVICE_NONE, 480 BOOT_DEVICE_NONE, 481 BOOT_DEVICE_NONE, 482 BOOT_DEVICE_NONE, 483 BOOT_DEVICE_NONE, 484 }; 485 struct spl_image_info spl_image; 486 487 debug(">>spl:board_init_r()\n"); 488 489 spl_initr_dm(); 490 491 spl_set_bd(); 492 493 #ifdef CONFIG_SPL_OS_BOOT 494 dram_init_banksize(); 495 #endif 496 497 #if defined(CONFIG_SYS_SPL_MALLOC_START) 498 mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, 499 CONFIG_SYS_SPL_MALLOC_SIZE); 500 gd->flags |= GD_FLG_FULL_MALLOC_INIT; 501 #endif 502 if (!(gd->flags & GD_FLG_SPL_INIT)) { 503 if (spl_init()) 504 hang(); 505 } 506 #if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6) 507 /* 508 * timer_init() does not exist on PPC systems. The timer is initialized 509 * and enabled (decrementer) in interrupt_init() here. 510 */ 511 timer_init(); 512 #endif 513 514 #if CONFIG_IS_ENABLED(BOARD_INIT) 515 spl_board_init(); 516 #endif 517 518 memset(&spl_image, '\0', sizeof(spl_image)); 519 520 #if CONFIG_IS_ENABLED(ATF) 521 /* 522 * Bl32 ep is optional, initial it as an invalid value. 523 * BL33 ep is mandatory, but initial it as a default value is better. 524 */ 525 spl_image.entry_point_bl32 = -1; 526 spl_image.entry_point_bl33 = CONFIG_SYS_TEXT_BASE; 527 #endif 528 529 #ifdef CONFIG_SYS_SPL_ARGS_ADDR 530 spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR; 531 #endif 532 spl_image.boot_device = BOOT_DEVICE_NONE; 533 board_boot_order(spl_boot_list); 534 spl_next_stage(&spl_image); 535 if (boot_from_devices(&spl_image, spl_boot_list, 536 ARRAY_SIZE(spl_boot_list))) { 537 puts("SPL: failed to boot from all boot devices\n"); 538 hang(); 539 } 540 541 spl_perform_fixups(&spl_image); 542 543 #ifdef CONFIG_CPU_V7M 544 spl_image.entry_point |= 0x1; 545 #endif 546 switch (spl_image.os) { 547 case IH_OS_U_BOOT: 548 debug("Jumping to U-Boot\n"); 549 break; 550 #if CONFIG_IS_ENABLED(ATF) 551 case IH_OS_ARM_TRUSTED_FIRMWARE: 552 printf("Jumping to U-Boot via ARM Trusted Firmware\n\n"); 553 spl_invoke_atf(&spl_image); 554 break; 555 #endif 556 #if CONFIG_IS_ENABLED(OPTEE) 557 case IH_OS_OP_TEE: 558 debug("Jumping to U-Boot via OP-TEE\n"); 559 spl_optee_entry(NULL, NULL, (void *)spl_image.fdt_addr, 560 (void *)spl_image.entry_point); 561 break; 562 #endif 563 #ifdef CONFIG_SPL_OS_BOOT 564 case IH_OS_LINUX: 565 debug("Jumping to Linux\n"); 566 spl_fixup_fdt(); 567 spl_board_prepare_for_linux(); 568 jump_to_image_linux(&spl_image); 569 #endif 570 default: 571 debug("Unsupported OS image.. Jumping nevertheless..\n"); 572 } 573 #if CONFIG_VAL(SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE) 574 debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr, 575 gd->malloc_ptr / 1024); 576 #endif 577 578 debug("loaded - jumping to U-Boot...\n"); 579 #ifdef CONFIG_BOOTSTAGE_STASH 580 int ret; 581 582 bootstage_mark_name(BOOTSTAGE_ID_END_SPL, "end_spl"); 583 ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR, 584 CONFIG_BOOTSTAGE_STASH_SIZE); 585 if (ret) 586 debug("Failed to stash bootstage: err=%d\n", ret); 587 #endif 588 589 debug("loaded - jumping to U-Boot...\n"); 590 spl_board_prepare_for_boot(); 591 jump_to_image_no_args(&spl_image); 592 } 593 594 /* 595 * This requires UART clocks to be enabled. In order for this to work the 596 * caller must ensure that the gd pointer is valid. 597 */ 598 void preloader_console_init(void) 599 { 600 gd->baudrate = CONFIG_BAUDRATE; 601 602 serial_init(); /* serial communications setup */ 603 604 gd->have_console = 1; 605 606 puts("\nU-Boot SPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \ 607 U_BOOT_TIME ")\n"); 608 #ifdef CONFIG_SPL_DISPLAY_PRINT 609 spl_display_print(); 610 #endif 611 } 612 613 /** 614 * spl_relocate_stack_gd() - Relocate stack ready for board_init_r() execution 615 * 616 * Sometimes board_init_f() runs with a stack in SRAM but we want to use SDRAM 617 * for the main board_init_r() execution. This is typically because we need 618 * more stack space for things like the MMC sub-system. 619 * 620 * This function calculates the stack position, copies the global_data into 621 * place, sets the new gd (except for ARM, for which setting GD within a C 622 * function may not always work) and returns the new stack position. The 623 * caller is responsible for setting up the sp register and, in the case 624 * of ARM, setting up gd. 625 * 626 * All of this is done using the same layout and alignments as done in 627 * board_init_f_init_reserve() / board_init_f_alloc_reserve(). 628 * 629 * @return new stack location, or 0 to use the same stack 630 */ 631 ulong spl_relocate_stack_gd(void) 632 { 633 #ifdef CONFIG_SPL_STACK_R 634 gd_t *new_gd; 635 ulong ptr = CONFIG_SPL_STACK_R_ADDR; 636 637 #if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_VAL(SYS_MALLOC_F_LEN) 638 if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) { 639 ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; 640 gd->malloc_base = ptr; 641 gd->malloc_limit = CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; 642 gd->malloc_ptr = 0; 643 } 644 #endif 645 /* Get stack position: use 8-byte alignment for ABI compliance */ 646 ptr = CONFIG_SPL_STACK_R_ADDR - roundup(sizeof(gd_t),16); 647 new_gd = (gd_t *)ptr; 648 memcpy(new_gd, (void *)gd, sizeof(gd_t)); 649 #if CONFIG_IS_ENABLED(DM) 650 dm_fixup_for_gd_move(new_gd); 651 #endif 652 #if !defined(CONFIG_ARM) 653 gd = new_gd; 654 #endif 655 return ptr; 656 #else 657 return 0; 658 #endif 659 } 660