147f7bcaeSTom Rini /* 247f7bcaeSTom Rini * (C) Copyright 2010 347f7bcaeSTom Rini * Texas Instruments, <www.ti.com> 447f7bcaeSTom Rini * 547f7bcaeSTom Rini * Aneesh V <aneesh@ti.com> 647f7bcaeSTom Rini * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 847f7bcaeSTom Rini */ 9f1c6e192SPhilipp Tomsich 1047f7bcaeSTom Rini #include <common.h> 1111516518SSimon Glass #include <dm.h> 1247f7bcaeSTom Rini #include <spl.h> 13dced428bSAndy Yan #include <asm/sections.h> 1447f7bcaeSTom Rini #include <asm/u-boot.h> 1547f7bcaeSTom Rini #include <nand.h> 1647f7bcaeSTom Rini #include <fat.h> 1747f7bcaeSTom Rini #include <version.h> 1847f7bcaeSTom Rini #include <image.h> 1947f7bcaeSTom Rini #include <malloc.h> 2011516518SSimon Glass #include <dm/root.h> 2147f7bcaeSTom Rini #include <linux/compiler.h> 226e7585bbSB, Ravi #include <fdt_support.h> 2347f7bcaeSTom Rini 2447f7bcaeSTom Rini DECLARE_GLOBAL_DATA_PTR; 2547f7bcaeSTom Rini 263c6f8a0dSStefan Roese #ifndef CONFIG_SYS_UBOOT_START 273c6f8a0dSStefan Roese #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 283c6f8a0dSStefan Roese #endif 29ae83d882SStefano Babic #ifndef CONFIG_SYS_MONITOR_LEN 30e76caa62SAndreas Bießmann /* Unknown U-Boot size, let's assume it will not be more than 200 KB */ 31ae83d882SStefano Babic #define CONFIG_SYS_MONITOR_LEN (200 * 1024) 32ae83d882SStefano Babic #endif 33ae83d882SStefano Babic 3447f7bcaeSTom Rini u32 *boot_params_ptr = NULL; 3547f7bcaeSTom Rini 366507f133STom Rini /* Define board data structure */ 3747f7bcaeSTom Rini static bd_t bdata __attribute__ ((section(".data"))); 3847f7bcaeSTom Rini 3947f7bcaeSTom Rini /* 40496c5483SHeiko Schocher * Board-specific Platform code can reimplement show_boot_progress () if needed 41496c5483SHeiko Schocher */ 42496c5483SHeiko Schocher __weak void show_boot_progress(int val) {} 43496c5483SHeiko Schocher 44496c5483SHeiko Schocher /* 4547f7bcaeSTom Rini * Default function to determine if u-boot or the OS should 4647f7bcaeSTom Rini * be started. This implementation always returns 1. 4747f7bcaeSTom Rini * 4847f7bcaeSTom Rini * Please implement your own board specific funcion to do this. 4947f7bcaeSTom Rini * 5047f7bcaeSTom Rini * RETURN 5147f7bcaeSTom Rini * 0 to not start u-boot 5247f7bcaeSTom Rini * positive if u-boot should start 5347f7bcaeSTom Rini */ 5447f7bcaeSTom Rini #ifdef CONFIG_SPL_OS_BOOT 5547f7bcaeSTom Rini __weak int spl_start_uboot(void) 5647f7bcaeSTom Rini { 5747f7bcaeSTom Rini puts("SPL: Please implement spl_start_uboot() for your board\n"); 5847f7bcaeSTom Rini puts("SPL: Direct Linux boot not active!\n"); 5947f7bcaeSTom Rini return 1; 6047f7bcaeSTom Rini } 61431889d6SLadislav Michl 626e7585bbSB, Ravi /* weak default platform specific function to initialize 636e7585bbSB, Ravi * dram banks 646e7585bbSB, Ravi */ 656e7585bbSB, Ravi __weak int dram_init_banksize(void) 666e7585bbSB, Ravi { 676e7585bbSB, Ravi return 0; 686e7585bbSB, Ravi } 696e7585bbSB, Ravi 70431889d6SLadislav Michl /* 71431889d6SLadislav Michl * Weak default function for arch specific zImage check. Return zero 72431889d6SLadislav Michl * and fill start and end address if image is recognized. 73431889d6SLadislav Michl */ 74431889d6SLadislav Michl int __weak bootz_setup(ulong image, ulong *start, ulong *end) 75431889d6SLadislav Michl { 76431889d6SLadislav Michl return 1; 77431889d6SLadislav Michl } 7847f7bcaeSTom Rini #endif 7947f7bcaeSTom Rini 806f678d2aSJason Zhu /* Weak default function for arch/board-specific fixups to the spl_image_info */ 816f678d2aSJason Zhu void __weak spl_perform_fixups(struct spl_image_info *spl_image) 826f678d2aSJason Zhu { 836f678d2aSJason Zhu } 846f678d2aSJason Zhu 85e8b9592fSJason Zhu /* Get the next stage process */ 86d41e543aSJoseph Chen __weak void spl_next_stage(struct spl_image_info *spl) 87d41e543aSJoseph Chen { 88d41e543aSJoseph Chen spl->next_stage = SPL_NEXT_STAGE_UBOOT; 89d41e543aSJoseph Chen } 90e8b9592fSJason Zhu 91f8ca9d16SJoseph Chen /* Weak default function for arch/board-specific preppare before jumping */ 92f8ca9d16SJoseph Chen int __weak spl_board_prepare_for_jump(struct spl_image_info *spl_image) 93f8ca9d16SJoseph Chen { 94f8ca9d16SJoseph Chen return 0; 95f8ca9d16SJoseph Chen } 96f8ca9d16SJoseph Chen 972ba7d841SJason Zhu /* Fix storages, like iomux */ 982ba7d841SJason Zhu __weak void spl_board_storages_fixup(struct spl_image_loader *loader) 992ba7d841SJason Zhu { 1002ba7d841SJason Zhu /* Nothing to do! */ 1012ba7d841SJason Zhu } 1022ba7d841SJason Zhu 1036e7585bbSB, Ravi void spl_fixup_fdt(void) 1046e7585bbSB, Ravi { 1056e7585bbSB, Ravi #if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR) 1066e7585bbSB, Ravi void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR; 1076e7585bbSB, Ravi int err; 1086e7585bbSB, Ravi 1096e7585bbSB, Ravi err = fdt_check_header(fdt_blob); 1106e7585bbSB, Ravi if (err < 0) { 1116e7585bbSB, Ravi printf("fdt_root: %s\n", fdt_strerror(err)); 1126e7585bbSB, Ravi return; 1136e7585bbSB, Ravi } 1146e7585bbSB, Ravi 1156e7585bbSB, Ravi /* fixup the memory dt node */ 1166e7585bbSB, Ravi err = fdt_shrink_to_minimum(fdt_blob, 0); 1176e7585bbSB, Ravi if (err == 0) { 1186e7585bbSB, Ravi printf("spl: fdt_shrink_to_minimum err - %d\n", err); 1196e7585bbSB, Ravi return; 1206e7585bbSB, Ravi } 1216e7585bbSB, Ravi 1226e7585bbSB, Ravi err = arch_fixup_fdt(fdt_blob); 1236e7585bbSB, Ravi if (err) { 1246e7585bbSB, Ravi printf("spl: arch_fixup_fdt err - %d\n", err); 1256e7585bbSB, Ravi return; 1266e7585bbSB, Ravi } 1276e7585bbSB, Ravi #endif 1286e7585bbSB, Ravi } 1296e7585bbSB, Ravi 130ea8256f0SStefan Roese /* 131ea8256f0SStefan Roese * Weak default function for board specific cleanup/preparation before 132ea8256f0SStefan Roese * Linux boot. Some boards/platforms might not need it, so just provide 133ea8256f0SStefan Roese * an empty stub here. 134ea8256f0SStefan Roese */ 135ea8256f0SStefan Roese __weak void spl_board_prepare_for_linux(void) 136ea8256f0SStefan Roese { 137ea8256f0SStefan Roese /* Nothing to do! */ 138ea8256f0SStefan Roese } 139ea8256f0SStefan Roese 1403a3b9147SMichal Simek __weak void spl_board_prepare_for_boot(void) 1413a3b9147SMichal Simek { 1423a3b9147SMichal Simek /* Nothing to do! */ 1433a3b9147SMichal Simek } 1443a3b9147SMichal Simek 145d95ceb97SSimon Glass void spl_set_header_raw_uboot(struct spl_image_info *spl_image) 1460c3117b1SHeiko Schocher { 147d95ceb97SSimon Glass spl_image->size = CONFIG_SYS_MONITOR_LEN; 148d95ceb97SSimon Glass spl_image->entry_point = CONFIG_SYS_UBOOT_START; 149d95ceb97SSimon Glass spl_image->load_addr = CONFIG_SYS_TEXT_BASE; 150d95ceb97SSimon Glass spl_image->os = IH_OS_U_BOOT; 151d95ceb97SSimon Glass spl_image->name = "U-Boot"; 1520c3117b1SHeiko Schocher } 1530c3117b1SHeiko Schocher 15471316c1dSSimon Glass int spl_parse_image_header(struct spl_image_info *spl_image, 15571316c1dSSimon Glass const struct image_header *header) 15647f7bcaeSTom Rini { 157722a6b17SAndrew F. Davis if (image_get_magic(header) == IH_MAGIC) { 158722a6b17SAndrew F. Davis #ifdef CONFIG_SPL_LEGACY_IMAGE_SUPPORT 15947f7bcaeSTom Rini u32 header_size = sizeof(struct image_header); 16047f7bcaeSTom Rini 16171316c1dSSimon Glass if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY) { 162022b4975SStefan Roese /* 163022b4975SStefan Roese * On some system (e.g. powerpc), the load-address and 164022b4975SStefan Roese * entry-point is located at address 0. We can't load 165022b4975SStefan Roese * to 0-0x40. So skip header in this case. 166022b4975SStefan Roese */ 16771316c1dSSimon Glass spl_image->load_addr = image_get_load(header); 16871316c1dSSimon Glass spl_image->entry_point = image_get_ep(header); 16971316c1dSSimon Glass spl_image->size = image_get_data_size(header); 170022b4975SStefan Roese } else { 17171316c1dSSimon Glass spl_image->entry_point = image_get_load(header); 17247f7bcaeSTom Rini /* Load including the header */ 17371316c1dSSimon Glass spl_image->load_addr = spl_image->entry_point - 174022b4975SStefan Roese header_size; 17571316c1dSSimon Glass spl_image->size = image_get_data_size(header) + 176022b4975SStefan Roese header_size; 177022b4975SStefan Roese } 17871316c1dSSimon Glass spl_image->os = image_get_os(header); 17971316c1dSSimon Glass spl_image->name = image_get_name(header); 18011e1479bSAndre Przywara debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n", 18175ee777bSAndré Draszik IH_NMLEN, spl_image->name, 18271316c1dSSimon Glass spl_image->load_addr, spl_image->size); 183722a6b17SAndrew F. Davis #else 184722a6b17SAndrew F. Davis /* LEGACY image not supported */ 1857a001d4fSAnatolij Gustschin debug("Legacy boot image support not enabled, proceeding to other boot methods\n"); 186722a6b17SAndrew F. Davis return -EINVAL; 187722a6b17SAndrew F. Davis #endif 18847f7bcaeSTom Rini } else { 1898c80eb3bSAlbert ARIBAUD \(3ADEV\) #ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE 1908c80eb3bSAlbert ARIBAUD \(3ADEV\) /* 1918c80eb3bSAlbert ARIBAUD \(3ADEV\) * CONFIG_SPL_PANIC_ON_RAW_IMAGE is defined when the 1928c80eb3bSAlbert ARIBAUD \(3ADEV\) * code which loads images in SPL cannot guarantee that 1938c80eb3bSAlbert ARIBAUD \(3ADEV\) * absolutely all read errors will be reported. 1948c80eb3bSAlbert ARIBAUD \(3ADEV\) * An example is the LPC32XX MLC NAND driver, which 1958c80eb3bSAlbert ARIBAUD \(3ADEV\) * will consider that a completely unreadable NAND block 1968c80eb3bSAlbert ARIBAUD \(3ADEV\) * is bad, and thus should be skipped silently. 1978c80eb3bSAlbert ARIBAUD \(3ADEV\) */ 1988c80eb3bSAlbert ARIBAUD \(3ADEV\) panic("** no mkimage signature but raw image not supported"); 19985a37729SPaul Kocialkowski #endif 20085a37729SPaul Kocialkowski 201431889d6SLadislav Michl #ifdef CONFIG_SPL_OS_BOOT 202431889d6SLadislav Michl ulong start, end; 203431889d6SLadislav Michl 204431889d6SLadislav Michl if (!bootz_setup((ulong)header, &start, &end)) { 20571316c1dSSimon Glass spl_image->name = "Linux"; 20671316c1dSSimon Glass spl_image->os = IH_OS_LINUX; 20771316c1dSSimon Glass spl_image->load_addr = CONFIG_SYS_LOAD_ADDR; 20871316c1dSSimon Glass spl_image->entry_point = CONFIG_SYS_LOAD_ADDR; 20971316c1dSSimon Glass spl_image->size = end - start; 21011e1479bSAndre Przywara debug("spl: payload zImage, load addr: 0x%lx size: %d\n", 21171316c1dSSimon Glass spl_image->load_addr, spl_image->size); 212431889d6SLadislav Michl return 0; 213431889d6SLadislav Michl } 214431889d6SLadislav Michl #endif 21585a37729SPaul Kocialkowski 21624eb39b5SAndrew F. Davis #ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT 21747f7bcaeSTom Rini /* Signature not found - assume u-boot.bin */ 21847f7bcaeSTom Rini debug("mkimage signature not found - ih_magic = %x\n", 21947f7bcaeSTom Rini header->ih_magic); 22071316c1dSSimon Glass spl_set_header_raw_uboot(spl_image); 22124eb39b5SAndrew F. Davis #else 22224eb39b5SAndrew F. Davis /* RAW image not supported, proceed to other boot methods. */ 2237a001d4fSAnatolij Gustschin debug("Raw boot image support not enabled, proceeding to other boot methods\n"); 22424eb39b5SAndrew F. Davis return -EINVAL; 2258c80eb3bSAlbert ARIBAUD \(3ADEV\) #endif 22647f7bcaeSTom Rini } 22724eb39b5SAndrew F. Davis 2287e0f2267SMarek Vasut return 0; 22947f7bcaeSTom Rini } 23047f7bcaeSTom Rini 231a759f1e0SAllen Martin __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 23247f7bcaeSTom Rini { 2334a0eb757SSRICHARAN R typedef void __noreturn (*image_entry_noargs_t)(void); 2344a0eb757SSRICHARAN R 23547f7bcaeSTom Rini image_entry_noargs_t image_entry = 23611e1479bSAndre Przywara (image_entry_noargs_t)spl_image->entry_point; 23747f7bcaeSTom Rini 23811e1479bSAndre Przywara debug("image entry point: 0x%lX\n", spl_image->entry_point); 2394a0eb757SSRICHARAN R image_entry(); 24047f7bcaeSTom Rini } 24147f7bcaeSTom Rini 242594e14a4SJoseph Chen /* 243594e14a4SJoseph Chen * 64-bit: No special operation. 244594e14a4SJoseph Chen * 245594e14a4SJoseph Chen * 32-bit: Initial gd->bd->bi_dram[] to active dcache attr of memory. 246594e14a4SJoseph Chen * Assuming 256MB is enough for SPL(MMU still maps 4GB size). 247594e14a4SJoseph Chen */ 248594e14a4SJoseph Chen #ifndef CONFIG_SPL_SYS_DCACHE_OFF 249594e14a4SJoseph Chen static int spl_dcache_enable(void) 250594e14a4SJoseph Chen { 251594e14a4SJoseph Chen bool free_bd = false; 252594e14a4SJoseph Chen 253594e14a4SJoseph Chen #ifndef CONFIG_ARM64 254594e14a4SJoseph Chen if (!gd->bd) { 255594e14a4SJoseph Chen gd->bd = calloc(1, sizeof(bd_t)); 256594e14a4SJoseph Chen if (!gd->bd) { 257594e14a4SJoseph Chen debug("spl: no bd_t memory\n"); 258594e14a4SJoseph Chen return -ENOMEM; 259594e14a4SJoseph Chen } 260594e14a4SJoseph Chen gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 261594e14a4SJoseph Chen gd->bd->bi_dram[0].size = SZ_256M; 262594e14a4SJoseph Chen free_bd = true; 263594e14a4SJoseph Chen } 264594e14a4SJoseph Chen #endif 265db9b4c53SJason Zhu /* TLB memory should be SZ_16K base align and 4KB end align */ 266594e14a4SJoseph Chen gd->arch.tlb_size = PGTABLE_SIZE; 267db9b4c53SJason Zhu gd->arch.tlb_addr = (ulong)memalign(SZ_16K, ALIGN(PGTABLE_SIZE, SZ_4K)); 268594e14a4SJoseph Chen if (!gd->arch.tlb_addr) { 269594e14a4SJoseph Chen debug("spl: no TLB memory\n"); 270594e14a4SJoseph Chen return -ENOMEM; 271594e14a4SJoseph Chen } 272594e14a4SJoseph Chen 273594e14a4SJoseph Chen dcache_enable(); 274594e14a4SJoseph Chen if (free_bd) 275594e14a4SJoseph Chen free(gd->bd); 276594e14a4SJoseph Chen 277594e14a4SJoseph Chen return 0; 278594e14a4SJoseph Chen } 279594e14a4SJoseph Chen #endif 280594e14a4SJoseph Chen 281340f418aSEddie Cai static int spl_common_init(bool setup_malloc) 28247f7bcaeSTom Rini { 283f3d46bd6SSimon Glass int ret; 284f3d46bd6SSimon Glass 285340f418aSEddie Cai debug("spl_early_init()\n"); 286340f418aSEddie Cai 287f1896c45SAndy Yan #if CONFIG_VAL(SYS_MALLOC_F_LEN) 288340f418aSEddie Cai if (setup_malloc) { 28994b9e22eSMarek Vasut #ifdef CONFIG_MALLOC_F_ADDR 29094b9e22eSMarek Vasut gd->malloc_base = CONFIG_MALLOC_F_ADDR; 29194b9e22eSMarek Vasut #endif 292f1896c45SAndy Yan gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN); 293fb4f5e7cSSimon Glass gd->malloc_ptr = 0; 294340f418aSEddie Cai } 29547f7bcaeSTom Rini #endif 2961481bafeSJoseph Chen 2971481bafeSJoseph Chen /* 2981481bafeSJoseph Chen * setup D-cache as early as possible after malloc setup 2991481bafeSJoseph Chen * I-cache has been setup at early assembly code by default. 3001481bafeSJoseph Chen */ 301594e14a4SJoseph Chen #ifndef CONFIG_SPL_SYS_DCACHE_OFF 302594e14a4SJoseph Chen ret = spl_dcache_enable(); 303594e14a4SJoseph Chen if (ret) { 304594e14a4SJoseph Chen debug("spl_dcache_enable() return error %d\n", ret); 305594e14a4SJoseph Chen return ret; 306594e14a4SJoseph Chen } 3071481bafeSJoseph Chen #endif 308824bb1b4SSimon Glass ret = bootstage_init(true); 309824bb1b4SSimon Glass if (ret) { 310824bb1b4SSimon Glass debug("%s: Failed to set up bootstage: ret=%d\n", __func__, 311824bb1b4SSimon Glass ret); 312824bb1b4SSimon Glass return ret; 313824bb1b4SSimon Glass } 314824bb1b4SSimon Glass bootstage_mark_name(BOOTSTAGE_ID_START_SPL, "spl"); 315d223e0a8SSimon Glass if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) { 316f3d46bd6SSimon Glass ret = fdtdec_setup(); 317f3d46bd6SSimon Glass if (ret) { 318f3d46bd6SSimon Glass debug("fdtdec_setup() returned error %d\n", ret); 319070d00b8SSimon Glass return ret; 320f3d46bd6SSimon Glass } 321f3d46bd6SSimon Glass } 322f1c6e192SPhilipp Tomsich if (CONFIG_IS_ENABLED(DM)) { 323824bb1b4SSimon Glass bootstage_start(BOOTSTATE_ID_ACCUM_DM_SPL, "dm_spl"); 3247f73ca48STom Rini /* With CONFIG_SPL_OF_PLATDATA, bring in all devices */ 3257d23b9cfSSimon Glass ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA)); 326824bb1b4SSimon Glass bootstage_accum(BOOTSTATE_ID_ACCUM_DM_SPL); 327f3d46bd6SSimon Glass if (ret) { 328f3d46bd6SSimon Glass debug("dm_init_and_scan() returned error %d\n", ret); 329070d00b8SSimon Glass return ret; 330f3d46bd6SSimon Glass } 331f3d46bd6SSimon Glass } 332340f418aSEddie Cai 333340f418aSEddie Cai return 0; 334340f418aSEddie Cai } 335340f418aSEddie Cai 336dced428bSAndy Yan #if !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD) 337dced428bSAndy Yan static void spl_setup_relocate(void) 338dced428bSAndy Yan { 339dced428bSAndy Yan gd->relocaddr = CONFIG_SPL_RELOC_TEXT_BASE; 340dced428bSAndy Yan gd->new_gd = (gd_t *)gd; 341dced428bSAndy Yan gd->start_addr_sp = gd->relocaddr; 342dced428bSAndy Yan gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 343dced428bSAndy Yan 344dced428bSAndy Yan gd->start_addr_sp -= gd->fdt_size; 345dced428bSAndy Yan gd->new_fdt = (void *)gd->start_addr_sp; 346dced428bSAndy Yan memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 347dced428bSAndy Yan gd->fdt_blob = gd->new_fdt; 348dced428bSAndy Yan 349dced428bSAndy Yan gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start; 350dced428bSAndy Yan } 351dced428bSAndy Yan #else 352dced428bSAndy Yan static void spl_setup_relocate(void) 353dced428bSAndy Yan { 354dced428bSAndy Yan 355dced428bSAndy Yan } 356dced428bSAndy Yan #endif 357dced428bSAndy Yan 3584f443bd2SYork Sun void spl_set_bd(void) 3594f443bd2SYork Sun { 3604f443bd2SYork Sun if (!gd->bd) 3614f443bd2SYork Sun gd->bd = &bdata; 3624f443bd2SYork Sun } 3634f443bd2SYork Sun 364340f418aSEddie Cai int spl_early_init(void) 365340f418aSEddie Cai { 366340f418aSEddie Cai int ret; 367340f418aSEddie Cai 368340f418aSEddie Cai ret = spl_common_init(true); 369340f418aSEddie Cai if (ret) 370340f418aSEddie Cai return ret; 371340f418aSEddie Cai gd->flags |= GD_FLG_SPL_EARLY_INIT; 372340f418aSEddie Cai 373dced428bSAndy Yan spl_setup_relocate(); 374dced428bSAndy Yan 375340f418aSEddie Cai return 0; 376340f418aSEddie Cai } 377340f418aSEddie Cai 378340f418aSEddie Cai int spl_init(void) 379340f418aSEddie Cai { 380340f418aSEddie Cai int ret; 381cf334edfSTom Rini bool setup_malloc = !(IS_ENABLED(CONFIG_SPL_STACK_R) && 382cf334edfSTom Rini IS_ENABLED(CONFIG_SPL_SYS_MALLOC_SIMPLE)); 383340f418aSEddie Cai 384340f418aSEddie Cai if (!(gd->flags & GD_FLG_SPL_EARLY_INIT)) { 385cf334edfSTom Rini ret = spl_common_init(setup_malloc); 386340f418aSEddie Cai if (ret) 387340f418aSEddie Cai return ret; 388340f418aSEddie Cai } 389070d00b8SSimon Glass gd->flags |= GD_FLG_SPL_INIT; 390070d00b8SSimon Glass 391070d00b8SSimon Glass return 0; 392070d00b8SSimon Glass } 39347f7bcaeSTom Rini 394f101e4bdSNikita Kiryanov #ifndef BOOT_DEVICE_NONE 395f101e4bdSNikita Kiryanov #define BOOT_DEVICE_NONE 0xdeadbeef 396f101e4bdSNikita Kiryanov #endif 397f101e4bdSNikita Kiryanov 398f101e4bdSNikita Kiryanov __weak void board_boot_order(u32 *spl_boot_list) 399f101e4bdSNikita Kiryanov { 400f101e4bdSNikita Kiryanov spl_boot_list[0] = spl_boot_device(); 401f101e4bdSNikita Kiryanov } 402f101e4bdSNikita Kiryanov 403a0a80290SSimon Glass static struct spl_image_loader *spl_ll_find_loader(uint boot_device) 404a0a80290SSimon Glass { 405a0a80290SSimon Glass struct spl_image_loader *drv = 406a0a80290SSimon Glass ll_entry_start(struct spl_image_loader, spl_image_loader); 407a0a80290SSimon Glass const int n_ents = 408a0a80290SSimon Glass ll_entry_count(struct spl_image_loader, spl_image_loader); 409a0a80290SSimon Glass struct spl_image_loader *entry; 410a0a80290SSimon Glass 411a0a80290SSimon Glass for (entry = drv; entry != drv + n_ents; entry++) { 412a0a80290SSimon Glass if (boot_device == entry->boot_device) 413a0a80290SSimon Glass return entry; 414a0a80290SSimon Glass } 415a0a80290SSimon Glass 416a0a80290SSimon Glass /* Not found */ 417a0a80290SSimon Glass return NULL; 418a0a80290SSimon Glass } 419a0a80290SSimon Glass 42029d357d7SSimon Glass static int spl_load_image(struct spl_image_info *spl_image, 42129d357d7SSimon Glass struct spl_image_loader *loader) 4225211b87eSNikita Kiryanov { 423ecdfd69aSSimon Glass struct spl_boot_device bootdev; 424ecdfd69aSSimon Glass 42529d357d7SSimon Glass bootdev.boot_device = loader->boot_device; 426ecdfd69aSSimon Glass bootdev.boot_device_name = NULL; 427ecdfd69aSSimon Glass 428540bfe7dSSimon Glass return loader->load_image(spl_image, &bootdev); 429540bfe7dSSimon Glass } 430540bfe7dSSimon Glass 431540bfe7dSSimon Glass /** 432540bfe7dSSimon Glass * boot_from_devices() - Try loading an booting U-Boot from a list of devices 433540bfe7dSSimon Glass * 434540bfe7dSSimon Glass * @spl_image: Place to put the image details if successful 435540bfe7dSSimon Glass * @spl_boot_list: List of boot devices to try 436540bfe7dSSimon Glass * @count: Number of elements in spl_boot_list 437540bfe7dSSimon Glass * @return 0 if OK, -ve on error 438540bfe7dSSimon Glass */ 439540bfe7dSSimon Glass static int boot_from_devices(struct spl_image_info *spl_image, 440540bfe7dSSimon Glass u32 spl_boot_list[], int count) 441540bfe7dSSimon Glass { 442540bfe7dSSimon Glass int i; 443540bfe7dSSimon Glass 444540bfe7dSSimon Glass for (i = 0; i < count && spl_boot_list[i] != BOOT_DEVICE_NONE; i++) { 445540bfe7dSSimon Glass struct spl_image_loader *loader; 446540bfe7dSSimon Glass 447540bfe7dSSimon Glass loader = spl_ll_find_loader(spl_boot_list[i]); 4485211b87eSNikita Kiryanov #if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 4492acf35dbSSimon Glass if (loader) 450cf947da1SAndrew F. Davis printf("Trying to boot from %s\n", loader->name); 4512acf35dbSSimon Glass else 4525211b87eSNikita Kiryanov puts("SPL: Unsupported Boot Device!\n"); 4535211b87eSNikita Kiryanov #endif 4546f678d2aSJason Zhu if (loader && !spl_load_image(spl_image, loader)) { 4556f678d2aSJason Zhu spl_image->boot_device = spl_boot_list[i]; 456540bfe7dSSimon Glass return 0; 457540bfe7dSSimon Glass } 4582ba7d841SJason Zhu 4592ba7d841SJason Zhu spl_board_storages_fixup(loader); 4606f678d2aSJason Zhu } 461540bfe7dSSimon Glass 4625211b87eSNikita Kiryanov return -ENODEV; 4635211b87eSNikita Kiryanov } 4645211b87eSNikita Kiryanov 465dced428bSAndy Yan #if defined(CONFIG_DM) && !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD) 466dced428bSAndy Yan static int spl_initr_dm(void) 467dced428bSAndy Yan { 468dced428bSAndy Yan int ret; 469dced428bSAndy Yan 470dced428bSAndy Yan /* Save the pre-reloc driver model and start a new one */ 471dced428bSAndy Yan gd->dm_root_f = gd->dm_root; 472dced428bSAndy Yan gd->dm_root = NULL; 473dced428bSAndy Yan bootstage_start(BOOTSTATE_ID_ACCUM_DM_R, "dm_r"); 474dced428bSAndy Yan ret = dm_init_and_scan(false); 475dced428bSAndy Yan bootstage_accum(BOOTSTATE_ID_ACCUM_DM_R); 476dced428bSAndy Yan if (ret) 477dced428bSAndy Yan return ret; 478dced428bSAndy Yan 479dced428bSAndy Yan #if defined(CONFIG_TIMER) 480dced428bSAndy Yan gd->timer = NULL; 481dced428bSAndy Yan #endif 482dced428bSAndy Yan serial_init(); 483dced428bSAndy Yan 484dced428bSAndy Yan return 0; 485dced428bSAndy Yan } 486dced428bSAndy Yan #else 487dced428bSAndy Yan static int spl_initr_dm(void) 488dced428bSAndy Yan { 489dced428bSAndy Yan return 0; 490dced428bSAndy Yan } 491dced428bSAndy Yan #endif 492dced428bSAndy Yan 49388d57c08SJason Zhu #if defined(CONFIG_SPL_KERNEL_BOOT) && !defined(CONFIG_ARM64) 49488d57c08SJason Zhu static void boot_jump_linux(struct spl_image_info *spl_image) 49588d57c08SJason Zhu { 49688d57c08SJason Zhu void (*kernel_entry)(int zero, int arch, ulong params); 49788d57c08SJason Zhu 49888d57c08SJason Zhu printf("Jumping to %s(0x%08lx)\n", "Kernel", 49988d57c08SJason Zhu (ulong)spl_image->entry_point_os); 50088d57c08SJason Zhu spl_cleanup_before_jump(spl_image); 50188d57c08SJason Zhu kernel_entry = (void (*)(int, int, ulong))spl_image->entry_point_os; 50288d57c08SJason Zhu kernel_entry(0, 0, (ulong)spl_image->fdt_addr); 50388d57c08SJason Zhu } 50488d57c08SJason Zhu #endif 50588d57c08SJason Zhu 506070d00b8SSimon Glass void board_init_r(gd_t *dummy1, ulong dummy2) 507070d00b8SSimon Glass { 508d32b2d1cSSimon Glass u32 spl_boot_list[] = { 509d32b2d1cSSimon Glass BOOT_DEVICE_NONE, 510d32b2d1cSSimon Glass BOOT_DEVICE_NONE, 511d32b2d1cSSimon Glass BOOT_DEVICE_NONE, 512d32b2d1cSSimon Glass BOOT_DEVICE_NONE, 513d32b2d1cSSimon Glass BOOT_DEVICE_NONE, 514d32b2d1cSSimon Glass }; 515d32b2d1cSSimon Glass struct spl_image_info spl_image; 516070d00b8SSimon Glass 517070d00b8SSimon Glass debug(">>spl:board_init_r()\n"); 5184f443bd2SYork Sun 519dced428bSAndy Yan spl_initr_dm(); 520dced428bSAndy Yan 5214f443bd2SYork Sun spl_set_bd(); 5224f443bd2SYork Sun 5236e7585bbSB, Ravi #ifdef CONFIG_SPL_OS_BOOT 5246e7585bbSB, Ravi dram_init_banksize(); 5256e7585bbSB, Ravi #endif 526070d00b8SSimon Glass 527070d00b8SSimon Glass #if defined(CONFIG_SYS_SPL_MALLOC_START) 528070d00b8SSimon Glass mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, 529070d00b8SSimon Glass CONFIG_SYS_SPL_MALLOC_SIZE); 530070d00b8SSimon Glass gd->flags |= GD_FLG_FULL_MALLOC_INIT; 531070d00b8SSimon Glass #endif 532070d00b8SSimon Glass if (!(gd->flags & GD_FLG_SPL_INIT)) { 533070d00b8SSimon Glass if (spl_init()) 534070d00b8SSimon Glass hang(); 535070d00b8SSimon Glass } 536f9d42d82SAnatolij Gustschin #if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6) 537ea8256f0SStefan Roese /* 538ea8256f0SStefan Roese * timer_init() does not exist on PPC systems. The timer is initialized 539ea8256f0SStefan Roese * and enabled (decrementer) in interrupt_init() here. 540ea8256f0SStefan Roese */ 5414063c77dSIlya Yanok timer_init(); 542ea8256f0SStefan Roese #endif 5434063c77dSIlya Yanok 54489c73a9cSKever Yang #if CONFIG_IS_ENABLED(BOARD_INIT) 54547f7bcaeSTom Rini spl_board_init(); 54647f7bcaeSTom Rini #endif 54747f7bcaeSTom Rini 548d32b2d1cSSimon Glass memset(&spl_image, '\0', sizeof(spl_image)); 5491620aad4SJoseph Chen 5501620aad4SJoseph Chen #if CONFIG_IS_ENABLED(ATF) 5511620aad4SJoseph Chen /* 5521620aad4SJoseph Chen * Bl32 ep is optional, initial it as an invalid value. 5531620aad4SJoseph Chen * BL33 ep is mandatory, but initial it as a default value is better. 5541620aad4SJoseph Chen */ 5551620aad4SJoseph Chen spl_image.entry_point_bl32 = -1; 5561620aad4SJoseph Chen spl_image.entry_point_bl33 = CONFIG_SYS_TEXT_BASE; 5571620aad4SJoseph Chen #endif 5581620aad4SJoseph Chen 55956884861SJoseph Chen #if CONFIG_IS_ENABLED(OPTEE) 56056884861SJoseph Chen /* default address */ 56156884861SJoseph Chen spl_image.entry_point_os = CONFIG_SYS_TEXT_BASE; 56256884861SJoseph Chen #endif 56356884861SJoseph Chen 5645bf5250eSVikas Manocha #ifdef CONFIG_SYS_SPL_ARGS_ADDR 5655bf5250eSVikas Manocha spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR; 5665bf5250eSVikas Manocha #endif 5676f678d2aSJason Zhu spl_image.boot_device = BOOT_DEVICE_NONE; 568f101e4bdSNikita Kiryanov board_boot_order(spl_boot_list); 569e8b9592fSJason Zhu spl_next_stage(&spl_image); 570540bfe7dSSimon Glass if (boot_from_devices(&spl_image, spl_boot_list, 571540bfe7dSSimon Glass ARRAY_SIZE(spl_boot_list))) { 572f101e4bdSNikita Kiryanov puts("SPL: failed to boot from all boot devices\n"); 57336afd451SNikita Kiryanov hang(); 574f101e4bdSNikita Kiryanov } 57547f7bcaeSTom Rini 5766f678d2aSJason Zhu spl_perform_fixups(&spl_image); 5776f678d2aSJason Zhu 5786bcdd66dSVikas Manocha #ifdef CONFIG_CPU_V7M 5796bcdd66dSVikas Manocha spl_image.entry_point |= 0x1; 5806bcdd66dSVikas Manocha #endif 58147f7bcaeSTom Rini switch (spl_image.os) { 58247f7bcaeSTom Rini case IH_OS_U_BOOT: 58347f7bcaeSTom Rini debug("Jumping to U-Boot\n"); 5844beae52dSJoseph Chen spl_cleanup_before_jump(&spl_image); 58547f7bcaeSTom Rini break; 5862e15a11cSPhilipp Tomsich #if CONFIG_IS_ENABLED(ATF) 5872e15a11cSPhilipp Tomsich case IH_OS_ARM_TRUSTED_FIRMWARE: 5885d4ebb14SJason Zhu printf("Jumping to %s(0x%08lx) via ARM Trusted Firmware(0x%08lx)\n", 5895d4ebb14SJason Zhu spl_image.next_stage == SPL_NEXT_STAGE_UBOOT ? "U-Boot" : 5905d4ebb14SJason Zhu (spl_image.next_stage == SPL_NEXT_STAGE_KERNEL ? "Kernel" : "Unknown"), 591295b6466SJoseph Chen (ulong)spl_image.entry_point_bl33, 592295b6466SJoseph Chen (ulong)spl_image.entry_point); 5932e15a11cSPhilipp Tomsich spl_invoke_atf(&spl_image); 5942e15a11cSPhilipp Tomsich break; 5952e15a11cSPhilipp Tomsich #endif 596099855e2SKever Yang #if CONFIG_IS_ENABLED(OPTEE) 597099855e2SKever Yang case IH_OS_OP_TEE: 5985d4ebb14SJason Zhu printf("Jumping to %s(0x%08lx) via OP-TEE(0x%08lx)\n", 5995d4ebb14SJason Zhu spl_image.next_stage == SPL_NEXT_STAGE_UBOOT ? "U-Boot" : 6005d4ebb14SJason Zhu (spl_image.next_stage == SPL_NEXT_STAGE_KERNEL ? "Kernel" : "Unknown"), 60130ef03ebSJoseph Chen (ulong)spl_image.entry_point_os, 60230ef03ebSJoseph Chen (ulong)spl_image.entry_point); 603f8ca9d16SJoseph Chen spl_cleanup_before_jump(&spl_image); 604605bf846SJason Zhu spl_optee_entry(NULL, (void *)spl_image.entry_point_os, 605605bf846SJason Zhu (void *)spl_image.fdt_addr, 606099855e2SKever Yang (void *)spl_image.entry_point); 607099855e2SKever Yang break; 608099855e2SKever Yang #endif 60947f7bcaeSTom Rini case IH_OS_LINUX: 61088d57c08SJason Zhu #ifdef CONFIG_SPL_OS_BOOT 61147f7bcaeSTom Rini debug("Jumping to Linux\n"); 6126e7585bbSB, Ravi spl_fixup_fdt(); 61347f7bcaeSTom Rini spl_board_prepare_for_linux(); 6145bf5250eSVikas Manocha jump_to_image_linux(&spl_image); 61588d57c08SJason Zhu #elif defined(CONFIG_SPL_KERNEL_BOOT) && !defined(CONFIG_ARM64) 61688d57c08SJason Zhu boot_jump_linux(&spl_image); 61747f7bcaeSTom Rini #endif 61888d57c08SJason Zhu break; 61947f7bcaeSTom Rini default: 62042120981STom Rini debug("Unsupported OS image.. Jumping nevertheless..\n"); 62147f7bcaeSTom Rini } 622f1896c45SAndy Yan #if CONFIG_VAL(SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE) 623fb4f5e7cSSimon Glass debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr, 624fb4f5e7cSSimon Glass gd->malloc_ptr / 1024); 625fb4f5e7cSSimon Glass #endif 626099855e2SKever Yang 627099855e2SKever Yang debug("loaded - jumping to U-Boot...\n"); 628b7b8d0a6SKever Yang #ifdef CONFIG_BOOTSTAGE_STASH 629b7b8d0a6SKever Yang int ret; 630b7b8d0a6SKever Yang 631b7b8d0a6SKever Yang bootstage_mark_name(BOOTSTAGE_ID_END_SPL, "end_spl"); 632b7b8d0a6SKever Yang ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR, 633b7b8d0a6SKever Yang CONFIG_BOOTSTAGE_STASH_SIZE); 634b7b8d0a6SKever Yang if (ret) 635b7b8d0a6SKever Yang debug("Failed to stash bootstage: err=%d\n", ret); 636b7b8d0a6SKever Yang #endif 637fb4f5e7cSSimon Glass 6389732565dSJoseph Chen printf("Jumping to U-Boot(0x%08lx)\n", spl_image.entry_point); 6393a3b9147SMichal Simek spl_board_prepare_for_boot(); 640a759f1e0SAllen Martin jump_to_image_no_args(&spl_image); 64147f7bcaeSTom Rini } 64247f7bcaeSTom Rini 6436507f133STom Rini /* 6446507f133STom Rini * This requires UART clocks to be enabled. In order for this to work the 6456507f133STom Rini * caller must ensure that the gd pointer is valid. 6466507f133STom Rini */ 64747f7bcaeSTom Rini void preloader_console_init(void) 64847f7bcaeSTom Rini { 64947f7bcaeSTom Rini gd->baudrate = CONFIG_BAUDRATE; 65047f7bcaeSTom Rini 65147f7bcaeSTom Rini serial_init(); /* serial communications setup */ 65247f7bcaeSTom Rini 65347f7bcaeSTom Rini gd->have_console = 1; 65447f7bcaeSTom Rini 65547f7bcaeSTom Rini puts("\nU-Boot SPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \ 65647f7bcaeSTom Rini U_BOOT_TIME ")\n"); 65747f7bcaeSTom Rini #ifdef CONFIG_SPL_DISPLAY_PRINT 65847f7bcaeSTom Rini spl_display_print(); 65947f7bcaeSTom Rini #endif 66047f7bcaeSTom Rini } 661db910353SSimon Glass 662db910353SSimon Glass /** 663db910353SSimon Glass * spl_relocate_stack_gd() - Relocate stack ready for board_init_r() execution 664db910353SSimon Glass * 665db910353SSimon Glass * Sometimes board_init_f() runs with a stack in SRAM but we want to use SDRAM 666db910353SSimon Glass * for the main board_init_r() execution. This is typically because we need 667db910353SSimon Glass * more stack space for things like the MMC sub-system. 668db910353SSimon Glass * 669db910353SSimon Glass * This function calculates the stack position, copies the global_data into 670adc421e4SAlbert ARIBAUD * place, sets the new gd (except for ARM, for which setting GD within a C 671adc421e4SAlbert ARIBAUD * function may not always work) and returns the new stack position. The 672adc421e4SAlbert ARIBAUD * caller is responsible for setting up the sp register and, in the case 673adc421e4SAlbert ARIBAUD * of ARM, setting up gd. 674adc421e4SAlbert ARIBAUD * 675adc421e4SAlbert ARIBAUD * All of this is done using the same layout and alignments as done in 676adc421e4SAlbert ARIBAUD * board_init_f_init_reserve() / board_init_f_alloc_reserve(). 677db910353SSimon Glass * 678db910353SSimon Glass * @return new stack location, or 0 to use the same stack 679db910353SSimon Glass */ 680db910353SSimon Glass ulong spl_relocate_stack_gd(void) 681db910353SSimon Glass { 682db910353SSimon Glass #ifdef CONFIG_SPL_STACK_R 683db910353SSimon Glass gd_t *new_gd; 684adc421e4SAlbert ARIBAUD ulong ptr = CONFIG_SPL_STACK_R_ADDR; 685db910353SSimon Glass 686ae2cee2eSPhilipp Tomsich #if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_VAL(SYS_MALLOC_F_LEN) 687dcfcb8d4SHans de Goede if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) { 688dcfcb8d4SHans de Goede ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; 689dcfcb8d4SHans de Goede gd->malloc_base = ptr; 690dcfcb8d4SHans de Goede gd->malloc_limit = CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; 691dcfcb8d4SHans de Goede gd->malloc_ptr = 0; 692dcfcb8d4SHans de Goede } 693dcfcb8d4SHans de Goede #endif 694adc421e4SAlbert ARIBAUD /* Get stack position: use 8-byte alignment for ABI compliance */ 695adc421e4SAlbert ARIBAUD ptr = CONFIG_SPL_STACK_R_ADDR - roundup(sizeof(gd_t),16); 696adc421e4SAlbert ARIBAUD new_gd = (gd_t *)ptr; 697adc421e4SAlbert ARIBAUD memcpy(new_gd, (void *)gd, sizeof(gd_t)); 6982f11cd91SSimon Glass #if CONFIG_IS_ENABLED(DM) 6992f11cd91SSimon Glass dm_fixup_for_gd_move(new_gd); 7002f11cd91SSimon Glass #endif 701adc421e4SAlbert ARIBAUD #if !defined(CONFIG_ARM) 702adc421e4SAlbert ARIBAUD gd = new_gd; 703adc421e4SAlbert ARIBAUD #endif 704db910353SSimon Glass return ptr; 705db910353SSimon Glass #else 706db910353SSimon Glass return 0; 707db910353SSimon Glass #endif 708db910353SSimon Glass } 709f8ca9d16SJoseph Chen 710f8ca9d16SJoseph Chen /* cleanup before jump to next stage */ 711f8ca9d16SJoseph Chen void spl_cleanup_before_jump(struct spl_image_info *spl_image) 712f8ca9d16SJoseph Chen { 713*de8fdf50SJoseph Chen ulong us, tt_us; 71445d851f4SJoseph Chen 715f8ca9d16SJoseph Chen spl_board_prepare_for_jump(spl_image); 716f8ca9d16SJoseph Chen 717f8ca9d16SJoseph Chen disable_interrupts(); 718f8ca9d16SJoseph Chen 719617c1becSJoseph Chen #ifdef CONFIG_ARM64 720617c1becSJoseph Chen disable_serror(); 721617c1becSJoseph Chen #else 722617c1becSJoseph Chen disable_async_abort(); 723617c1becSJoseph Chen #endif 724f8ca9d16SJoseph Chen /* 725f8ca9d16SJoseph Chen * Turn off I-cache and invalidate it 726f8ca9d16SJoseph Chen */ 727f8ca9d16SJoseph Chen icache_disable(); 728f8ca9d16SJoseph Chen invalidate_icache_all(); 729f8ca9d16SJoseph Chen 730f8ca9d16SJoseph Chen /* 731f8ca9d16SJoseph Chen * Turn off D-cache 732f8ca9d16SJoseph Chen * dcache_disable() in turn flushes the d-cache and disables MMU 733f8ca9d16SJoseph Chen */ 734f8ca9d16SJoseph Chen dcache_disable(); 735f8ca9d16SJoseph Chen invalidate_dcache_all(); 736f8ca9d16SJoseph Chen 737f8ca9d16SJoseph Chen dsb(); 738f8ca9d16SJoseph Chen isb(); 73945d851f4SJoseph Chen 74045d851f4SJoseph Chen us = (get_ticks() - gd->sys_start_tick) / 24UL; 741*de8fdf50SJoseph Chen tt_us = get_ticks() / (COUNTER_FREQUENCY / 1000000); 742*de8fdf50SJoseph Chen printf("Total: %ld.%ld/%ld.%ld ms\n\n", us / 1000, us % 1000, tt_us / 1000, tt_us % 1000); 743f8ca9d16SJoseph Chen } 744