xref: /rk3399_rockchip-uboot/common/spl/spl.c (revision d41e543aa631e97f99616cd7a55a97e2d719cd0b)
147f7bcaeSTom Rini /*
247f7bcaeSTom Rini  * (C) Copyright 2010
347f7bcaeSTom Rini  * Texas Instruments, <www.ti.com>
447f7bcaeSTom Rini  *
547f7bcaeSTom Rini  * Aneesh V <aneesh@ti.com>
647f7bcaeSTom Rini  *
71a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
847f7bcaeSTom Rini  */
9f1c6e192SPhilipp Tomsich 
1047f7bcaeSTom Rini #include <common.h>
1111516518SSimon Glass #include <dm.h>
1247f7bcaeSTom Rini #include <spl.h>
13dced428bSAndy Yan #include <asm/sections.h>
1447f7bcaeSTom Rini #include <asm/u-boot.h>
1547f7bcaeSTom Rini #include <nand.h>
1647f7bcaeSTom Rini #include <fat.h>
1747f7bcaeSTom Rini #include <version.h>
1847f7bcaeSTom Rini #include <image.h>
1947f7bcaeSTom Rini #include <malloc.h>
2011516518SSimon Glass #include <dm/root.h>
2147f7bcaeSTom Rini #include <linux/compiler.h>
226e7585bbSB, Ravi #include <fdt_support.h>
2347f7bcaeSTom Rini 
2447f7bcaeSTom Rini DECLARE_GLOBAL_DATA_PTR;
2547f7bcaeSTom Rini 
263c6f8a0dSStefan Roese #ifndef CONFIG_SYS_UBOOT_START
273c6f8a0dSStefan Roese #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
283c6f8a0dSStefan Roese #endif
29ae83d882SStefano Babic #ifndef CONFIG_SYS_MONITOR_LEN
30e76caa62SAndreas Bießmann /* Unknown U-Boot size, let's assume it will not be more than 200 KB */
31ae83d882SStefano Babic #define CONFIG_SYS_MONITOR_LEN	(200 * 1024)
32ae83d882SStefano Babic #endif
33ae83d882SStefano Babic 
3447f7bcaeSTom Rini u32 *boot_params_ptr = NULL;
3547f7bcaeSTom Rini 
366507f133STom Rini /* Define board data structure */
3747f7bcaeSTom Rini static bd_t bdata __attribute__ ((section(".data")));
3847f7bcaeSTom Rini 
3947f7bcaeSTom Rini /*
40496c5483SHeiko Schocher  * Board-specific Platform code can reimplement show_boot_progress () if needed
41496c5483SHeiko Schocher  */
42496c5483SHeiko Schocher __weak void show_boot_progress(int val) {}
43496c5483SHeiko Schocher 
44496c5483SHeiko Schocher /*
4547f7bcaeSTom Rini  * Default function to determine if u-boot or the OS should
4647f7bcaeSTom Rini  * be started. This implementation always returns 1.
4747f7bcaeSTom Rini  *
4847f7bcaeSTom Rini  * Please implement your own board specific funcion to do this.
4947f7bcaeSTom Rini  *
5047f7bcaeSTom Rini  * RETURN
5147f7bcaeSTom Rini  * 0 to not start u-boot
5247f7bcaeSTom Rini  * positive if u-boot should start
5347f7bcaeSTom Rini  */
5447f7bcaeSTom Rini #ifdef CONFIG_SPL_OS_BOOT
5547f7bcaeSTom Rini __weak int spl_start_uboot(void)
5647f7bcaeSTom Rini {
5747f7bcaeSTom Rini 	puts("SPL: Please implement spl_start_uboot() for your board\n");
5847f7bcaeSTom Rini 	puts("SPL: Direct Linux boot not active!\n");
5947f7bcaeSTom Rini 	return 1;
6047f7bcaeSTom Rini }
61431889d6SLadislav Michl 
626e7585bbSB, Ravi /* weak default platform specific function to initialize
636e7585bbSB, Ravi  * dram banks
646e7585bbSB, Ravi  */
656e7585bbSB, Ravi __weak int dram_init_banksize(void)
666e7585bbSB, Ravi {
676e7585bbSB, Ravi 	return 0;
686e7585bbSB, Ravi }
696e7585bbSB, Ravi 
70431889d6SLadislav Michl /*
71431889d6SLadislav Michl  * Weak default function for arch specific zImage check. Return zero
72431889d6SLadislav Michl  * and fill start and end address if image is recognized.
73431889d6SLadislav Michl  */
74431889d6SLadislav Michl int __weak bootz_setup(ulong image, ulong *start, ulong *end)
75431889d6SLadislav Michl {
76431889d6SLadislav Michl 	 return 1;
77431889d6SLadislav Michl }
7847f7bcaeSTom Rini #endif
7947f7bcaeSTom Rini 
806f678d2aSJason Zhu /* Weak default function for arch/board-specific fixups to the spl_image_info */
816f678d2aSJason Zhu void __weak spl_perform_fixups(struct spl_image_info *spl_image)
826f678d2aSJason Zhu {
836f678d2aSJason Zhu }
846f678d2aSJason Zhu 
85e8b9592fSJason Zhu /* Get the next stage process */
86*d41e543aSJoseph Chen __weak void spl_next_stage(struct spl_image_info *spl)
87*d41e543aSJoseph Chen {
88*d41e543aSJoseph Chen 	spl->next_stage = SPL_NEXT_STAGE_UBOOT;
89*d41e543aSJoseph Chen }
90e8b9592fSJason Zhu 
91f8ca9d16SJoseph Chen /* Weak default function for arch/board-specific preppare before jumping */
92f8ca9d16SJoseph Chen int __weak spl_board_prepare_for_jump(struct spl_image_info *spl_image)
93f8ca9d16SJoseph Chen {
94f8ca9d16SJoseph Chen 	return 0;
95f8ca9d16SJoseph Chen }
96f8ca9d16SJoseph Chen 
976e7585bbSB, Ravi void spl_fixup_fdt(void)
986e7585bbSB, Ravi {
996e7585bbSB, Ravi #if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR)
1006e7585bbSB, Ravi 	void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
1016e7585bbSB, Ravi 	int err;
1026e7585bbSB, Ravi 
1036e7585bbSB, Ravi 	err = fdt_check_header(fdt_blob);
1046e7585bbSB, Ravi 	if (err < 0) {
1056e7585bbSB, Ravi 		printf("fdt_root: %s\n", fdt_strerror(err));
1066e7585bbSB, Ravi 		return;
1076e7585bbSB, Ravi 	}
1086e7585bbSB, Ravi 
1096e7585bbSB, Ravi 	/* fixup the memory dt node */
1106e7585bbSB, Ravi 	err = fdt_shrink_to_minimum(fdt_blob, 0);
1116e7585bbSB, Ravi 	if (err == 0) {
1126e7585bbSB, Ravi 		printf("spl: fdt_shrink_to_minimum err - %d\n", err);
1136e7585bbSB, Ravi 		return;
1146e7585bbSB, Ravi 	}
1156e7585bbSB, Ravi 
1166e7585bbSB, Ravi 	err = arch_fixup_fdt(fdt_blob);
1176e7585bbSB, Ravi 	if (err) {
1186e7585bbSB, Ravi 		printf("spl: arch_fixup_fdt err - %d\n", err);
1196e7585bbSB, Ravi 		return;
1206e7585bbSB, Ravi 	}
1216e7585bbSB, Ravi #endif
1226e7585bbSB, Ravi }
1236e7585bbSB, Ravi 
124ea8256f0SStefan Roese /*
125ea8256f0SStefan Roese  * Weak default function for board specific cleanup/preparation before
126ea8256f0SStefan Roese  * Linux boot. Some boards/platforms might not need it, so just provide
127ea8256f0SStefan Roese  * an empty stub here.
128ea8256f0SStefan Roese  */
129ea8256f0SStefan Roese __weak void spl_board_prepare_for_linux(void)
130ea8256f0SStefan Roese {
131ea8256f0SStefan Roese 	/* Nothing to do! */
132ea8256f0SStefan Roese }
133ea8256f0SStefan Roese 
1343a3b9147SMichal Simek __weak void spl_board_prepare_for_boot(void)
1353a3b9147SMichal Simek {
1363a3b9147SMichal Simek 	/* Nothing to do! */
1373a3b9147SMichal Simek }
1383a3b9147SMichal Simek 
139d95ceb97SSimon Glass void spl_set_header_raw_uboot(struct spl_image_info *spl_image)
1400c3117b1SHeiko Schocher {
141d95ceb97SSimon Glass 	spl_image->size = CONFIG_SYS_MONITOR_LEN;
142d95ceb97SSimon Glass 	spl_image->entry_point = CONFIG_SYS_UBOOT_START;
143d95ceb97SSimon Glass 	spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
144d95ceb97SSimon Glass 	spl_image->os = IH_OS_U_BOOT;
145d95ceb97SSimon Glass 	spl_image->name = "U-Boot";
1460c3117b1SHeiko Schocher }
1470c3117b1SHeiko Schocher 
14871316c1dSSimon Glass int spl_parse_image_header(struct spl_image_info *spl_image,
14971316c1dSSimon Glass 			   const struct image_header *header)
15047f7bcaeSTom Rini {
151722a6b17SAndrew F. Davis 	if (image_get_magic(header) == IH_MAGIC) {
152722a6b17SAndrew F. Davis #ifdef CONFIG_SPL_LEGACY_IMAGE_SUPPORT
15347f7bcaeSTom Rini 		u32 header_size = sizeof(struct image_header);
15447f7bcaeSTom Rini 
15571316c1dSSimon Glass 		if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY) {
156022b4975SStefan Roese 			/*
157022b4975SStefan Roese 			 * On some system (e.g. powerpc), the load-address and
158022b4975SStefan Roese 			 * entry-point is located at address 0. We can't load
159022b4975SStefan Roese 			 * to 0-0x40. So skip header in this case.
160022b4975SStefan Roese 			 */
16171316c1dSSimon Glass 			spl_image->load_addr = image_get_load(header);
16271316c1dSSimon Glass 			spl_image->entry_point = image_get_ep(header);
16371316c1dSSimon Glass 			spl_image->size = image_get_data_size(header);
164022b4975SStefan Roese 		} else {
16571316c1dSSimon Glass 			spl_image->entry_point = image_get_load(header);
16647f7bcaeSTom Rini 			/* Load including the header */
16771316c1dSSimon Glass 			spl_image->load_addr = spl_image->entry_point -
168022b4975SStefan Roese 				header_size;
16971316c1dSSimon Glass 			spl_image->size = image_get_data_size(header) +
170022b4975SStefan Roese 				header_size;
171022b4975SStefan Roese 		}
17271316c1dSSimon Glass 		spl_image->os = image_get_os(header);
17371316c1dSSimon Glass 		spl_image->name = image_get_name(header);
17411e1479bSAndre Przywara 		debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n",
17575ee777bSAndré Draszik 			IH_NMLEN, spl_image->name,
17671316c1dSSimon Glass 			spl_image->load_addr, spl_image->size);
177722a6b17SAndrew F. Davis #else
178722a6b17SAndrew F. Davis 		/* LEGACY image not supported */
1797a001d4fSAnatolij Gustschin 		debug("Legacy boot image support not enabled, proceeding to other boot methods\n");
180722a6b17SAndrew F. Davis 		return -EINVAL;
181722a6b17SAndrew F. Davis #endif
18247f7bcaeSTom Rini 	} else {
1838c80eb3bSAlbert ARIBAUD \(3ADEV\) #ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE
1848c80eb3bSAlbert ARIBAUD \(3ADEV\) 		/*
1858c80eb3bSAlbert ARIBAUD \(3ADEV\) 		 * CONFIG_SPL_PANIC_ON_RAW_IMAGE is defined when the
1868c80eb3bSAlbert ARIBAUD \(3ADEV\) 		 * code which loads images in SPL cannot guarantee that
1878c80eb3bSAlbert ARIBAUD \(3ADEV\) 		 * absolutely all read errors will be reported.
1888c80eb3bSAlbert ARIBAUD \(3ADEV\) 		 * An example is the LPC32XX MLC NAND driver, which
1898c80eb3bSAlbert ARIBAUD \(3ADEV\) 		 * will consider that a completely unreadable NAND block
1908c80eb3bSAlbert ARIBAUD \(3ADEV\) 		 * is bad, and thus should be skipped silently.
1918c80eb3bSAlbert ARIBAUD \(3ADEV\) 		 */
1928c80eb3bSAlbert ARIBAUD \(3ADEV\) 		panic("** no mkimage signature but raw image not supported");
19385a37729SPaul Kocialkowski #endif
19485a37729SPaul Kocialkowski 
195431889d6SLadislav Michl #ifdef CONFIG_SPL_OS_BOOT
196431889d6SLadislav Michl 		ulong start, end;
197431889d6SLadislav Michl 
198431889d6SLadislav Michl 		if (!bootz_setup((ulong)header, &start, &end)) {
19971316c1dSSimon Glass 			spl_image->name = "Linux";
20071316c1dSSimon Glass 			spl_image->os = IH_OS_LINUX;
20171316c1dSSimon Glass 			spl_image->load_addr = CONFIG_SYS_LOAD_ADDR;
20271316c1dSSimon Glass 			spl_image->entry_point = CONFIG_SYS_LOAD_ADDR;
20371316c1dSSimon Glass 			spl_image->size = end - start;
20411e1479bSAndre Przywara 			debug("spl: payload zImage, load addr: 0x%lx size: %d\n",
20571316c1dSSimon Glass 			      spl_image->load_addr, spl_image->size);
206431889d6SLadislav Michl 			return 0;
207431889d6SLadislav Michl 		}
208431889d6SLadislav Michl #endif
20985a37729SPaul Kocialkowski 
21024eb39b5SAndrew F. Davis #ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT
21147f7bcaeSTom Rini 		/* Signature not found - assume u-boot.bin */
21247f7bcaeSTom Rini 		debug("mkimage signature not found - ih_magic = %x\n",
21347f7bcaeSTom Rini 			header->ih_magic);
21471316c1dSSimon Glass 		spl_set_header_raw_uboot(spl_image);
21524eb39b5SAndrew F. Davis #else
21624eb39b5SAndrew F. Davis 		/* RAW image not supported, proceed to other boot methods. */
2177a001d4fSAnatolij Gustschin 		debug("Raw boot image support not enabled, proceeding to other boot methods\n");
21824eb39b5SAndrew F. Davis 		return -EINVAL;
2198c80eb3bSAlbert ARIBAUD \(3ADEV\) #endif
22047f7bcaeSTom Rini 	}
22124eb39b5SAndrew F. Davis 
2227e0f2267SMarek Vasut 	return 0;
22347f7bcaeSTom Rini }
22447f7bcaeSTom Rini 
225a759f1e0SAllen Martin __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
22647f7bcaeSTom Rini {
2274a0eb757SSRICHARAN R 	typedef void __noreturn (*image_entry_noargs_t)(void);
2284a0eb757SSRICHARAN R 
22947f7bcaeSTom Rini 	image_entry_noargs_t image_entry =
23011e1479bSAndre Przywara 		(image_entry_noargs_t)spl_image->entry_point;
23147f7bcaeSTom Rini 
23211e1479bSAndre Przywara 	debug("image entry point: 0x%lX\n", spl_image->entry_point);
2334a0eb757SSRICHARAN R 	image_entry();
23447f7bcaeSTom Rini }
23547f7bcaeSTom Rini 
236594e14a4SJoseph Chen /*
237594e14a4SJoseph Chen  * 64-bit: No special operation.
238594e14a4SJoseph Chen  *
239594e14a4SJoseph Chen  * 32-bit: Initial gd->bd->bi_dram[] to active dcache attr of memory.
240594e14a4SJoseph Chen  *	   Assuming 256MB is enough for SPL(MMU still maps 4GB size).
241594e14a4SJoseph Chen  */
242594e14a4SJoseph Chen #ifndef CONFIG_SPL_SYS_DCACHE_OFF
243594e14a4SJoseph Chen static int spl_dcache_enable(void)
244594e14a4SJoseph Chen {
245594e14a4SJoseph Chen 	bool free_bd = false;
246594e14a4SJoseph Chen 
247594e14a4SJoseph Chen #ifndef CONFIG_ARM64
248594e14a4SJoseph Chen 	if (!gd->bd) {
249594e14a4SJoseph Chen 		gd->bd = calloc(1, sizeof(bd_t));
250594e14a4SJoseph Chen 		if (!gd->bd) {
251594e14a4SJoseph Chen 			debug("spl: no bd_t memory\n");
252594e14a4SJoseph Chen 			return -ENOMEM;
253594e14a4SJoseph Chen 		}
254594e14a4SJoseph Chen 		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
255594e14a4SJoseph Chen 		gd->bd->bi_dram[0].size  = SZ_256M;
256594e14a4SJoseph Chen 		free_bd = true;
257594e14a4SJoseph Chen 	}
258594e14a4SJoseph Chen #endif
259db9b4c53SJason Zhu 	/* TLB memory should be SZ_16K base align and 4KB end align */
260594e14a4SJoseph Chen 	gd->arch.tlb_size = PGTABLE_SIZE;
261db9b4c53SJason Zhu 	gd->arch.tlb_addr = (ulong)memalign(SZ_16K, ALIGN(PGTABLE_SIZE, SZ_4K));
262594e14a4SJoseph Chen 	if (!gd->arch.tlb_addr) {
263594e14a4SJoseph Chen 		debug("spl: no TLB memory\n");
264594e14a4SJoseph Chen 		return -ENOMEM;
265594e14a4SJoseph Chen 	}
266594e14a4SJoseph Chen 
267594e14a4SJoseph Chen 	dcache_enable();
268594e14a4SJoseph Chen 	if (free_bd)
269594e14a4SJoseph Chen 		free(gd->bd);
270594e14a4SJoseph Chen 
271594e14a4SJoseph Chen 	return 0;
272594e14a4SJoseph Chen }
273594e14a4SJoseph Chen #endif
274594e14a4SJoseph Chen 
275340f418aSEddie Cai static int spl_common_init(bool setup_malloc)
27647f7bcaeSTom Rini {
277f3d46bd6SSimon Glass 	int ret;
278f3d46bd6SSimon Glass 
279340f418aSEddie Cai 	debug("spl_early_init()\n");
280340f418aSEddie Cai 
281f1896c45SAndy Yan #if CONFIG_VAL(SYS_MALLOC_F_LEN)
282340f418aSEddie Cai 	if (setup_malloc) {
28394b9e22eSMarek Vasut #ifdef CONFIG_MALLOC_F_ADDR
28494b9e22eSMarek Vasut 		gd->malloc_base = CONFIG_MALLOC_F_ADDR;
28594b9e22eSMarek Vasut #endif
286f1896c45SAndy Yan 		gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN);
287fb4f5e7cSSimon Glass 		gd->malloc_ptr = 0;
288340f418aSEddie Cai 	}
28947f7bcaeSTom Rini #endif
2901481bafeSJoseph Chen 
2911481bafeSJoseph Chen 	/*
2921481bafeSJoseph Chen 	 * setup D-cache as early as possible after malloc setup
2931481bafeSJoseph Chen 	 * I-cache has been setup at early assembly code by default.
2941481bafeSJoseph Chen 	 */
295594e14a4SJoseph Chen #ifndef CONFIG_SPL_SYS_DCACHE_OFF
296594e14a4SJoseph Chen 	ret = spl_dcache_enable();
297594e14a4SJoseph Chen 	if (ret) {
298594e14a4SJoseph Chen 		debug("spl_dcache_enable() return error %d\n", ret);
299594e14a4SJoseph Chen 		return ret;
300594e14a4SJoseph Chen 	}
3011481bafeSJoseph Chen #endif
302824bb1b4SSimon Glass 	ret = bootstage_init(true);
303824bb1b4SSimon Glass 	if (ret) {
304824bb1b4SSimon Glass 		debug("%s: Failed to set up bootstage: ret=%d\n", __func__,
305824bb1b4SSimon Glass 		      ret);
306824bb1b4SSimon Glass 		return ret;
307824bb1b4SSimon Glass 	}
308824bb1b4SSimon Glass 	bootstage_mark_name(BOOTSTAGE_ID_START_SPL, "spl");
309d223e0a8SSimon Glass 	if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) {
310f3d46bd6SSimon Glass 		ret = fdtdec_setup();
311f3d46bd6SSimon Glass 		if (ret) {
312f3d46bd6SSimon Glass 			debug("fdtdec_setup() returned error %d\n", ret);
313070d00b8SSimon Glass 			return ret;
314f3d46bd6SSimon Glass 		}
315f3d46bd6SSimon Glass 	}
316f1c6e192SPhilipp Tomsich 	if (CONFIG_IS_ENABLED(DM)) {
317824bb1b4SSimon Glass 		bootstage_start(BOOTSTATE_ID_ACCUM_DM_SPL, "dm_spl");
3187f73ca48STom Rini 		/* With CONFIG_SPL_OF_PLATDATA, bring in all devices */
3197d23b9cfSSimon Glass 		ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA));
320824bb1b4SSimon Glass 		bootstage_accum(BOOTSTATE_ID_ACCUM_DM_SPL);
321f3d46bd6SSimon Glass 		if (ret) {
322f3d46bd6SSimon Glass 			debug("dm_init_and_scan() returned error %d\n", ret);
323070d00b8SSimon Glass 			return ret;
324f3d46bd6SSimon Glass 		}
325f3d46bd6SSimon Glass 	}
326340f418aSEddie Cai 
327340f418aSEddie Cai 	return 0;
328340f418aSEddie Cai }
329340f418aSEddie Cai 
330dced428bSAndy Yan #if !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD)
331dced428bSAndy Yan static void spl_setup_relocate(void)
332dced428bSAndy Yan {
333dced428bSAndy Yan 	gd->relocaddr = CONFIG_SPL_RELOC_TEXT_BASE;
334dced428bSAndy Yan 	gd->new_gd = (gd_t *)gd;
335dced428bSAndy Yan 	gd->start_addr_sp = gd->relocaddr;
336dced428bSAndy Yan 	gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
337dced428bSAndy Yan 
338dced428bSAndy Yan 	gd->start_addr_sp -= gd->fdt_size;
339dced428bSAndy Yan 	gd->new_fdt = (void *)gd->start_addr_sp;
340dced428bSAndy Yan 	memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
341dced428bSAndy Yan 	gd->fdt_blob = gd->new_fdt;
342dced428bSAndy Yan 
343dced428bSAndy Yan 	gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
344dced428bSAndy Yan }
345dced428bSAndy Yan #else
346dced428bSAndy Yan static void spl_setup_relocate(void)
347dced428bSAndy Yan {
348dced428bSAndy Yan 
349dced428bSAndy Yan }
350dced428bSAndy Yan #endif
351dced428bSAndy Yan 
3524f443bd2SYork Sun void spl_set_bd(void)
3534f443bd2SYork Sun {
3544f443bd2SYork Sun 	if (!gd->bd)
3554f443bd2SYork Sun 		gd->bd = &bdata;
3564f443bd2SYork Sun }
3574f443bd2SYork Sun 
358340f418aSEddie Cai int spl_early_init(void)
359340f418aSEddie Cai {
360340f418aSEddie Cai 	int ret;
361340f418aSEddie Cai 
362340f418aSEddie Cai 	ret = spl_common_init(true);
363340f418aSEddie Cai 	if (ret)
364340f418aSEddie Cai 		return ret;
365340f418aSEddie Cai 	gd->flags |= GD_FLG_SPL_EARLY_INIT;
366340f418aSEddie Cai 
367dced428bSAndy Yan 	spl_setup_relocate();
368dced428bSAndy Yan 
369340f418aSEddie Cai 	return 0;
370340f418aSEddie Cai }
371340f418aSEddie Cai 
372340f418aSEddie Cai int spl_init(void)
373340f418aSEddie Cai {
374340f418aSEddie Cai 	int ret;
375cf334edfSTom Rini 	bool setup_malloc = !(IS_ENABLED(CONFIG_SPL_STACK_R) &&
376cf334edfSTom Rini 			IS_ENABLED(CONFIG_SPL_SYS_MALLOC_SIMPLE));
377340f418aSEddie Cai 
378340f418aSEddie Cai 	if (!(gd->flags & GD_FLG_SPL_EARLY_INIT)) {
379cf334edfSTom Rini 		ret = spl_common_init(setup_malloc);
380340f418aSEddie Cai 		if (ret)
381340f418aSEddie Cai 			return ret;
382340f418aSEddie Cai 	}
383070d00b8SSimon Glass 	gd->flags |= GD_FLG_SPL_INIT;
384070d00b8SSimon Glass 
385070d00b8SSimon Glass 	return 0;
386070d00b8SSimon Glass }
38747f7bcaeSTom Rini 
388f101e4bdSNikita Kiryanov #ifndef BOOT_DEVICE_NONE
389f101e4bdSNikita Kiryanov #define BOOT_DEVICE_NONE 0xdeadbeef
390f101e4bdSNikita Kiryanov #endif
391f101e4bdSNikita Kiryanov 
392f101e4bdSNikita Kiryanov __weak void board_boot_order(u32 *spl_boot_list)
393f101e4bdSNikita Kiryanov {
394f101e4bdSNikita Kiryanov 	spl_boot_list[0] = spl_boot_device();
395f101e4bdSNikita Kiryanov }
396f101e4bdSNikita Kiryanov 
397a0a80290SSimon Glass static struct spl_image_loader *spl_ll_find_loader(uint boot_device)
398a0a80290SSimon Glass {
399a0a80290SSimon Glass 	struct spl_image_loader *drv =
400a0a80290SSimon Glass 		ll_entry_start(struct spl_image_loader, spl_image_loader);
401a0a80290SSimon Glass 	const int n_ents =
402a0a80290SSimon Glass 		ll_entry_count(struct spl_image_loader, spl_image_loader);
403a0a80290SSimon Glass 	struct spl_image_loader *entry;
404a0a80290SSimon Glass 
405a0a80290SSimon Glass 	for (entry = drv; entry != drv + n_ents; entry++) {
406a0a80290SSimon Glass 		if (boot_device == entry->boot_device)
407a0a80290SSimon Glass 			return entry;
408a0a80290SSimon Glass 	}
409a0a80290SSimon Glass 
410a0a80290SSimon Glass 	/* Not found */
411a0a80290SSimon Glass 	return NULL;
412a0a80290SSimon Glass }
413a0a80290SSimon Glass 
41429d357d7SSimon Glass static int spl_load_image(struct spl_image_info *spl_image,
41529d357d7SSimon Glass 			  struct spl_image_loader *loader)
4165211b87eSNikita Kiryanov {
417ecdfd69aSSimon Glass 	struct spl_boot_device bootdev;
418ecdfd69aSSimon Glass 
41929d357d7SSimon Glass 	bootdev.boot_device = loader->boot_device;
420ecdfd69aSSimon Glass 	bootdev.boot_device_name = NULL;
421ecdfd69aSSimon Glass 
422540bfe7dSSimon Glass 	return loader->load_image(spl_image, &bootdev);
423540bfe7dSSimon Glass }
424540bfe7dSSimon Glass 
425540bfe7dSSimon Glass /**
426540bfe7dSSimon Glass  * boot_from_devices() - Try loading an booting U-Boot from a list of devices
427540bfe7dSSimon Glass  *
428540bfe7dSSimon Glass  * @spl_image: Place to put the image details if successful
429540bfe7dSSimon Glass  * @spl_boot_list: List of boot devices to try
430540bfe7dSSimon Glass  * @count: Number of elements in spl_boot_list
431540bfe7dSSimon Glass  * @return 0 if OK, -ve on error
432540bfe7dSSimon Glass  */
433540bfe7dSSimon Glass static int boot_from_devices(struct spl_image_info *spl_image,
434540bfe7dSSimon Glass 			     u32 spl_boot_list[], int count)
435540bfe7dSSimon Glass {
436540bfe7dSSimon Glass 	int i;
437540bfe7dSSimon Glass 
438540bfe7dSSimon Glass 	for (i = 0; i < count && spl_boot_list[i] != BOOT_DEVICE_NONE; i++) {
439540bfe7dSSimon Glass 		struct spl_image_loader *loader;
440540bfe7dSSimon Glass 
441540bfe7dSSimon Glass 		loader = spl_ll_find_loader(spl_boot_list[i]);
4425211b87eSNikita Kiryanov #if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
4432acf35dbSSimon Glass 		if (loader)
444cf947da1SAndrew F. Davis 			printf("Trying to boot from %s\n", loader->name);
4452acf35dbSSimon Glass 		else
4465211b87eSNikita Kiryanov 			puts("SPL: Unsupported Boot Device!\n");
4475211b87eSNikita Kiryanov #endif
4486f678d2aSJason Zhu 		if (loader && !spl_load_image(spl_image, loader)) {
4496f678d2aSJason Zhu 			spl_image->boot_device = spl_boot_list[i];
450540bfe7dSSimon Glass 			return 0;
451540bfe7dSSimon Glass 		}
4526f678d2aSJason Zhu 	}
453540bfe7dSSimon Glass 
4545211b87eSNikita Kiryanov 	return -ENODEV;
4555211b87eSNikita Kiryanov }
4565211b87eSNikita Kiryanov 
457dced428bSAndy Yan #if defined(CONFIG_DM) && !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD)
458dced428bSAndy Yan static int spl_initr_dm(void)
459dced428bSAndy Yan {
460dced428bSAndy Yan 	int ret;
461dced428bSAndy Yan 
462dced428bSAndy Yan 	/* Save the pre-reloc driver model and start a new one */
463dced428bSAndy Yan 	gd->dm_root_f = gd->dm_root;
464dced428bSAndy Yan 	gd->dm_root = NULL;
465dced428bSAndy Yan 	bootstage_start(BOOTSTATE_ID_ACCUM_DM_R, "dm_r");
466dced428bSAndy Yan 	ret = dm_init_and_scan(false);
467dced428bSAndy Yan 	bootstage_accum(BOOTSTATE_ID_ACCUM_DM_R);
468dced428bSAndy Yan 	if (ret)
469dced428bSAndy Yan 		return ret;
470dced428bSAndy Yan 
471dced428bSAndy Yan #if defined(CONFIG_TIMER)
472dced428bSAndy Yan 	gd->timer = NULL;
473dced428bSAndy Yan #endif
474dced428bSAndy Yan 	serial_init();
475dced428bSAndy Yan 
476dced428bSAndy Yan 	return 0;
477dced428bSAndy Yan }
478dced428bSAndy Yan #else
479dced428bSAndy Yan static int spl_initr_dm(void)
480dced428bSAndy Yan {
481dced428bSAndy Yan 	return 0;
482dced428bSAndy Yan }
483dced428bSAndy Yan #endif
484dced428bSAndy Yan 
485070d00b8SSimon Glass void board_init_r(gd_t *dummy1, ulong dummy2)
486070d00b8SSimon Glass {
487d32b2d1cSSimon Glass 	u32 spl_boot_list[] = {
488d32b2d1cSSimon Glass 		BOOT_DEVICE_NONE,
489d32b2d1cSSimon Glass 		BOOT_DEVICE_NONE,
490d32b2d1cSSimon Glass 		BOOT_DEVICE_NONE,
491d32b2d1cSSimon Glass 		BOOT_DEVICE_NONE,
492d32b2d1cSSimon Glass 		BOOT_DEVICE_NONE,
493d32b2d1cSSimon Glass 	};
494d32b2d1cSSimon Glass 	struct spl_image_info spl_image;
495070d00b8SSimon Glass 
496070d00b8SSimon Glass 	debug(">>spl:board_init_r()\n");
4974f443bd2SYork Sun 
498dced428bSAndy Yan 	spl_initr_dm();
499dced428bSAndy Yan 
5004f443bd2SYork Sun 	spl_set_bd();
5014f443bd2SYork Sun 
5026e7585bbSB, Ravi #ifdef CONFIG_SPL_OS_BOOT
5036e7585bbSB, Ravi 	dram_init_banksize();
5046e7585bbSB, Ravi #endif
505070d00b8SSimon Glass 
506070d00b8SSimon Glass #if defined(CONFIG_SYS_SPL_MALLOC_START)
507070d00b8SSimon Glass 	mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
508070d00b8SSimon Glass 			CONFIG_SYS_SPL_MALLOC_SIZE);
509070d00b8SSimon Glass 	gd->flags |= GD_FLG_FULL_MALLOC_INIT;
510070d00b8SSimon Glass #endif
511070d00b8SSimon Glass 	if (!(gd->flags & GD_FLG_SPL_INIT)) {
512070d00b8SSimon Glass 		if (spl_init())
513070d00b8SSimon Glass 			hang();
514070d00b8SSimon Glass 	}
515f9d42d82SAnatolij Gustschin #if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6)
516ea8256f0SStefan Roese 	/*
517ea8256f0SStefan Roese 	 * timer_init() does not exist on PPC systems. The timer is initialized
518ea8256f0SStefan Roese 	 * and enabled (decrementer) in interrupt_init() here.
519ea8256f0SStefan Roese 	 */
5204063c77dSIlya Yanok 	timer_init();
521ea8256f0SStefan Roese #endif
5224063c77dSIlya Yanok 
52389c73a9cSKever Yang #if CONFIG_IS_ENABLED(BOARD_INIT)
52447f7bcaeSTom Rini 	spl_board_init();
52547f7bcaeSTom Rini #endif
52647f7bcaeSTom Rini 
527d32b2d1cSSimon Glass 	memset(&spl_image, '\0', sizeof(spl_image));
5281620aad4SJoseph Chen 
5291620aad4SJoseph Chen #if CONFIG_IS_ENABLED(ATF)
5301620aad4SJoseph Chen 	/*
5311620aad4SJoseph Chen 	 * Bl32 ep is optional, initial it as an invalid value.
5321620aad4SJoseph Chen 	 * BL33 ep is mandatory, but initial it as a default value is better.
5331620aad4SJoseph Chen 	 */
5341620aad4SJoseph Chen 	spl_image.entry_point_bl32 = -1;
5351620aad4SJoseph Chen 	spl_image.entry_point_bl33 = CONFIG_SYS_TEXT_BASE;
5361620aad4SJoseph Chen #endif
5371620aad4SJoseph Chen 
53856884861SJoseph Chen #if CONFIG_IS_ENABLED(OPTEE)
53956884861SJoseph Chen 	/* default address */
54056884861SJoseph Chen 	spl_image.entry_point_os = CONFIG_SYS_TEXT_BASE;
54156884861SJoseph Chen #endif
54256884861SJoseph Chen 
5435bf5250eSVikas Manocha #ifdef CONFIG_SYS_SPL_ARGS_ADDR
5445bf5250eSVikas Manocha 	spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
5455bf5250eSVikas Manocha #endif
5466f678d2aSJason Zhu 	spl_image.boot_device = BOOT_DEVICE_NONE;
547f101e4bdSNikita Kiryanov 	board_boot_order(spl_boot_list);
548e8b9592fSJason Zhu 	spl_next_stage(&spl_image);
549540bfe7dSSimon Glass 	if (boot_from_devices(&spl_image, spl_boot_list,
550540bfe7dSSimon Glass 			      ARRAY_SIZE(spl_boot_list))) {
551f101e4bdSNikita Kiryanov 		puts("SPL: failed to boot from all boot devices\n");
55236afd451SNikita Kiryanov 		hang();
553f101e4bdSNikita Kiryanov 	}
55447f7bcaeSTom Rini 
5556f678d2aSJason Zhu 	spl_perform_fixups(&spl_image);
5566f678d2aSJason Zhu 
5576bcdd66dSVikas Manocha #ifdef CONFIG_CPU_V7M
5586bcdd66dSVikas Manocha 	spl_image.entry_point |= 0x1;
5596bcdd66dSVikas Manocha #endif
56047f7bcaeSTom Rini 	switch (spl_image.os) {
56147f7bcaeSTom Rini 	case IH_OS_U_BOOT:
56247f7bcaeSTom Rini 		debug("Jumping to U-Boot\n");
56347f7bcaeSTom Rini 		break;
5642e15a11cSPhilipp Tomsich #if CONFIG_IS_ENABLED(ATF)
5652e15a11cSPhilipp Tomsich 	case IH_OS_ARM_TRUSTED_FIRMWARE:
566dfcfb4f4SJoseph Chen 		printf("Jumping to U-Boot via ARM Trusted Firmware\n\n");
5672e15a11cSPhilipp Tomsich 		spl_invoke_atf(&spl_image);
5682e15a11cSPhilipp Tomsich 		break;
5692e15a11cSPhilipp Tomsich #endif
570099855e2SKever Yang #if CONFIG_IS_ENABLED(OPTEE)
571099855e2SKever Yang 	case IH_OS_OP_TEE:
57230ef03ebSJoseph Chen 		printf("Jumping to U-Boot(0x%08lx) via OP-TEE(0x%08lx)\n\n",
57330ef03ebSJoseph Chen 		       (ulong)spl_image.entry_point_os,
57430ef03ebSJoseph Chen 		       (ulong)spl_image.entry_point);
575f8ca9d16SJoseph Chen 		spl_cleanup_before_jump(&spl_image);
576605bf846SJason Zhu 		spl_optee_entry(NULL, (void *)spl_image.entry_point_os,
577605bf846SJason Zhu 				(void *)spl_image.fdt_addr,
578099855e2SKever Yang 				(void *)spl_image.entry_point);
579099855e2SKever Yang 		break;
580099855e2SKever Yang #endif
58147f7bcaeSTom Rini #ifdef CONFIG_SPL_OS_BOOT
58247f7bcaeSTom Rini 	case IH_OS_LINUX:
58347f7bcaeSTom Rini 		debug("Jumping to Linux\n");
5846e7585bbSB, Ravi 		spl_fixup_fdt();
58547f7bcaeSTom Rini 		spl_board_prepare_for_linux();
5865bf5250eSVikas Manocha 		jump_to_image_linux(&spl_image);
58747f7bcaeSTom Rini #endif
58847f7bcaeSTom Rini 	default:
58942120981STom Rini 		debug("Unsupported OS image.. Jumping nevertheless..\n");
59047f7bcaeSTom Rini 	}
591f1896c45SAndy Yan #if CONFIG_VAL(SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE)
592fb4f5e7cSSimon Glass 	debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
593fb4f5e7cSSimon Glass 	      gd->malloc_ptr / 1024);
594fb4f5e7cSSimon Glass #endif
595099855e2SKever Yang 
596099855e2SKever Yang 	debug("loaded - jumping to U-Boot...\n");
597b7b8d0a6SKever Yang #ifdef CONFIG_BOOTSTAGE_STASH
598b7b8d0a6SKever Yang 	int ret;
599b7b8d0a6SKever Yang 
600b7b8d0a6SKever Yang 	bootstage_mark_name(BOOTSTAGE_ID_END_SPL, "end_spl");
601b7b8d0a6SKever Yang 	ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
602b7b8d0a6SKever Yang 			      CONFIG_BOOTSTAGE_STASH_SIZE);
603b7b8d0a6SKever Yang 	if (ret)
604b7b8d0a6SKever Yang 		debug("Failed to stash bootstage: err=%d\n", ret);
605b7b8d0a6SKever Yang #endif
606fb4f5e7cSSimon Glass 
607cf947da1SAndrew F. Davis 	debug("loaded - jumping to U-Boot...\n");
6083a3b9147SMichal Simek 	spl_board_prepare_for_boot();
609a759f1e0SAllen Martin 	jump_to_image_no_args(&spl_image);
61047f7bcaeSTom Rini }
61147f7bcaeSTom Rini 
6126507f133STom Rini /*
6136507f133STom Rini  * This requires UART clocks to be enabled.  In order for this to work the
6146507f133STom Rini  * caller must ensure that the gd pointer is valid.
6156507f133STom Rini  */
61647f7bcaeSTom Rini void preloader_console_init(void)
61747f7bcaeSTom Rini {
61847f7bcaeSTom Rini 	gd->baudrate = CONFIG_BAUDRATE;
61947f7bcaeSTom Rini 
62047f7bcaeSTom Rini 	serial_init();		/* serial communications setup */
62147f7bcaeSTom Rini 
62247f7bcaeSTom Rini 	gd->have_console = 1;
62347f7bcaeSTom Rini 
62447f7bcaeSTom Rini 	puts("\nU-Boot SPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
62547f7bcaeSTom Rini 			U_BOOT_TIME ")\n");
62647f7bcaeSTom Rini #ifdef CONFIG_SPL_DISPLAY_PRINT
62747f7bcaeSTom Rini 	spl_display_print();
62847f7bcaeSTom Rini #endif
62947f7bcaeSTom Rini }
630db910353SSimon Glass 
631db910353SSimon Glass /**
632db910353SSimon Glass  * spl_relocate_stack_gd() - Relocate stack ready for board_init_r() execution
633db910353SSimon Glass  *
634db910353SSimon Glass  * Sometimes board_init_f() runs with a stack in SRAM but we want to use SDRAM
635db910353SSimon Glass  * for the main board_init_r() execution. This is typically because we need
636db910353SSimon Glass  * more stack space for things like the MMC sub-system.
637db910353SSimon Glass  *
638db910353SSimon Glass  * This function calculates the stack position, copies the global_data into
639adc421e4SAlbert ARIBAUD  * place, sets the new gd (except for ARM, for which setting GD within a C
640adc421e4SAlbert ARIBAUD  * function may not always work) and returns the new stack position. The
641adc421e4SAlbert ARIBAUD  * caller is responsible for setting up the sp register and, in the case
642adc421e4SAlbert ARIBAUD  * of ARM, setting up gd.
643adc421e4SAlbert ARIBAUD  *
644adc421e4SAlbert ARIBAUD  * All of this is done using the same layout and alignments as done in
645adc421e4SAlbert ARIBAUD  * board_init_f_init_reserve() / board_init_f_alloc_reserve().
646db910353SSimon Glass  *
647db910353SSimon Glass  * @return new stack location, or 0 to use the same stack
648db910353SSimon Glass  */
649db910353SSimon Glass ulong spl_relocate_stack_gd(void)
650db910353SSimon Glass {
651db910353SSimon Glass #ifdef CONFIG_SPL_STACK_R
652db910353SSimon Glass 	gd_t *new_gd;
653adc421e4SAlbert ARIBAUD 	ulong ptr = CONFIG_SPL_STACK_R_ADDR;
654db910353SSimon Glass 
655ae2cee2eSPhilipp Tomsich #if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_VAL(SYS_MALLOC_F_LEN)
656dcfcb8d4SHans de Goede 	if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) {
657dcfcb8d4SHans de Goede 		ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN;
658dcfcb8d4SHans de Goede 		gd->malloc_base = ptr;
659dcfcb8d4SHans de Goede 		gd->malloc_limit = CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN;
660dcfcb8d4SHans de Goede 		gd->malloc_ptr = 0;
661dcfcb8d4SHans de Goede 	}
662dcfcb8d4SHans de Goede #endif
663adc421e4SAlbert ARIBAUD 	/* Get stack position: use 8-byte alignment for ABI compliance */
664adc421e4SAlbert ARIBAUD 	ptr = CONFIG_SPL_STACK_R_ADDR - roundup(sizeof(gd_t),16);
665adc421e4SAlbert ARIBAUD 	new_gd = (gd_t *)ptr;
666adc421e4SAlbert ARIBAUD 	memcpy(new_gd, (void *)gd, sizeof(gd_t));
6672f11cd91SSimon Glass #if CONFIG_IS_ENABLED(DM)
6682f11cd91SSimon Glass 	dm_fixup_for_gd_move(new_gd);
6692f11cd91SSimon Glass #endif
670adc421e4SAlbert ARIBAUD #if !defined(CONFIG_ARM)
671adc421e4SAlbert ARIBAUD 	gd = new_gd;
672adc421e4SAlbert ARIBAUD #endif
673db910353SSimon Glass 	return ptr;
674db910353SSimon Glass #else
675db910353SSimon Glass 	return 0;
676db910353SSimon Glass #endif
677db910353SSimon Glass }
678f8ca9d16SJoseph Chen 
679f8ca9d16SJoseph Chen /* cleanup before jump to next stage */
680f8ca9d16SJoseph Chen void spl_cleanup_before_jump(struct spl_image_info *spl_image)
681f8ca9d16SJoseph Chen {
682f8ca9d16SJoseph Chen 	spl_board_prepare_for_jump(spl_image);
683f8ca9d16SJoseph Chen 
684f8ca9d16SJoseph Chen 	disable_interrupts();
685f8ca9d16SJoseph Chen 
686f8ca9d16SJoseph Chen 	/*
687f8ca9d16SJoseph Chen 	 * Turn off I-cache and invalidate it
688f8ca9d16SJoseph Chen 	 */
689f8ca9d16SJoseph Chen 	icache_disable();
690f8ca9d16SJoseph Chen 	invalidate_icache_all();
691f8ca9d16SJoseph Chen 
692f8ca9d16SJoseph Chen 	/*
693f8ca9d16SJoseph Chen 	 * Turn off D-cache
694f8ca9d16SJoseph Chen 	 * dcache_disable() in turn flushes the d-cache and disables MMU
695f8ca9d16SJoseph Chen 	 */
696f8ca9d16SJoseph Chen 	dcache_disable();
697f8ca9d16SJoseph Chen 	invalidate_dcache_all();
698f8ca9d16SJoseph Chen 
699f8ca9d16SJoseph Chen 	dsb();
700f8ca9d16SJoseph Chen 	isb();
701f8ca9d16SJoseph Chen }
702