147f7bcaeSTom Rini /* 247f7bcaeSTom Rini * (C) Copyright 2010 347f7bcaeSTom Rini * Texas Instruments, <www.ti.com> 447f7bcaeSTom Rini * 547f7bcaeSTom Rini * Aneesh V <aneesh@ti.com> 647f7bcaeSTom Rini * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 847f7bcaeSTom Rini */ 947f7bcaeSTom Rini #include <common.h> 1011516518SSimon Glass #include <dm.h> 1147f7bcaeSTom Rini #include <spl.h> 1247f7bcaeSTom Rini #include <asm/u-boot.h> 1347f7bcaeSTom Rini #include <nand.h> 1447f7bcaeSTom Rini #include <fat.h> 1547f7bcaeSTom Rini #include <version.h> 1647f7bcaeSTom Rini #include <i2c.h> 1747f7bcaeSTom Rini #include <image.h> 1847f7bcaeSTom Rini #include <malloc.h> 1911516518SSimon Glass #include <dm/root.h> 2047f7bcaeSTom Rini #include <linux/compiler.h> 2147f7bcaeSTom Rini 2247f7bcaeSTom Rini DECLARE_GLOBAL_DATA_PTR; 2347f7bcaeSTom Rini 243c6f8a0dSStefan Roese #ifndef CONFIG_SYS_UBOOT_START 253c6f8a0dSStefan Roese #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 263c6f8a0dSStefan Roese #endif 27ae83d882SStefano Babic #ifndef CONFIG_SYS_MONITOR_LEN 28e76caa62SAndreas Bießmann /* Unknown U-Boot size, let's assume it will not be more than 200 KB */ 29ae83d882SStefano Babic #define CONFIG_SYS_MONITOR_LEN (200 * 1024) 30ae83d882SStefano Babic #endif 31ae83d882SStefano Babic 3247f7bcaeSTom Rini u32 *boot_params_ptr = NULL; 3347f7bcaeSTom Rini struct spl_image_info spl_image; 3447f7bcaeSTom Rini 356507f133STom Rini /* Define board data structure */ 3647f7bcaeSTom Rini static bd_t bdata __attribute__ ((section(".data"))); 3747f7bcaeSTom Rini 3847f7bcaeSTom Rini /* 3947f7bcaeSTom Rini * Default function to determine if u-boot or the OS should 4047f7bcaeSTom Rini * be started. This implementation always returns 1. 4147f7bcaeSTom Rini * 4247f7bcaeSTom Rini * Please implement your own board specific funcion to do this. 4347f7bcaeSTom Rini * 4447f7bcaeSTom Rini * RETURN 4547f7bcaeSTom Rini * 0 to not start u-boot 4647f7bcaeSTom Rini * positive if u-boot should start 4747f7bcaeSTom Rini */ 4847f7bcaeSTom Rini #ifdef CONFIG_SPL_OS_BOOT 4947f7bcaeSTom Rini __weak int spl_start_uboot(void) 5047f7bcaeSTom Rini { 5147f7bcaeSTom Rini puts("SPL: Please implement spl_start_uboot() for your board\n"); 5247f7bcaeSTom Rini puts("SPL: Direct Linux boot not active!\n"); 5347f7bcaeSTom Rini return 1; 5447f7bcaeSTom Rini } 5547f7bcaeSTom Rini #endif 5647f7bcaeSTom Rini 57ea8256f0SStefan Roese /* 58ea8256f0SStefan Roese * Weak default function for board specific cleanup/preparation before 59ea8256f0SStefan Roese * Linux boot. Some boards/platforms might not need it, so just provide 60ea8256f0SStefan Roese * an empty stub here. 61ea8256f0SStefan Roese */ 62ea8256f0SStefan Roese __weak void spl_board_prepare_for_linux(void) 63ea8256f0SStefan Roese { 64ea8256f0SStefan Roese /* Nothing to do! */ 65ea8256f0SStefan Roese } 66ea8256f0SStefan Roese 670c3117b1SHeiko Schocher void spl_set_header_raw_uboot(void) 680c3117b1SHeiko Schocher { 690c3117b1SHeiko Schocher spl_image.size = CONFIG_SYS_MONITOR_LEN; 700c3117b1SHeiko Schocher spl_image.entry_point = CONFIG_SYS_UBOOT_START; 710c3117b1SHeiko Schocher spl_image.load_addr = CONFIG_SYS_TEXT_BASE; 720c3117b1SHeiko Schocher spl_image.os = IH_OS_U_BOOT; 730c3117b1SHeiko Schocher spl_image.name = "U-Boot"; 740c3117b1SHeiko Schocher } 750c3117b1SHeiko Schocher 7647f7bcaeSTom Rini void spl_parse_image_header(const struct image_header *header) 7747f7bcaeSTom Rini { 7847f7bcaeSTom Rini u32 header_size = sizeof(struct image_header); 7947f7bcaeSTom Rini 8077552b06SStefan Roese if (image_get_magic(header) == IH_MAGIC) { 81022b4975SStefan Roese if (spl_image.flags & SPL_COPY_PAYLOAD_ONLY) { 82022b4975SStefan Roese /* 83022b4975SStefan Roese * On some system (e.g. powerpc), the load-address and 84022b4975SStefan Roese * entry-point is located at address 0. We can't load 85022b4975SStefan Roese * to 0-0x40. So skip header in this case. 86022b4975SStefan Roese */ 87022b4975SStefan Roese spl_image.load_addr = image_get_load(header); 88022b4975SStefan Roese spl_image.entry_point = image_get_ep(header); 89022b4975SStefan Roese spl_image.size = image_get_data_size(header); 90022b4975SStefan Roese } else { 9177552b06SStefan Roese spl_image.entry_point = image_get_load(header); 9247f7bcaeSTom Rini /* Load including the header */ 93022b4975SStefan Roese spl_image.load_addr = spl_image.entry_point - 94022b4975SStefan Roese header_size; 95022b4975SStefan Roese spl_image.size = image_get_data_size(header) + 96022b4975SStefan Roese header_size; 97022b4975SStefan Roese } 9877552b06SStefan Roese spl_image.os = image_get_os(header); 9977552b06SStefan Roese spl_image.name = image_get_name(header); 10062cf11c0STaras Kondratiuk debug("spl: payload image: %.*s load addr: 0x%x size: %d\n", 1015d69a5d1SVasili Galka (int)sizeof(spl_image.name), spl_image.name, 10262cf11c0STaras Kondratiuk spl_image.load_addr, spl_image.size); 10347f7bcaeSTom Rini } else { 1048c80eb3bSAlbert ARIBAUD \(3ADEV\) #ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE 1058c80eb3bSAlbert ARIBAUD \(3ADEV\) /* 1068c80eb3bSAlbert ARIBAUD \(3ADEV\) * CONFIG_SPL_PANIC_ON_RAW_IMAGE is defined when the 1078c80eb3bSAlbert ARIBAUD \(3ADEV\) * code which loads images in SPL cannot guarantee that 1088c80eb3bSAlbert ARIBAUD \(3ADEV\) * absolutely all read errors will be reported. 1098c80eb3bSAlbert ARIBAUD \(3ADEV\) * An example is the LPC32XX MLC NAND driver, which 1108c80eb3bSAlbert ARIBAUD \(3ADEV\) * will consider that a completely unreadable NAND block 1118c80eb3bSAlbert ARIBAUD \(3ADEV\) * is bad, and thus should be skipped silently. 1128c80eb3bSAlbert ARIBAUD \(3ADEV\) */ 1138c80eb3bSAlbert ARIBAUD \(3ADEV\) panic("** no mkimage signature but raw image not supported"); 1148c80eb3bSAlbert ARIBAUD \(3ADEV\) #else 11547f7bcaeSTom Rini /* Signature not found - assume u-boot.bin */ 11647f7bcaeSTom Rini debug("mkimage signature not found - ih_magic = %x\n", 11747f7bcaeSTom Rini header->ih_magic); 1180c3117b1SHeiko Schocher spl_set_header_raw_uboot(); 1198c80eb3bSAlbert ARIBAUD \(3ADEV\) #endif 12047f7bcaeSTom Rini } 12147f7bcaeSTom Rini } 12247f7bcaeSTom Rini 123a759f1e0SAllen Martin __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 12447f7bcaeSTom Rini { 1254a0eb757SSRICHARAN R typedef void __noreturn (*image_entry_noargs_t)(void); 1264a0eb757SSRICHARAN R 12747f7bcaeSTom Rini image_entry_noargs_t image_entry = 128b2d5ac59SScott Wood (image_entry_noargs_t)(unsigned long)spl_image->entry_point; 12947f7bcaeSTom Rini 130a759f1e0SAllen Martin debug("image entry point: 0x%X\n", spl_image->entry_point); 1314a0eb757SSRICHARAN R image_entry(); 13247f7bcaeSTom Rini } 13347f7bcaeSTom Rini 134c57b953dSPavel Machek #ifdef CONFIG_SPL_RAM_DEVICE 135c57b953dSPavel Machek static void spl_ram_load_image(void) 136c57b953dSPavel Machek { 137c57b953dSPavel Machek const struct image_header *header; 138c57b953dSPavel Machek 139c57b953dSPavel Machek /* 140c57b953dSPavel Machek * Get the header. It will point to an address defined by handoff 141c57b953dSPavel Machek * which will tell where the image located inside the flash. For 142c57b953dSPavel Machek * now, it will temporary fixed to address pointed by U-Boot. 143c57b953dSPavel Machek */ 144c57b953dSPavel Machek header = (struct image_header *) 145c57b953dSPavel Machek (CONFIG_SYS_TEXT_BASE - sizeof(struct image_header)); 146c57b953dSPavel Machek 147c57b953dSPavel Machek spl_parse_image_header(header); 148c57b953dSPavel Machek } 149c57b953dSPavel Machek #endif 150c57b953dSPavel Machek 1516507f133STom Rini void board_init_r(gd_t *dummy1, ulong dummy2) 15247f7bcaeSTom Rini { 15347f7bcaeSTom Rini u32 boot_device; 154f3d46bd6SSimon Glass int ret; 155f3d46bd6SSimon Glass 15647f7bcaeSTom Rini debug(">>spl:board_init_r()\n"); 15747f7bcaeSTom Rini 158fb4f5e7cSSimon Glass #if defined(CONFIG_SYS_SPL_MALLOC_START) 15947f7bcaeSTom Rini mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, 16047f7bcaeSTom Rini CONFIG_SYS_SPL_MALLOC_SIZE); 161fb4f5e7cSSimon Glass gd->flags |= GD_FLG_FULL_MALLOC_INIT; 162fb4f5e7cSSimon Glass #elif defined(CONFIG_SYS_MALLOC_F_LEN) 163293f16b1SSimon Glass gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN; 164fb4f5e7cSSimon Glass gd->malloc_ptr = 0; 16547f7bcaeSTom Rini #endif 166f3d46bd6SSimon Glass if (IS_ENABLED(CONFIG_OF_CONTROL) && 167f3d46bd6SSimon Glass !IS_ENABLED(CONFIG_SPL_DISABLE_OF_CONTROL)) { 168f3d46bd6SSimon Glass ret = fdtdec_setup(); 169f3d46bd6SSimon Glass if (ret) { 170f3d46bd6SSimon Glass debug("fdtdec_setup() returned error %d\n", ret); 171f3d46bd6SSimon Glass hang(); 172f3d46bd6SSimon Glass } 173f3d46bd6SSimon Glass } 174f3d46bd6SSimon Glass if (IS_ENABLED(CONFIG_SPL_DM)) { 175f3d46bd6SSimon Glass ret = dm_init_and_scan(true); 176f3d46bd6SSimon Glass if (ret) { 177f3d46bd6SSimon Glass debug("dm_init_and_scan() returned error %d\n", ret); 178f3d46bd6SSimon Glass hang(); 179f3d46bd6SSimon Glass } 180f3d46bd6SSimon Glass } 18147f7bcaeSTom Rini 182ea8256f0SStefan Roese #ifndef CONFIG_PPC 183ea8256f0SStefan Roese /* 184ea8256f0SStefan Roese * timer_init() does not exist on PPC systems. The timer is initialized 185ea8256f0SStefan Roese * and enabled (decrementer) in interrupt_init() here. 186ea8256f0SStefan Roese */ 1874063c77dSIlya Yanok timer_init(); 188ea8256f0SStefan Roese #endif 1894063c77dSIlya Yanok 19047f7bcaeSTom Rini #ifdef CONFIG_SPL_BOARD_INIT 19147f7bcaeSTom Rini spl_board_init(); 19247f7bcaeSTom Rini #endif 19347f7bcaeSTom Rini 19447f7bcaeSTom Rini boot_device = spl_boot_device(); 19547f7bcaeSTom Rini debug("boot device - %d\n", boot_device); 19647f7bcaeSTom Rini switch (boot_device) { 197c57b953dSPavel Machek #ifdef CONFIG_SPL_RAM_DEVICE 198c57b953dSPavel Machek case BOOT_DEVICE_RAM: 199c57b953dSPavel Machek spl_ram_load_image(); 200c57b953dSPavel Machek break; 201c57b953dSPavel Machek #endif 20247f7bcaeSTom Rini #ifdef CONFIG_SPL_MMC_SUPPORT 20347f7bcaeSTom Rini case BOOT_DEVICE_MMC1: 20447f7bcaeSTom Rini case BOOT_DEVICE_MMC2: 20547f7bcaeSTom Rini case BOOT_DEVICE_MMC2_2: 20647f7bcaeSTom Rini spl_mmc_load_image(); 20747f7bcaeSTom Rini break; 20847f7bcaeSTom Rini #endif 20947f7bcaeSTom Rini #ifdef CONFIG_SPL_NAND_SUPPORT 21047f7bcaeSTom Rini case BOOT_DEVICE_NAND: 21147f7bcaeSTom Rini spl_nand_load_image(); 21247f7bcaeSTom Rini break; 21347f7bcaeSTom Rini #endif 2146000992eSEnric Balletbo i Serra #ifdef CONFIG_SPL_ONENAND_SUPPORT 2156000992eSEnric Balletbo i Serra case BOOT_DEVICE_ONENAND: 2166000992eSEnric Balletbo i Serra spl_onenand_load_image(); 2176000992eSEnric Balletbo i Serra break; 2186000992eSEnric Balletbo i Serra #endif 21933d34646SStefan Roese #ifdef CONFIG_SPL_NOR_SUPPORT 22033d34646SStefan Roese case BOOT_DEVICE_NOR: 22133d34646SStefan Roese spl_nor_load_image(); 22233d34646SStefan Roese break; 22333d34646SStefan Roese #endif 22447f7bcaeSTom Rini #ifdef CONFIG_SPL_YMODEM_SUPPORT 22547f7bcaeSTom Rini case BOOT_DEVICE_UART: 22647f7bcaeSTom Rini spl_ymodem_load_image(); 22747f7bcaeSTom Rini break; 22847f7bcaeSTom Rini #endif 22947f7bcaeSTom Rini #ifdef CONFIG_SPL_SPI_SUPPORT 23047f7bcaeSTom Rini case BOOT_DEVICE_SPI: 231a4cc1c48STom Rini spl_spi_load_image(); 23247f7bcaeSTom Rini break; 23347f7bcaeSTom Rini #endif 2347ac2fe2dSIlya Yanok #ifdef CONFIG_SPL_ETH_SUPPORT 2357ac2fe2dSIlya Yanok case BOOT_DEVICE_CPGMAC: 2367ac2fe2dSIlya Yanok #ifdef CONFIG_SPL_ETH_DEVICE 2377ac2fe2dSIlya Yanok spl_net_load_image(CONFIG_SPL_ETH_DEVICE); 2387ac2fe2dSIlya Yanok #else 2397ac2fe2dSIlya Yanok spl_net_load_image(NULL); 2407ac2fe2dSIlya Yanok #endif 2417ac2fe2dSIlya Yanok break; 2427ac2fe2dSIlya Yanok #endif 24362a81431SIlya Yanok #ifdef CONFIG_SPL_USBETH_SUPPORT 24462a81431SIlya Yanok case BOOT_DEVICE_USBETH: 24562a81431SIlya Yanok spl_net_load_image("usb_ether"); 24662a81431SIlya Yanok break; 24762a81431SIlya Yanok #endif 2488cffe5bdSDan Murphy #ifdef CONFIG_SPL_USB_SUPPORT 2498cffe5bdSDan Murphy case BOOT_DEVICE_USB: 2508cffe5bdSDan Murphy spl_usb_load_image(); 2518cffe5bdSDan Murphy break; 2528cffe5bdSDan Murphy #endif 253fff40a7eSDan Murphy #ifdef CONFIG_SPL_SATA_SUPPORT 254fff40a7eSDan Murphy case BOOT_DEVICE_SATA: 255fff40a7eSDan Murphy spl_sata_load_image(); 256fff40a7eSDan Murphy break; 257fff40a7eSDan Murphy #endif 258c01c71bcSSimon Glass #ifdef CONFIG_SPL_BOARD_LOAD_IMAGE 259c01c71bcSSimon Glass case BOOT_DEVICE_BOARD: 260c01c71bcSSimon Glass spl_board_load_image(); 261c01c71bcSSimon Glass break; 262c01c71bcSSimon Glass #endif 26347f7bcaeSTom Rini default: 26418f26fdbSStefan Roese #if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 265e860d012SStefan Roese puts("SPL: Unsupported Boot Device!\n"); 26618f26fdbSStefan Roese #endif 26747f7bcaeSTom Rini hang(); 26847f7bcaeSTom Rini } 26947f7bcaeSTom Rini 27047f7bcaeSTom Rini switch (spl_image.os) { 27147f7bcaeSTom Rini case IH_OS_U_BOOT: 27247f7bcaeSTom Rini debug("Jumping to U-Boot\n"); 27347f7bcaeSTom Rini break; 27447f7bcaeSTom Rini #ifdef CONFIG_SPL_OS_BOOT 27547f7bcaeSTom Rini case IH_OS_LINUX: 27647f7bcaeSTom Rini debug("Jumping to Linux\n"); 27747f7bcaeSTom Rini spl_board_prepare_for_linux(); 27847f7bcaeSTom Rini jump_to_image_linux((void *)CONFIG_SYS_SPL_ARGS_ADDR); 27947f7bcaeSTom Rini #endif 28047f7bcaeSTom Rini default: 28142120981STom Rini debug("Unsupported OS image.. Jumping nevertheless..\n"); 28247f7bcaeSTom Rini } 283fb4f5e7cSSimon Glass #if defined(CONFIG_SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE) 284fb4f5e7cSSimon Glass debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr, 285fb4f5e7cSSimon Glass gd->malloc_ptr / 1024); 286fb4f5e7cSSimon Glass #endif 287fb4f5e7cSSimon Glass 288a759f1e0SAllen Martin jump_to_image_no_args(&spl_image); 28947f7bcaeSTom Rini } 29047f7bcaeSTom Rini 2916507f133STom Rini /* 2926507f133STom Rini * This requires UART clocks to be enabled. In order for this to work the 2936507f133STom Rini * caller must ensure that the gd pointer is valid. 2946507f133STom Rini */ 29547f7bcaeSTom Rini void preloader_console_init(void) 29647f7bcaeSTom Rini { 29747f7bcaeSTom Rini gd->bd = &bdata; 29847f7bcaeSTom Rini gd->baudrate = CONFIG_BAUDRATE; 29947f7bcaeSTom Rini 30047f7bcaeSTom Rini serial_init(); /* serial communications setup */ 30147f7bcaeSTom Rini 30247f7bcaeSTom Rini gd->have_console = 1; 30347f7bcaeSTom Rini 30447f7bcaeSTom Rini puts("\nU-Boot SPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \ 30547f7bcaeSTom Rini U_BOOT_TIME ")\n"); 30647f7bcaeSTom Rini #ifdef CONFIG_SPL_DISPLAY_PRINT 30747f7bcaeSTom Rini spl_display_print(); 30847f7bcaeSTom Rini #endif 30947f7bcaeSTom Rini } 310db910353SSimon Glass 311db910353SSimon Glass /** 312db910353SSimon Glass * spl_relocate_stack_gd() - Relocate stack ready for board_init_r() execution 313db910353SSimon Glass * 314db910353SSimon Glass * Sometimes board_init_f() runs with a stack in SRAM but we want to use SDRAM 315db910353SSimon Glass * for the main board_init_r() execution. This is typically because we need 316db910353SSimon Glass * more stack space for things like the MMC sub-system. 317db910353SSimon Glass * 318db910353SSimon Glass * This function calculates the stack position, copies the global_data into 319db910353SSimon Glass * place and returns the new stack position. The caller is responsible for 320db910353SSimon Glass * setting up the sp register. 321db910353SSimon Glass * 322db910353SSimon Glass * @return new stack location, or 0 to use the same stack 323db910353SSimon Glass */ 324db910353SSimon Glass ulong spl_relocate_stack_gd(void) 325db910353SSimon Glass { 326db910353SSimon Glass #ifdef CONFIG_SPL_STACK_R 327db910353SSimon Glass gd_t *new_gd; 328db910353SSimon Glass ulong ptr; 329db910353SSimon Glass 330db910353SSimon Glass /* Get stack position: use 8-byte alignment for ABI compliance */ 331*ce49e794SSimon Glass ptr = CONFIG_SPL_STACK_R_ADDR - sizeof(gd_t); 332db910353SSimon Glass ptr &= ~7; 333db910353SSimon Glass new_gd = (gd_t *)ptr; 334db910353SSimon Glass memcpy(new_gd, (void *)gd, sizeof(gd_t)); 335db910353SSimon Glass gd = new_gd; 336db910353SSimon Glass 337db910353SSimon Glass /* Clear the BSS. */ 338db910353SSimon Glass memset(__bss_start, 0, __bss_end - __bss_start); 339db910353SSimon Glass 340db910353SSimon Glass return ptr; 341db910353SSimon Glass #else 342db910353SSimon Glass return 0; 343db910353SSimon Glass #endif 344db910353SSimon Glass } 345